JPH0251296B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a transistor circuit, and particularly to a transistor circuit for extracting output signals of both positive and negative polarities in response to input signals of two different polarities.

FIG. 1 shows an example of this type of transistor circuit using a conventionally used transistor switching circuit and an inverting amplifier circuit.
In FIG. 1, the emitter of a transistor 1 is connected to the positive terminal of a voltage source 2, and its collector is connected to the negative terminal of the voltage source 2 via a resistor 3 and a resistor 4, and is grounded. An input terminal 14 is connected to the base of the transistor 1. The connection point between the resistors 3 and 4 is connected to the base of a transistor 5, and the emitter of the transistor 5 is grounded via a resistor 6 and also connected to an output terminal 7. A collector of the transistor 5 is connected to the positive terminal of the voltage source 2 via a resistor 8 and also to an output terminal 9. The collector of the transistor 10 whose emitter is grounded is a resistor 11 and a resistor 1.
2 to the positive end of the voltage source 2.
The base of this transistor 10 has an input terminal 15.
is connected. The connection point between the resistor 11 and the resistor 12 is connected to the base of the transistor 13,
The emitter of the transistor 13 is connected to the positive terminal of the voltage source 2, and the collector is connected to the connection point between the collector of the transistor 1 and the resistor 3.

Here, consider a case where an input signal having a polarity that makes transistor 1 conductive is applied to input terminal 14 connected to the base of transistor 1. transistor 1
becomes conductive and becomes saturated, the collector rises almost to the power supply voltage given by voltage source 2, and this collector voltage is connected to the base of transistor 5 through resistor 3.
A voltage divided by resistor 4 is applied. At the emitter of the transistor 5, that is, the output terminal 7, a voltage lower than the base voltage by the base-emitter voltage V _BE appears, and an emitter current determined by the resistor 6 flows.
If the current amplification factor of the transistor 5 is sufficiently large and it operates in the active region, a collector current approximately equal to the emitter current flows through the resistor 8, and the output terminal 9 drops from the power supply voltage by the potential drop of the resistor 8. Voltage appears.

As shown in FIG. 1, if a negative input pulse is applied to the input terminal 14 to make the transistor 1 conductive, the output terminal 7 receives an output pulse with the opposite polarity to the input pulse, and the output terminal 9 receives the input pulse. It can be seen that an output pulse of the same polarity appears. On the other hand, if you want to obtain output pulses of both positive and negative polarities with a positive input pulse, transistor 1
An input pulse is applied to the input terminal 15 connected to the base of transistor 1 to make the transistor 10 conductive and saturated, and an inverted negative pulse is applied to the base of the transistor 13 to make the transistor 13 conductive instead of the transistor 1 described above. let As a result, the transistor 5 operates in exactly the same way, and output pulses of both polarities are taken out at the output terminals 7 and 9.

In this way, in the circuit shown in Figure 1, if input pulses of different polarities are applied to the input terminals corresponding to each polarity, output pulses of the desired polarity can always be obtained at the two output terminals. I understand. However, as is clear from FIG. 1, the input pulse from the input terminal 15 passes through an inverting switching circuit made up of a transistor 10, a resistor 11, and a resistor 12 one more stage than the input pulse from the input terminal 14. The switching delay time is approximately 2 times longer on the input terminal 15 side than on the input terminal 14 side.
It will become twice as big. Also, of course,
When input is applied to the input terminal 15 side, the current consumption for one stage of the inverting switching circuit increases.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and provide a transistor circuit that can output input signals of different polarities to output signals of both positive and negative polarities through paths under the same conditions.

The transistor circuit according to the present invention includes a first load connected between a first power supply terminal and a first output terminal, a second load connected between a second power supply terminal and a second output terminal, and a second load connected between a second power supply terminal and a second output terminal. a first transistor of one conductivity type whose collector and emitter are connected to the first and second output terminals, respectively; a first transistor of the other conductivity type whose emitter and collector are connected to the first and second output terminals, respectively; 2 transistors, a third transistor of a different conductivity type which is switched by the first input signal, means for connecting the emitter and collector of the transistor to the first power supply terminal and the base of the first transistor, respectively;
a fourth transistor of one conductivity type that is switched by a second input signal having a polarity different from that of the input signal, and an emitter and a collector of the fourth transistor are connected to a second power supply terminal and a base of the second transistor, respectively. have the means.

Next, the present invention will be explained in more detail with reference to the drawings.

FIG. 2 is a circuit connection diagram showing one embodiment of the present invention, in which parts corresponding to those in FIG. established,
The major difference is that it is connected to the connection point of the base resistors 11 and 12. Input terminal 14, transistor 1, resistor 3, resistor 4, transistor 5,
The connections of the resistor 6, resistor 8, output terminal 7, and output terminal 9 and the circuit operation are exactly the same as in the case of Fig. 1.
When an input pulse is applied to the input terminal 14, the first
It works in the same way as in the figure. On the other hand, input terminal 15
Similarly, when an input pulse is applied to the transistor 10, the transistor 10 becomes conductive and the collector current flows through the resistor 11 and the resistor 12. However, the transistor 16 whose base is connected to the connection point of the resistor 11 and the resistor 12 is the transistor shown in FIG. 13, the emitter is connected to the output terminal 9 and the collector is connected to the output terminal 7, so the output pulse with the same polarity as the input pulse is output to the output terminal 7.
An output pulse having a polarity opposite to that of the input pulse is directly transmitted to the output terminal 9 and appears. In other words, transistor 5 and transistor 16 perform the same function with respect to the respective input signals, although the polarity is opposite. A positive pulse input which applies a positive output pulse to the input terminal 15 extracts output pulses of both polarity from the collector and emitter of the transistor 16 through their own paths. Therefore, the switching delay time is the same for both inputs, and there is no significant difference. Furthermore, when only one input is applied, the path leading to the other input terminal is cut off, so it is possible to design the circuit so that the current consumption does not change depending on the polarity of the input.

In FIG. 2, if the division ratio of resistors 3 and 4 is equal to the division ratio of resistors 11 and 12, and if resistors 6 and 8 are set equal, the output signal appearing at output terminals 7 and 9 is extracted as a signal with opposite polarity and equal amplitude with respect to both input signals. In addition, input terminal 14 and input terminal 15
When the respective input signals are applied simultaneously to the output terminal, an output signal as a logical sum of the two is obtained at the output terminal with both positive and negative polarities.

Although FIG. 2 shows a circuit configuration in which a pulse signal of the saturated switching output from transistors 1 and 10 is applied to the bases of transistors 5 and 16, the present invention is not necessarily limited to this configuration;
It is clear that an input signal of the amplitude necessary to cause transistors 16 and 16 to conduct is applied to their respective bases to operate in a similar manner.

[Brief explanation of the drawing]

FIG. 1 is a circuit connection diagram showing a conventional example of a transistor switching circuit, and FIG. 2 is a circuit connection diagram showing an embodiment for explaining the present invention. 1, 5, 10, 13, 16...transistor,
3, 4, 6, 8, 11, 12...Resistance, 14, 1
5...Input terminal, 7,9...Output terminal, 2...Voltage source.

Claims (1)

[Claims] 1 first and second power supply terminals, first and second
a first load connected between the first power supply terminal and the first output terminal;
a second load connected between the power supply terminal and the second output terminal; a second load of one conductivity type having a collector connected to the first output terminal and an emitter connected to the second output terminal; 1 transistor, said first transistor
a second transistor of another conductivity type having an emitter connected to the output terminal thereof and a collector connected to the second output terminal; a second transistor having the other conductivity type and being switched by the first input signal; a third transistor, means for connecting the emitter and collector of the third transistor to the first power supply terminal and the base of the first transistor, respectively;
a fourth transistor having the one conductivity type and being switched by a second input signal having a polarity different from the first input signal;
and means for connecting to a power terminal of the second transistor and a base of the second transistor, respectively.