JPH025794U - - Google Patents
Info
- Publication number
- JPH025794U JPH025794U JP8258488U JP8258488U JPH025794U JP H025794 U JPH025794 U JP H025794U JP 8258488 U JP8258488 U JP 8258488U JP 8258488 U JP8258488 U JP 8258488U JP H025794 U JPH025794 U JP H025794U
- Authority
- JP
- Japan
- Prior art keywords
- image information
- random access
- access memories
- display
- video random
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015654 memory Effects 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 1
Landscapes
- Digital Computer Display Output (AREA)
Description
第１図はこの考案の一実施例による画像表示装
置を示すブロツク接続図、第２図は従来の画像表
示装置を示すブロツク接続図である。
２はメモリ入力コントローラ部、３―１〜３―
ｎはビデオＲＡＭ、４はメモリ出力コントローラ
部、５は表示コントローラ部、６は表示部（液晶
表示部）。なお、図中、同一符号は同一、又は相
当部分を示す。
FIG. 1 is a block connection diagram showing an image display device according to an embodiment of this invention, and FIG. 2 is a block connection diagram showing a conventional image display device. 2 is a memory input controller section, 3-1 to 3-
n is a video RAM, 4 is a memory output controller section, 5 is a display controller section, and 6 is a display section (liquid crystal display section). In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
セスメモリと、これらの各ビデオランダムアクセ
スメモリに画像情報を書き込むメモリ入力コント
ローラ部と、上記各ビデオランダムアクセスメモ
リの画像情報を読み出して処理するメモリ出力コ
ントローラ部と、このメモリ出力コントローラ部
が出力する画像情報を表示部に表示させる表示コ
ントローラ部とを備えた画像表示装置。 a plurality of video random access memories that store image information; a memory input controller that writes image information to each of these video random access memories; and a memory output controller that reads and processes image information from each of the video random access memories. and a display controller section that causes a display section to display image information output by the memory output controller section.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8258488U JPH025794U (en) | 1988-06-22 | 1988-06-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8258488U JPH025794U (en) | 1988-06-22 | 1988-06-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH025794U true JPH025794U (en) | 1990-01-16 |
Family
ID=31307332
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8258488U Pending JPH025794U (en) | 1988-06-22 | 1988-06-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH025794U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05150929A (en) * | 1991-11-30 | 1993-06-18 | Sony Corp | Display method |
-
1988
- 1988-06-22 JP JP8258488U patent/JPH025794U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05150929A (en) * | 1991-11-30 | 1993-06-18 | Sony Corp | Display method |
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