JPH0258258A - High frequency integrated circuit - Google Patents
High frequency integrated circuitInfo
- Publication number
- JPH0258258A JPH0258258A JP20897288A JP20897288A JPH0258258A JP H0258258 A JPH0258258 A JP H0258258A JP 20897288 A JP20897288 A JP 20897288A JP 20897288 A JP20897288 A JP 20897288A JP H0258258 A JPH0258258 A JP H0258258A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- capacitor
- high frequency
- pattern
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、高周波帯の#!積回路に関するものである
。[Detailed Description of the Invention] [Industrial Field of Application] This invention is applicable to high frequency band #! It is related to product circuits.
C従来の技術〕
以ド、高周波I!積回路として、モノリシックマイクロ
波実槓回路増幅器(MMIC増幅器)を例にとって説明
する。C. Conventional technology] Below, high frequency I! A monolithic microwave actual circuit amplifier (MMIC amplifier) will be described as an example of a product circuit.
第3図は従来のMMIG増幅器の一例を示す平面図であ
る、。FIG. 3 is a plan view showing an example of a conventional MMIG amplifier.
乙の図において、1は高周波トラノジスク、2は抵抗体
、3はコンデンサ、4は入力信号端子、5は出力信号端
子、6は的記高周波トランジスク1のIN!]欣バイア
ス印加端子であり、71.を乙れらの各素子が形成され
た集積口il!8基板である。。In the diagram shown in Figure B, 1 is a high frequency transistor, 2 is a resistor, 3 is a capacitor, 4 is an input signal terminal, 5 is an output signal terminal, and 6 is the IN! of high frequency transistor 1! ] is a bias bias application terminal, and 71. The integration port where each of these elements is formed! There are 8 boards. .
次にMMIC増幅器の動作について説明ずろ。Next, let's explain the operation of the MMIC amplifier.
入力信号端子4に印加された信号は高周波トラノジスタ
1により増幅され、出力信号端子5から取り出される1
、ここで、i11周波トラノジスタ1を動作させるため
の直流バイアスは、直流バイアス印加端子6より供給さ
れろ。コンデンサ3および抵抗体2は^周波トランジス
ク1の人、出力インピーダンスを所定の特性インピーダ
ンスにインピーダンス整合させるために用いられる。。The signal applied to the input signal terminal 4 is amplified by the high frequency transistor 1 and taken out from the output signal terminal 5.
Here, the DC bias for operating the i11 frequency transistor 1 is supplied from the DC bias application terminal 6. The capacitor 3 and the resistor 2 are used to impedance match the output impedance of the frequency transistor 1 to a predetermined characteristic impedance. .
[発明が解決しようとする課題〕
以−Fのように構成された従来のMMIG増幅器では、
増幅器に要求される特性や使用周波数によってはコンデ
ンサ3と()て大容景のものが必要となる。その結果、
コンデンサ3の面積が増大し、MM(C増幅器パターン
の大部分がコンデンサパタンとなり、MMICチップの
大面積化によるコス1−アップの問題と、大面積のコン
デンサパタン配置によるMMLC回路設計が困難になる
等の問題点があった。[Problem to be solved by the invention] In the conventional MMIG amplifier configured as shown below,
Depending on the characteristics required of the amplifier and the frequency used, a large capacity capacitor 3 may be required. the result,
The area of the capacitor 3 increases, most of the MM (C amplifier pattern) becomes a capacitor pattern, and the cost increases due to the large area of the MMIC chip, and it becomes difficult to design an MMLC circuit due to the large area capacitor pattern arrangement. There were problems such as.
乙の発明は、上記のような問題点を解消するためになさ
れたもので、コンデンサの占有面積を減らした小型の高
周波集積回路を得ることを目的とする。The invention of B was made to solve the above-mentioned problems, and its purpose is to obtain a compact high-frequency integrated circuit in which the area occupied by the capacitor is reduced.
[課題を解決するための手段〕
乙の発明に係る高周波集積回路は、集積回路基板の1M
面に四部を設け、この凹部内にコンデンサ部分を形成し
、このコンデンサと集積回路基板表向の高周波1−ラン
ジスタや回路パターンと集積回路基板をvi通する導電
体で接続したものである。[Means for solving the problem] The high frequency integrated circuit according to the invention of Party B has a 1M integrated circuit board.
Four parts are provided on the surface, a capacitor part is formed in the recessed part, and the capacitor is connected to the high frequency transistor or circuit pattern on the surface of the integrated circuit board by a conductor that passes through the integrated circuit board.
(作用〕
この発明においては、コンデンサ部分を集積回路基板表
面から取り除き、!AM回路基板裏西OH部に形成した
ことから、iJL禎回路基板表面に占有していたコンデ
ンサパターンの面積が減少す−る。(Function) In this invention, since the capacitor portion is removed from the surface of the integrated circuit board and formed on the back west OH portion of the AM circuit board, the area of the capacitor pattern that occupied the surface of the iJL circuit board is reduced. Ru.
以下、この発明の一実施例を図面′について説明する。 An embodiment of the present invention will be described below with reference to the drawing '.
。
第を図はこの発明の一実施例を示すMMIC増幅器の平
面図であり、第2図は、第1図のA −A′線での断面
図である。. 1 is a plan view of an MMIC amplifier showing an embodiment of the present invention, and FIG. 2 is a sectional view taken along line A-A' in FIG.
これらの図において、1〜7(よ第3図と同じものを示
し、8ば前記集′!f4回路基板7の裏面に形成された
四部で、この四部8内にコンデンサ31が形成されてお
り、ij4積回路基板7を貫通する導電体32により集
積回路基板7上の高周波トランジスク1や他の回路パタ
ーンと電気的に接続されている。In these figures, 1 to 7 are the same as in Figure 3, and 8 is the four parts formed on the back side of the circuit board 7, and a capacitor 31 is formed within these four parts 8. , ij4 integrated circuit board 7 is electrically connected to the high frequency transistor 1 and other circuit patterns on the integrated circuit board 7 by a conductor 32 penetrating the integrated circuit board 7.
このように構成することにより、従来は高周波集積回路
上に形成され、広い面積を占有していたコンデンサパタ
ーンを表向よりJMifi′iに移設がiIJ(mとな
り、電気的な特性は従来例と同等になる1、さらに、表
面の回路パターン配置でコンデンサパタンの制約が解消
もしくは少なくなり、集積回路パターン設計における自
由度が向上する。With this configuration, the capacitor pattern, which was conventionally formed on a high-frequency integrated circuit and occupied a wide area, can be moved from the surface to JMifi'i and become iIJ(m), and the electrical characteristics are the same as the conventional example. 1.Furthermore, restrictions on capacitor patterns are eliminated or reduced in the circuit pattern arrangement on the surface, improving the degree of freedom in integrated circuit pattern design.
なお、上記実施例ではMMIG増幅器について説明した
が、これに限定するものでなく、他の高周波集積回路に
適用しても同様の効果を奏することばいうまでもない。It should be noted that although the above embodiments have been described with respect to the MMIG amplifier, the present invention is not limited to this, and it goes without saying that the same effects can be achieved even if the present invention is applied to other high frequency integrated circuits.
以上説明したようにこの発明は、集積回路基板−ヒに形
成される回路パターンのうち、コンデンサ部分を集積回
路基板の裏面に設けられた四部に形成したので、集積回
路パターンの縮小化かり能となり、小型化した安価な高
周波集積回路が得られろ効果がある。As explained above, in this invention, among the circuit patterns formed on the integrated circuit board, the capacitor portions are formed on the four parts provided on the back surface of the integrated circuit board, which makes it possible to reduce the size of the integrated circuit pattern. This has the advantage that a compact and inexpensive high frequency integrated circuit can be obtained.
第1図はこの発明の一実施例によるMM[C増幅器のチ
ップパターンを示ず平向図、第2図は、第1図のA−A
’締における断餌図、第3図は従来のMMI(:増幅器
のチップパターンを示す平向図である。
図において、1は高周波トランジスタ、2は抵抗体、4
は入力信号端子、5は出力信号端子、6はトランンスク
の1α流バイアス印加端子、7は集積回路基板、8は凹
部、31は凹部に形成されたコンデンサ、32f;tQ
4積回路基板を貫通する導電体である、。
なお、各図中″の同一符号は同一または相当部分をボす
。
代理人 大 岩 増 雄 (外2名)第
図
第
図
η
尋電俸
第
図FIG. 1 is a plan view without showing the chip pattern of an MM[C amplifier according to an embodiment of the present invention, and FIG. 2 is an A-A in FIG.
Figure 3 is a plan view showing the chip pattern of a conventional MMI (amplifier). In the figure, 1 is a high-frequency transistor, 2 is a resistor, and 4
is an input signal terminal, 5 is an output signal terminal, 6 is a 1α current bias application terminal of the transformer, 7 is an integrated circuit board, 8 is a recess, 31 is a capacitor formed in the recess, 32f; tQ
It is a conductor that penetrates a four-layer circuit board. In addition, the same reference numerals in each figure indicate the same or corresponding parts. Agent: Masuo Oiwa (2 others) Figure η Figure η Jindenhou Figure
Claims (1)
ターンを同一の集積回路基板に備えた高周波集積回路に
おいて、前記集積回路基板の裏面に凹部を設け、この凹
部内に前記コンデンサ部分を形成し、前記集積回路基板
上面の回路パターンと前記コンデンサとを前記集積回路
基板を貫通する導電体で接続したことを特徴とする高周
波集積回路。In a high-frequency integrated circuit in which circuit patterns such as a high-frequency transistor, a resistor, and a capacitor are provided on the same integrated circuit board, a recess is provided on the back surface of the integrated circuit board, the capacitor portion is formed in this recess, and the integrated circuit A high-frequency integrated circuit, characterized in that a circuit pattern on an upper surface of the substrate and the capacitor are connected by a conductor penetrating the integrated circuit substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20897288A JPH0258258A (en) | 1988-08-23 | 1988-08-23 | High frequency integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20897288A JPH0258258A (en) | 1988-08-23 | 1988-08-23 | High frequency integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0258258A true JPH0258258A (en) | 1990-02-27 |
Family
ID=16565210
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20897288A Pending JPH0258258A (en) | 1988-08-23 | 1988-08-23 | High frequency integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0258258A (en) |
-
1988
- 1988-08-23 JP JP20897288A patent/JPH0258258A/en active Pending
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