JPH0261040B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION An object of the present invention is to provide an electronic musical instrument that divides a musical tone from generation to termination into a plurality of parts to form a musical sound waveform. Conventionally, there is an electronic musical instrument that stores one period of a musical sound waveform in a memory and reads it out at a speed based on the musical frequency to form a musical tone. According to this, the same waveform was repeated from the beginning to the end of the musical tone, and the sound was poor and unnatural, with no temporal change in timbre. According to the present invention, a musical sound waveform is divided into a plurality of parts from generation to completion, and the waveform with an esovelope added to each divided part is converted into data and stored in the waveform data memory, and the waveform data memory is stored by keyboard operation. The waveform data simulated by calculation of a natural musical instrument is read out, and a waveform is formed for each section as time passes, creating a musical sound waveform that changes over time, making it possible to provide an extremely natural and rich sound. As an embodiment of the present invention, a method is disclosed in which a waveform data memory for storing waveform data and a microprocessor are used, and musical tones are formed by a processing program (simulation program) of the microprocessor. The microprocessor is used to calculate the musical sound waveform in the attack section and decay section from the generation to the end of the musical tone, that is, in accordance with the waveform data. Waveform data is prepared for several divided waveform patterns in the attack and decay sections. Furthermore, the data of these waveform patterns also includes amplitude changes in the attack and decay sections. In the attack and decay part of the musical sound waveform,
Since the waveform pattern changes over time,
You can obtain something close to the actual musical tone. Furthermore, by preparing waveform pattern data for each key individually, it is possible to add timbre changes depending on the musical range. Further, since amplitude changes in the attack and decay parts can be included in the waveform pattern data, there is no need to prepare an envelope waveform or the like. Furthermore, since there is no need to multiply the envelope waveform and the tone waveform, the system is simple. In addition, as for the waveform pattern data, it is only necessary to prepare the data necessary for calculating the musical sound waveform with a microprocessor, so it is possible to sample the amplitude value of the musical sound waveform, quantize the value, and store it as a digital signal. This method requires less memory capacity than the previous method. When simulating a musical sound waveform using a microprocessor, the problem is that when a key is pressed, the waveform value calculated by the microprocessor is reproduced according to the musical sound frequency corresponding to the pressed key. be. That is, the problem is that there is a large gap between the data processing time of the microprocessor and the musical tone cycle time. For example, if you try to simulate a musical sound waveform with N samplings, the microprocessor will now perform calculations based on the waveform data according to the simulation program.
If P-state instruction processing is required to calculate the sampling result, NP-state is required to obtain a musical sound waveform. Assuming that the processing time for one state of the microprocessor is t time, NPt time is required. Now, if the musical waveform period is T, then if T>NPt, that is, T/N>Pt, then the microprocessor can be used for real-time processing. Now, let us assume that N=64, and for example, for C7, T/64=7.46μs, so 7.46μs>Pt. In contrast, existing CPU chips, such as the Intel 8008 microprocessor,
Since the one-state processing time t=4 μs, in the case of C7, P≧2 and the above equation no longer holds true. Intel has about 10 times faster processing speed than 8008
Even if 8080 is used, it can be seen that it is difficult to use it in real time. Even in the case of a bipolar processor, which has a processing speed about 100 times faster than the 8008, it would only be possible to create a very simple simulated routine for real-time processing. Furthermore, when a microprocessor is used for real-time processing, it is unreasonable to use a microprocessor to repeatedly calculate its value even in the time domain where the musical sound waveform repeats in the same exact pattern. It is. Also, since the results of calculations by the microprocessor are output in synchronization with the microprocessor's clock, they must be converted into ones that synchronize the musical tone frequency of the pressed keys, but this operation can be done using software. This is difficult to achieve and requires hardware implementation. The basic concept of the present invention, in which the tone waveform pattern changes depending on the waveform data, will be explained with reference to FIGS. 1 and 2. FIG. 1 shows an example of waveform pattern changes in the attack section. That is, WD1, WD2...
In this way, the waveform pattern changes according to the waveform data. The time regions T _WD1 , T _WD2 , . . . in which the musical sound waveform repeats in the same pattern are composed of repetitions of the same waveform pattern. These waveform data are stored in a waveform data memory as shown in FIG. 2A. That is, addresses 0-27
There is waveform data from waveform patterns WD1 to WD6, and it is detected that it has entered the steady state with the attack end data at address 28, and the waveform data from addresses 22 to 2 are detected.
The waveform pattern WD6 based on the waveform data of No. 7 is maintained to be the waveform of the steady portion. When entering the decay section, the waveform data after address 29 are sequentially read out, and waveform patterns WD7 . . . are sequentially simulated. Then, similar to the attack portion, changes in the waveform pattern are formed. and,
The simulation ends when the decay of address m ends. A routine for calculating musical tone waveforms as shown in FIG. 1 in accordance with these waveform data is stored in the simulate program memory. The waveform data memory for all the ranges is divided into data blocks W1, W2...
…Prepare some as shown in W _o . For example, the tone waveform pattern of key C4 is data block W4.
, the CPU chip sequentially fetches the data from the address where the waveform data of W4 is stored, that is, AW4, and calculates the waveform pattern according to the simulated program memory. In addition, in Fig. 2, the waveform pattern WD
Waveform data WD1-1 to WD1-4, WD2-1 to WD for simulating 1, WD2...
2-5... is a data group constituting one period of each waveform pattern, as shown in FIG. 1 taking the case of WD1 as an example. In this example, WD1 is simulated using a broken line approximation, and the sections a1a2 , a2a3 , a3a4 , and a4a5 are WD1-1, WD1-2, and a4a5 , respectively.
It is calculated by processing data WD1-3 and WD1-4. Next, the basic idea of reading sequentially calculated waveform values at musical tone frequencies will be explained with reference to FIG. 3, referring to the examples of FIGS. 1 and 2. First, if one cycle of the waveform pattern consists of N words, a 2N word waveform memory is prepared. Figure 3 A shows the case where N=64 as an example, and 128
A word waveform memory is provided. And 0~
63 words and 64 to 127 words in area A, respectively.
It is divided into area B and used. Area A, Area B
can be specified by keeping the MSB of the address terminal of the waveform memory at "L" or "H". Next, FIG. 3B will be explained. First, WD1-1~
First waveform pattern calculated according to WD1-4
The memory area in which WD1 is stored is the same as the memory area in which addresses are specified for reading at musical tone frequencies. tx in Figure 3 (b) is this section. In the example of FIG. 3, area A is first used. Next, the waveform pattern WD1 stored in area A
The reference point is the output of the waveform pattern switching clock generator that occurs while reading out at the musical frequency.
Waveform pattern according to WD2-1 to WD2-5
WD2 is calculated and stored in area B. When the calculation is completely completed, the readout of the musical tone frequency is switched to area B, and the waveform pattern WD2 is read out. During this period, the WD3-1 is
~WD3-5 are calculated, and the waveform pattern WD3 is stored in area A. When the calculation is completely completed, switch the reading of the musical tone frequency to area A,
Read waveform pattern WD3. Then, WD4-1 to WD4-5 are processed based on the output of the waveform pattern switching clock generator generated during this time, and the waveform pattern WD4 is stored in area B. The above storage and read operations for areas A and B are repeated in the same way. The problem here is that when the calculation results are sequentially stored in area A of the waveform memory, that is, one cycle of waveform calculation is completely completed within the tx section in Figure 3. If the time is slower than the tone period to be read, the progress of the calculation will be output over several periods. This situation is shown in comparison in Figure 4 A and B. This becomes a problem especially when using a CPU chip with a slow calculation processing time, but within a few milliseconds there is no significant effect on the auditory sense. Also, since one waveform pattern changes to the next in synchronization with the output from the waveform pattern switching clock generator, the asynchrony between this clock and the reading speed at the musical tone frequency causes As shown by comparing the cases of WD2 and WD3, the waveform pattern becomes discontinuous. That is, if P1 is address 50 of area A, if the waveform pattern is switched here, area B will be designated and the signal will jump to P2 of area B, that is, address 50+64=114. In this system, the case shown in Fig. 5A is an exception, and the case shown in Fig. 5B is the case in most cases, but this also does not have a large effect on the auditory sense. Computational methods for simulating waveform patterns that can be applied to systems such as the present invention include:
Various methods have been proposed. That is, a polygonal line approximation simulation, a quadratic function approximation simulation, etc. These selections are arbitrary and must be determined in consideration of waveform pattern simulation efficiency, microprocessor processing speed, memory capacity, etc. Then, in the calculation routine block of the flowchart of FIG. 7, the calculation routine selected according to the above conditions may be used. Of course, the contents of the waveform data memory vary depending on which calculation routine is used. Also, the calculation routine can be changed depending on the key. That is, a square function approximation routine is used for keys having complex waveform patterns, and a broken line approximation routine is used for other keys. Now, the operation of the system will be explained with mutual reference to the system block of the present invention shown in FIG. 6 and the flowchart of a microprocessor simulation program applied to the present invention shown in FIG. First, when a key is pressed on the keyboard K1, a key signal is sent to the keyer circuit K3 via the priority circuit K2. From the keyer circuit, the note name code and attack pulse are sent to the line LKC corresponding to the pressed key.
and LKA, respectively. The note name code is sent to the input terminal of the CPU and the note name code latch circuit F3. Then, the note name code is latched to F3 by the attack pulse. F
3 has a function of continuing to send the note name code to the tone frequency address generation circuit F2 even after the key is released. That is, this is for calculating the waveform pattern of the decay section. The attack pulse is sent to the CPU's interrupt signal input terminal. This attack pulse places the microprocessor in an interrupt state. As an interrupt instruction,
If you install a program to execute a jump instruction to the START address, data processing corresponding to the previously pressed key will start as soon as a key is pressed, regardless of the state of the CPU. In this way, the microprocessor starts data processing according to the contents of the simulated program memory SPM, which stores a program having the flow shown in the flowchart of FIG. First, after clearing the register in the CPU for specifying the waveform memory address, waveform memory area A
is specified by a signal from the CPU's output line LMA. Next, preparations are made to read out waveform data corresponding to the note name of the pressed key from the waveform data memory WDM. In other words, from the note name code sent from LKC to the CPU, the waveform data memory
After creating the waveform data storage address corresponding to the note name on the WDM, set it in the waveform data address designation register inside the CPU. As an example, a case will be described in which a key corresponding to the musical tone waveform shown in FIG. 1 is pressed. The note name code of that key sets the waveform data address designation register to designate the address AWD1=0 of the waveform data memory WDM. Therefore, waveform data WD1-1 is first fetched to the CPU.
Next, calculation is started by a calculation routine based on the waveform data WD1-1 fetched from the waveform data memory WDM. When the calculation result is obtained, the address of the waveform memory MW is set on the line using the waveform memory address specification register in the CPU.
After outputting to LA1, the result is output from line LD. In the end, the waveform memory MW stores the calculation result output on the line LD at the address specified by the signal on the line LA1 when the gate G1 is open. When gate G1 is closed, gate G2 is open, and the address line of the waveform memory MW is connected to the output line LA2 of the musical tone frequency generation circuit F2.
It is read out at the musical tone frequency. After this, the addressing register of the waveform memory MW is increased by +1. Then, the process goes through loop Y1 to calculate the next amplitude value. In this way, the loop Y1 continues until the processing of the waveform data WD1-1 fetched from the waveform data memory WDM is completed. When the processing is finished, the flow FLW surrounded by the dotted line in Figure 7
Proceed to. At this point, part of the waveform pattern WD1
The amplitude value of a1a2 is calculated and stored in the waveform memory MW. Then, the judgment routines for FLW1 and FLW2 are all NO, and the process proceeds to Y2. Increase the register for addressing the waveform data memory WDM by +1. Then, through Y4, new waveform data is fetched. In other words, the waveform data at address 1
WD1-2 are fetched to the CPU. Similarly thereafter
The loop Y1 continues until the processing of WD1-2 is completed. And when the process is finished, the flow
Proceed to FLW. At this point, waveform pattern WD1
The amplitude values of parts a1a2 and a2a3 of are calculated and stored in the waveform memory MW. In this way, the amplitude values of a1a2 , a2a3 , a3a4 , etc. are calculated. By the way, the flow FLW is
It has a function to switch the designation of waveform memory areas A and B. That is, when storage of the calculation results in area A is completed, the readout area based on musical tone frequency is switched from B to A. When storage of the calculation results in area B is completed, the readout area based on musical tone frequency is switched from A to B. Also, at this time, the address designation register for the waveform memory is cleared. In both cases, the system waits for the generation of the waveform pattern switching clock, and when the output occurs, it proceeds to calculate the next waveform pattern. That is, returning to the previous example, the waveform data processing from WD1 to WD4 is completed, and the waveform pattern WD1 is
When storage in memory area A is completed, FLW
1 indicates YES and area A is specified, and the specified area A is held immediately after START, and the signal on the output line LA2 of the musical tone frequency address generation circuit F2 is used.
The waveform pattern WD1 is maintained to be read. During this time, when the output of the waveform pattern switching clock occurs, FLW3 becomes YES and returns to the initial state via Y2 and Y4. Thereafter, similarly, the waveform data WD2-1, WD2-
2. When WD2-3, WD2-4, and WD2-5 are processed and the storage of waveform pattern WD2 in area B is completed, FLW2 becomes YES, and the memory area designation changes from area A to area B. On the other hand, waveform pattern WD2 is read out from area B by the signal on output line LA2 of F2. Then, the addressing register for the waveform memory is cleared. During this time, when a waveform pattern switching clock occurs, FLW3 becomes YES, and loops Y2 and Y4
and returns to the initial state. The same applies below. Since the waveform pattern switching clock is synchronized with switching between memory areas A and B, by varying this frequency, the time interval at which the waveform pattern switches can be controlled. That is, the time interval of waveform pattern changes in the attack and decay portions can be controlled. In the present invention, the waveform pattern changes over time, and the attack and decay portions contain waveform data that also includes increases and decreases in amplitude. The partial waveform pattern switching clock generators AC and DC are for this purpose and are input to the CPU through lines LAC and LDC. As described above, the waveform pattern simulation of the attack portion continues, and when the CPU fetches the attack end data at address AAE=28, a steady state is entered. In other words, FLX1 becomes YES, and FLX
Wait at 3. When the pressed key is released, the decay pulse generated on line LKD causes FLX3 to
The last waveform pattern WD6 of the attack section continues to be read out until YES is obtained. Next, when the pressed key is released and the decay pulse arrives, FLX3
YES, and after switching the attack section waveform pattern switching clock to the decay section waveform pattern switching clock via Y3, the program returns via Y4 to fetch the decay section data from the waveform data memory again. In the case of the decay section, waveform memory areas A and B are used alternately in the same way as in the case of attack, and YES is determined in FLX2 by the decay end data of the address ADE=m placed at the end of the waveform data. After clearing the note code latch circuit F3 through the line LCF
HALT, which is a halted state of the CPU, settles down. Now, if another key is pressed while a certain key is being pressed, the priority circuit generates the key code of the subsequently pressed key and a new attack pulse. Then, a new note name code is latched in the note name code latch circuit F3, and an attack pulse is applied to the interrupt terminal, so that the arithmetic processing in progress is immediately stopped and the waveform arithmetic processing corresponding to the key pressed later is performed. Start. An example in which the data length is 8-bit parallel signal and the waveform memory MW is (8 nit x 64 words) x 2 is shown in FIG. 8, and its time chart is shown in FIG. 9. The key code corresponding to the pressed key generated from the keyer circuit K3 is latched in the note name code latch circuit F3, and based on this, the musical tone frequency address generation circuit F2 generates a waveform memory using the musical tone frequency of the pressed key.
A clock signal is created to read out the MW. This is obtained by dividing the output of the high frequency clock generator F1 based on the pitch name code.
It is expressed in the MFC shown in the figure. In this example, one cycle of the waveform pattern is sampled at 64 times, so
If the read musical tone frequency is taken as the frequency, clock signals of 64 frequencies are generated at the output of the MFC. This is
It is MFCO. This output is applied to the monostable multivibrator MM, which outputs MMO. The output pulse width of the MMO is adjusted to the time required to read the waveform memory MW. this
When MMO is "H", that is, at time RT, the waveform memory MW is kept in the READ state. At the same time, gate G2 opens and gate G1 closes, and the signal on line LMA specifying the memory area and MFCO
The address of the waveform memory MW is specified and read out in accordance with the output state LA2 of a counter consisting of flip-flops FF1 to FF6 that counts . On line LMA, area A is specified when an "L" signal is applied, and area B is specified when an "H" signal is applied. The contents of 64 words in each area are then scanned by the output of the counter.
When MMO is "L", that is, at time WT, gate G1 is open and gate G2 is closed, so the address of waveform memory MW is specified according to address signal LA1 from the CPU. Waveform memory MW is WRITE
Since the state is maintained, the data input terminal
Data input from the CPU through line LD can be written to the address specified by LA1. In Figure 9, 1 sample value calculation processing time
In LOOP1, the calculated data D1 is
The data is stored through line LD at address A1 specified through line LA1 by a register in the CPU. This is written during the WT time in the time range where A1 and D1 are output simultaneously. Next, data D2 calculated in LOOP2 is written to address A2 at the same WT time. The same applies below. In the end, according to the output state of the counter that counts MFC through LA2, the waveform memory MW read operation is performed during the RT time of the MMO, and its output is latched into the latch circuit LCH, and at the same time, it is output from the CPU through LA1 during the WT time. The data output through the LD is written into the waveform memory MW according to the address output. The output of the latch circuit LCH passes through a D-A converter DAC and an amplifier AMP, and then is emitted from a speaker SP. The first example is an application of other embodiments to Fig. 2A.
Shown in Figure 0. Figure 10 shows each waveform data.
The MSB is used to share duration data. That is, each time waveform data is read, the MSB of the data is extracted and held in a register in sequence. For example, in the case of WD1, this duration data register is [expression], and in the case of WD2, it is [expression]. On the other hand, a switching clock count register is provided to count the number of waveform pattern switching clocks generated, a routine is provided to compare the contents of both registers, and when the two match, the waveform pattern is switched. This is an example. A flowchart in this case is shown in FIG. The part surrounded by thick lines is the part that is required when this method is applied. The rest is the same as the flowchart in FIG. The system described above has waveform pattern durations tWD1, tWD2, tWD3... as shown in FIG.
... is switched at the output cycle of the waveform pattern switching clock generator, so its duration cannot be changed, but in this embodiment it is also possible to vary this. That is, waveform data memory
The WDM contains duration data information for counting the number of waveform pattern switching clocks generated, and based on this data, the CPU counts the number of waveform pattern switching clocks generated and controls the waveform pattern duration. ing. As described above, the present invention includes a microprocessor, simulated program memory, waveform data memory, waveform memory, clock generator, DA
The hardware consists of a converter, a keyboard, a priority circuit, a keyer circuit, etc., and forms a musical waveform based on waveform data in which the attack part and decay part of a musical tone are divided into a plurality of parts, a waveform data storage means, and the waveform data. From the waveform forming means, an attack portion of a musical tone, a steady portion for repeatedly reading out the final data of the attack portion of a musical tone, and a decay portion of a musical tone are calculated according to a key press signal, and are stored in a waveform memory. Since the tone waveform is read out from , it has the advantage of requiring much less memory capacity than a method that simply samples the amplitude value of the tone waveform from attack to decay, quantizes that value, and stores it as a digital signal. . Another great advantage is that the generation and addition of envelope waveforms can be omitted. Furthermore, since the waveform data reading start address of the waveform data memory is determined from the pitch name code and the waveform data is read by specifying the address of the waveform data memory, it is possible to change the tone color depending on the pitch range. Furthermore, since the attack final waveform is repeatedly read out based on the attack end data and the sound continues until the decay pulse that occurs when the pressed key is released, the memory can be greatly saved in this respect as well.

[Brief explanation of drawings]

Figure 1 is a musical sound waveform diagram of the attack section, Figure 2 A,
B is waveform data, FIGS. 3A and 3B are explanatory diagrams of the configuration of the waveform memory and the writing method, FIGS. 4 and 5 are examples of musical sound waveforms read by the writing method shown in FIG. 3,
FIG. 6 is a system block diagram according to the present invention, and FIG.
The figure is a flowchart of the simulated program memory in Figure 6, Figures 8 and 9 are specific example circuit diagrams of the main parts of the present invention and their time charts, and Figures 10 and 11 are waveform data. and a flowchart of a simulated program in this case. K1...keyboard, K2...priority circuit, K3...keyer circuit, AC...attack section waveform pattern switching clock generator, DC...decay section waveform pattern switching clock generator, CPU...microphone
Processor, SPM...simulated program memory, WDM...waveform data memory, CPUC...
...CPU clock generator, F1...High frequency clock generator, F2...Musical tone frequency address generation circuit, F3...Tone name code latch circuit, G1, G2
...Gate circuit, MW...Waveform memory, LCH...
...Latch circuit, DAC...D-A converter.

Claims (1)

[Scope of Claims] 1. Waveform data storage means that divides a musical tone from generation to end into a plurality of parts, and stores waveform data to which an envelope is added for each divided part; a duration information storage means for storing duration information corresponding to a duration time; a tone waveform forming means for forming a tone waveform based on the waveform data for each of the segmented parts from the waveform data storage means; As time elapses from the start of generation of musical tones, the waveform data is sequentially read out from the waveform data storage means for each of the divided parts and supplied to the musical sound waveform forming means, and the duration information is also read out from the duration information storage means. a first control means for sequentially reading out information for each section; and a first control means for sequentially reading out information for each section; a second control means for controlling the duration of each of the divided parts by switching to the waveform data of the divided part, and the second control means controls the duration of each of the divided parts regarding the attack part. attack switching signal generating means for generating an attack waveform switching signal for switching waveform data; and a decay switching signal generating means for generating a decay waveform switching signal for switching the waveform data for each part related to the decay part among the divided parts. An electronic musical instrument, further comprising: means for generating musical tones by controlling the duration of each of the divided sections according to each of the attack section and the decay section.