JPH026122B2 - - Google Patents

Info

Publication number
JPH026122B2
JPH026122B2 JP2080782A JP2080782A JPH026122B2 JP H026122 B2 JPH026122 B2 JP H026122B2 JP 2080782 A JP2080782 A JP 2080782A JP 2080782 A JP2080782 A JP 2080782A JP H026122 B2 JPH026122 B2 JP H026122B2
Authority
JP
Japan
Prior art keywords
oscillation
state
oscillating
recording
recording bias
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP2080782A
Other languages
Japanese (ja)
Other versions
JPS58139306A (en
Inventor
Juji Komori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP2080782A priority Critical patent/JPS58139306A/en
Priority to GB08303589A priority patent/GB2117554B/en
Priority to US06/465,632 priority patent/US4590525A/en
Priority to DE19833304797 priority patent/DE3304797A1/en
Publication of JPS58139306A publication Critical patent/JPS58139306A/en
Publication of JPH026122B2 publication Critical patent/JPH026122B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/02Recording, reproducing, or erasing methods; Read, write or erase circuits therefor

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は複数のカセツトテープレコーダを一
体に収納してなるテープレコーダ装置に係り、特
にその録音バイアス発振回路の改良に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a tape recorder device in which a plurality of cassette tape recorders are integrally housed, and particularly to improvements in its recording bias oscillation circuit.

〔発明の技術的背景〕[Technical background of the invention]

近時、録音および再生等を種々の形態で機能的
に使い勝手を良くすべく二台のカセツトテープレ
コーダを一体に収納してなるいわゆるダブルカセ
ツトテープレコーダが開発されている。
In recent years, a so-called double cassette tape recorder has been developed in which two cassette tape recorders are housed together in order to improve the functionality and usability of recording and playback in various forms.

第1図はかかるダブルカセツトテープレコーダ
の録音バイアス回路として従来より知られている
ものを示している。すなわち、これはそれぞれ録
音ヘツドRH1,RH2および消去ヘツドEH1,EH2
に対する出力部を有して互いに独立した2系統の
録音バイアス発振回路部I,を備えてなるもの
で、図示しない電源供給用の録音再生切換スイツ
チ回路によつていずれか一方が選択的にあるいは
双方が同時に発振状態となる如く切換えられて使
用される如く構成されている。
FIG. 1 shows a conventionally known recording bias circuit for such a double cassette tape recorder. That is, this corresponds to recording heads RH 1 , RH 2 and erase heads EH 1 , EH 2 respectively.
The system is equipped with two independent recording bias oscillation circuit sections I, each having an output section for the output section, and one or both of them can be selectively switched on or off by a recording/playback switch circuit (not shown) for power supply. The structure is such that the two are switched and used so that they are in an oscillating state at the same time.

〔背景技術の問題点〕[Problems with background technology]

しかしながら、このような従来の録音バイアス
発振回路にあつては、特には双方の発振回路部
I,を同時に発振状態とする場合に、各々の発
振出力が干渉し合う結果、各々の発振周波数の差
に応じたビート成分が発生して、それがそのまま
録音されてしまう如くした重大な問題を有してい
た。
However, in such a conventional recording bias oscillation circuit, especially when both oscillation circuit sections I are brought into oscillation state at the same time, the oscillation outputs of each interfere with each other, resulting in a difference in the oscillation frequencies. There was a serious problem in that a beat component corresponding to the sound was generated and was recorded as is.

これは、限られたスペース内に収納されるため
に、双方の発振回路部が比較的至近距離内に配置
されるのが実情であつて通常のシールド技術によ
つては防止し得ないものである。
This is because both oscillation circuits are placed relatively close to each other in order to be housed in a limited space, and this cannot be prevented using normal shielding technology. be.

このため、双方の発振回路部の発振周波数を可
及的に同一とすることが望まれるが、実際上は各
素子定数のばらつき等によつて単純には同一とし
得ないのが実情である。
For this reason, it is desired that the oscillation frequencies of both oscillation circuit sections be made the same as possible, but in reality, it is not possible to simply make them the same due to variations in the constants of each element.

また、上述した如き従来のバイアス回路にあつ
ては、一方を発振状態とし且つ他方を非発振状態
とした場合に、非発振側の発振回路部が発振側の
発振回路部と特にその発振コイル部等で電磁結合
されることによつて寄生発振出力を生じてしまう
ので、本来発振出力を必要としない側の磁気ヘツ
ドに発振出力が供給されてしまう如くした不所望
な事態を招来していた。これは双方の発振回路部
の発振周波数が可及的に同一となるようになされ
ていることによつて増長される。
In addition, in the conventional bias circuit as described above, when one side is in an oscillating state and the other is in a non-oscillating state, the oscillating circuit section on the non-oscillating side is connected to the oscillating circuit section on the oscillating side, especially its oscillating coil section. Since a parasitic oscillation output is generated due to electromagnetic coupling between the magnetic heads and the like, an undesirable situation has arisen in which the oscillation output is supplied to a magnetic head that does not originally require the oscillation output. This is enhanced by the fact that the oscillation frequencies of both oscillation circuit sections are made as similar as possible.

〔発明の目的〕[Purpose of the invention]

そこで、この発明は複数系統の録音バイアス発
振回路部のうち少なくとも一つを発振状態とし且
つ少なくとも一つを非発振状態とする場合に、非
発振側の発振回路部が発振側の発振回路部と電磁
結合して生じる寄生発振出力の影響を受けないよ
うにした極めて良好な録音バイアス発振回路を提
供することを目的としている。
Therefore, in the present invention, when at least one of the recording bias oscillation circuit sections of multiple systems is set to an oscillating state and at least one is set to a non-oscillating state, the oscillating circuit section on the non-oscillating side is connected to the oscillating circuit section on the oscillating side. It is an object of the present invention to provide an extremely good recording bias oscillation circuit that is not affected by parasitic oscillation output caused by electromagnetic coupling.

〔発明の概要〕[Summary of the invention]

すなわち、この発明による録音バイアス発振回
路は、複数のカセツトテープレコーダを一体に収
納してなるテープレコーダ装置において、各テー
プレコーダ毎に設けられる複数系統の録音バイア
ス発振回路部のうち少なくとも一つを発振状態と
し且つ少なくとも一つを非発振状態とする場合
に、非発振側の発振回路部が発振側の発振回路部
と電磁結合して生じる寄生発振出力の影響を受け
ないように、例えば非発振側の発振コイルをQダ
ンプして電磁結合をなくすようにしたり、あるい
は非発振側の出力端を開放または短絡したりする
ことにより、実質的に非発振側の発振回路部に生
じる寄生発振出力を阻止する構成を採用した点に
特徴を有している。
That is, the recording bias oscillation circuit according to the present invention oscillates at least one of the plurality of systems of recording bias oscillation circuit units provided for each tape recorder in a tape recorder device that integrally houses a plurality of cassette tape recorders. state and at least one is in a non-oscillating state, for example, the non-oscillating side is By Q-dumping the oscillation coil to eliminate electromagnetic coupling, or by opening or shorting the output terminal on the non-oscillation side, parasitic oscillation output that occurs in the oscillation circuit section on the non-oscillation side can be effectively prevented. It is distinctive in that it adopts a configuration that

〔発明の実施例〕[Embodiments of the invention]

以下図面を参照してこの発明の一実施例につき
詳細に説明する。
An embodiment of the present invention will be described in detail below with reference to the drawings.

第2図に示すように、2系統の録音バイアス発
振回路部I,はそれぞれ発振用トランジスタ
Q1,Q2に接続される発振コイルL1,L2と同調コ
ンデンサC6,C7とで発振周波数が決定されるも
ので、発振用の帰還コンデンサC2,C3およびC4
C5を備えている。そして、両トランジスタQ1
Q2のベース間に同期用コンデンサC1が接続され
ていることによつて、互いにトリガがかけられた
状態で同期して同一の発振周波数で発振されるこ
とになる。
As shown in Figure 2, the two recording bias oscillation circuit sections I each have oscillation transistors.
The oscillation frequency is determined by the oscillation coils L 1 and L 2 connected to Q 1 and Q 2 and the tuning capacitors C 6 and C 7 , and the oscillation feedback capacitors C 2 , C 3 and C 4 ,
Equipped with C5 . And both transistors Q 1 ,
By connecting the synchronizing capacitor C 1 between the bases of Q 2 , they oscillate at the same oscillation frequency in synchronization with each other when they are triggered.

なお、以上の状態は各トランジスタQ1,Q2
対する駆動電圧を選択的に供給する録音再生切換
スイツチS1,S2が共に録音REC側にある場合を
想定して説明したが、該スイツチS1,S2の選択的
な操作によりいずれか一方のみを録音REC側と
し且つ他方を再生PLAY側としたり、双方を再生
PLAY側としたりして上記2系統の発振回路部
I,を適宜な形態で使い分けすることができる
のは勿論である。
The above state has been explained assuming that the recording and playback switches S 1 and S 2 that selectively supply the drive voltage to each transistor Q 1 and Q 2 are both on the recording REC side. By selectively operating 1 and S 2 , you can set only one of them to the recording REC side and the other to the playback PLAY side, or play both.
It goes without saying that the two systems of oscillation circuit sections I can be used in an appropriate manner, such as on the PLAY side.

次に、以上のうち二つの発振回路部I,のう
ち一方を発振状態(つまりスイツチS1が録音
REC側)とし且つ他方を非発振状態(つまりス
イツチS2が再生REC側)とする場合について説
明する。
Next, set one of the two oscillation circuit sections I to the oscillation state (that is, switch S 1 is set to recording).
REC side) and the other side is in a non-oscillating state (that is, switch S2 is on the reproduction REC side).

すなわち、この場合非発振側の発振回路部は
スイツチS2が再生PLAY側にあることにより、ト
ランジスタQ2に対する駆動電圧が供給されない
ので自らが非発振状態に保たれるものであるが、
これと同時に発振コイルL2の一次側両端がスイ
ツチS2を介して短絡されてQダンプされた状態に
あるので、発振側の発振回路部Iとの電磁結合が
生じないように保たれている。これによつて、非
発振側の発振回路部は電磁結合に起因する不所
望な寄生発振が生じないようになされているの
で、当該再生REC側の各ヘツドRH2,EH2に必
要のない発振出力を供給することがないものであ
る。
That is, in this case, the oscillation circuit section on the non-oscillating side maintains itself in a non-oscillating state because the switch S2 is on the reproduction PLAY side, and the drive voltage to the transistor Q2 is not supplied.
At the same time, both ends of the primary side of the oscillation coil L2 are short-circuited via the switch S2 and are in a Q-dumped state, so that electromagnetic coupling with the oscillation circuit section I on the oscillation side is prevented from occurring. . This prevents unnecessary parasitic oscillations caused by electromagnetic coupling in the oscillation circuit section on the non-oscillating side, so that unnecessary oscillations are prevented from occurring in each head RH 2 and EH 2 on the reproduction REC side. It does not provide any output.

なお、上述とは反対にスイツチS1を再生PLAY
側とし、且つスイツチS2を録音REC側とする場
合も上述に準じて説明し得ることは勿論である。
In addition, contrary to the above, playing Switch S 1 PLAY
It goes without saying that the above explanation can also be applied to the case where the switch S2 is set to the recording side and the switch S2 is set to the recording REC side.

第3図は他の実施例を示すもので、この場合各
スイツチS1,S2の再生PLAY側でそれぞれ抵抗
R1,R2を挿入したQダンプがなされるようにし
た以外は第2図の場合と同様である。
Figure 3 shows another embodiment, in which a resistor is installed on the playback side of each switch S 1 and S 2 .
The process is the same as in FIG. 2 except that a Q dump with R 1 and R 2 inserted is performed.

第4図もまた他の実施例を示すもので、この場
合各スイツチS1,S2にそれぞれ対応して連動する
スイツチS1′,S2′の各再生PLAY側で、各発振回
路部I,における発振コイルL1,L2の二次側
を短絡してQダンプをなすようにした以外は第2
図の場合と同様である。
FIG . 4 also shows another embodiment , in which each oscillation circuit section I , except that the secondary sides of oscillation coils L 1 and L 2 in , were short-circuited to create a Q dump.
This is the same as the case shown in the figure.

なお、この発明は上記し且つ図示した実施例お
よび具体例のみに限定されることなく、この発明
の要旨を逸脱しない範囲で種々の変形や適要が可
能であることは言う迄もない。
It goes without saying that this invention is not limited to the embodiments and specific examples described above and illustrated, and that various modifications and adaptations can be made without departing from the gist of the invention.

〔発明の効果〕〔Effect of the invention〕

従つて、以上詳述したようにこの発明によれ
ば、複数系統の録音バイアス発振回路部のうち少
なくとも一つを発振状態とし且つ少なくとも一つ
を非発振状態とする場合に、非発振側の発振回路
部が発振側の発振回路部と電磁結合して生じる寄
生発振出力の影響を受けないようにした極めて良
好な録音バイアス発振回路を提供することが可能
となる。
Therefore, as detailed above, according to the present invention, when at least one of the recording bias oscillation circuit sections of the plurality of systems is in the oscillating state and at least one is in the non-oscillating state, the oscillation on the non-oscillating side It is possible to provide an extremely good recording bias oscillation circuit in which the circuit section is not affected by parasitic oscillation output caused by electromagnetic coupling with the oscillation circuit section on the oscillation side.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の録音バイアス発振回路を示す構
成説明図、第2図はこの発明による録音バイアス
発振回路の一実施例を示す構成説明図、第3図、
第4図は同じく他の異なる実施例を示す構成説明
図である。 I,……録音バイアス発振回路部、S1,S2
…スイツチ、L1,L2……発振コイル。
FIG. 1 is a configuration explanatory diagram showing a conventional recording bias oscillation circuit, FIG. 2 is a configuration explanatory diagram showing an embodiment of a recording bias oscillation circuit according to the present invention, and FIG.
FIG. 4 is a configuration explanatory diagram showing another different embodiment. I... Recording bias oscillation circuit section, S 1 , S 2 ...
...Switch, L 1 , L 2 ...Oscillation coil.

Claims (1)

【特許請求の範囲】[Claims] 1 少なくとも第1および第2のテープレコーダ
を一体に収納してなるテープレコーダ装置におい
て、前記第1および第2のテープレコーダ毎に設
けられ、それぞれ発振用の各トランジスタQ1
Q2に接続される発振コイルL1,L2と該発振コイ
ルに接続される同調コンデンサC6,C7とで発振
周波数が決定されるもので、発振用の帰還コンデ
ンサC2,C3,C4,C5を有すると共に、前記各ト
ランジスタのベース間に同期用コンデンサC1
接続されることにより略同一の発振周波数で発振
する第1および第2の録音バイアス発振回路I,
と、この第1および第2の録音バイアス発振回
路を各別に発振状態または非発振状態に切換える
第1および第2のスイツチS1,S2とを具備し、前
記第1および第2のスイツチの各非発振状態側で
前記第1および第2の録音バイアス発振回路の各
発振コイルの一次側または二次側を直接的または
抵抗を介して短絡することにより、前記第1およ
び第2の録音バイアス発振回路の一方が発振状態
で且つ他方が非発振状態のとき、非発振状態側の
録音バイアス発振回路が発振状態側の録音バイア
ス発振回路との電磁結合による寄生発振を阻止す
るように構成したことを特徴とする録音バイアス
発振回路。
1. In a tape recorder device in which at least a first and a second tape recorder are integrally housed, each transistor Q 1 for oscillation is provided for each of the first and second tape recorders, respectively.
The oscillation frequency is determined by the oscillation coils L 1 , L 2 connected to Q 2 and the tuning capacitors C 6 , C 7 connected to the oscillation coils, and the oscillation feedback capacitors C 2 , C 3 , C 4 and C 5 , and a synchronizing capacitor C 1 is connected between the bases of the respective transistors, thereby oscillating at substantially the same oscillation frequency.
and first and second switches S 1 and S 2 that individually switch the first and second recording bias oscillation circuits into an oscillating state or a non-oscillating state, By short-circuiting the primary side or the secondary side of each oscillation coil of the first and second recording bias oscillation circuits directly or via a resistor on each non-oscillation state side, the first and second recording biases can be adjusted. When one of the oscillation circuits is in an oscillation state and the other is in a non-oscillation state, the recording bias oscillation circuit on the non-oscillation state side is configured to prevent parasitic oscillation due to electromagnetic coupling with the recording bias oscillation circuit on the oscillation state side. A recording bias oscillation circuit featuring:
JP2080782A 1982-02-12 1982-02-12 Sound recording bias oscillating circuit Granted JPS58139306A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2080782A JPS58139306A (en) 1982-02-12 1982-02-12 Sound recording bias oscillating circuit
GB08303589A GB2117554B (en) 1982-02-12 1983-02-09 A recording bias oscillating circuit
US06/465,632 US4590525A (en) 1982-02-12 1983-02-10 Recording bias oscillating circuit
DE19833304797 DE3304797A1 (en) 1982-02-12 1983-02-11 RECORDING PRE-MAGNETIZING OSCILLATOR CIRCUIT ARRANGEMENT

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2080782A JPS58139306A (en) 1982-02-12 1982-02-12 Sound recording bias oscillating circuit

Publications (2)

Publication Number Publication Date
JPS58139306A JPS58139306A (en) 1983-08-18
JPH026122B2 true JPH026122B2 (en) 1990-02-07

Family

ID=12037304

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2080782A Granted JPS58139306A (en) 1982-02-12 1982-02-12 Sound recording bias oscillating circuit

Country Status (1)

Country Link
JP (1) JPS58139306A (en)

Also Published As

Publication number Publication date
JPS58139306A (en) 1983-08-18

Similar Documents

Publication Publication Date Title
JPH026122B2 (en)
EP0150968A1 (en) Cue signal recording circuit for magnetic recording and reproducing apparatus
JPS58139308A (en) Sound recording bias oscillating circuit
US6385391B1 (en) Video tape reproducing apparatus
JPS62266702A (en) Drum device for magnetic recording and reproducing device
JPH0441445Y2 (en)
JPS61224106A (en) Magnetic recording and reproducing device
JP2966631B2 (en) Recording device
KR950000356Y1 (en) Audio dubing circuit
JPS58139309A (en) Sound recording bias oscillating circuit
JPS6348088B2 (en)
JP2828827B2 (en) Recording and playback device
JPH073497Y2 (en) Signal transmission control circuit for recording or reproducing device
JPH0538403Y2 (en)
JPS6180503A (en) Reproducing preamplifier circuit
JPS58139307A (en) Sound recording bias oscillation circuit
JPS61134905A (en) Bias oscillator
JPS6231406B2 (en)
JPH02134706A (en) Flexible disk recording/playback circuit
JPS63285705A (en) double cassette tape recorder
JPS63249902A (en) rotating head device
JPS6278977A (en) magnetic recording and reproducing device
JPS6150239A (en) Information signal recording and reproducing device
JPH04114302A (en) Resonant frequency setting circuit for head playback system
JPH04132001A (en) Recording/reproduction circuit