JPH0263020A - Active matrix type liquid crystal display element - Google Patents

Abstract

PURPOSE:To minimize a decrease in light transmissivity and to obtain such picture quality that a display is bright and a flicker is small by prescribing an opening area by a pattern for a capacity forming electrode formed of a light shield material on an array substrate. CONSTITUTION:A light shield layer 37 has the specific opening part corresponding to a display picture element electrode 25 and covers the substrate completely except the display picture element electrode 25. Further, the contour line 44 of the opening part which is prescribed by the pattern of the light shield layer 37 is put within the pattern of the capacity forming electrode 28. The width L1 indicates the gap between the outer periphery of the capacity forming electrode 28 and the contour line 44 and the width L2 indicates the gap between the inner periphery of the capacity forming electrode 28 and the contour line 44. Those widths L1 and L2 are set preferably to size larger than the sticking accuracy between the array substrate and a counter substrate 38. Consequently, the opening area can be increased and the picture quality of a bright display with a small flicker is obtained.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a thin film transistor (Thin Film Transistor).
The present invention relates to an active matrix type liquid crystal display element in which a display pixel electrode array is configured using TFT> as a switch element.

(Prior Art) In recent years, with regard to display elements using liquid crystals, active matrix type display elements with large capacity and high density are being actively developed and put into practical use for use in television displays, graphic displays, and the like. In such display elements, semiconductor switches are used as means for driving and controlling each pixel so that high contrast display without crosstalk can be performed. As the semiconductor switch, a TPT or the like formed on a transparent insulating substrate is usually used because it is capable of transmissive display and can easily be made into a large area.

FIG. 2 is a simple circuit diagram showing one pixel of a liquid crystal display element using a display pixel electrode array equipped with TPT. In the figure, a TFT 3 is provided at each intersection of a scanning line 1 and a signal line 2 that intersect, the gate of the TFT 3 is connected to the scanning line 1 for each row, and the drain of the TPT 3 is connected to the signal line 2 for each column. has been done. Further, the source of the TFT 3 is connected to a display pixel electrode 4, and a liquid crystal layer 6 is sandwiched between the display pixel electrode 4 and the counter electrode 5.

Next, a method of driving this liquid crystal display element will be explained.

That is, the scanning line selection voltage (Vlj, O
n) is applied (switching period), the potential of the display pixel electrode 4 is set to the same potential as the video signal potential, and a scanning line non-selection voltage (Vq, off) is applied to the gate of the TFT 3.
) is applied, the display pixel electrode 4 holds this potential. As a result, a potential difference corresponding to the video signal voltage is applied to the liquid crystal layer 6 sandwiched between the display pixel electrode 4 and the counter electrode 5 set at a predetermined potential. Then, by changing the arrangement state of the liquid crystal layer 6 in accordance with this potential difference, the light transmittance of this portion also changes, and an image is displayed. Furthermore, if the liquid crystal layer 6 is driven with direct current, it will deteriorate due to electrolysis of liquid crystal molecules and its life will be shortened, so it is driven with alternating current. - For boat fishing, alternating current driving is performed by setting the potential of the counter electrode 5 to a direct current potential, and setting the video signal voltage symmetrically with respect to the potential of the counter electrode 5 in positive and negative frames in even and odd frames. That is, the video signal voltage is the sum of a certain DC voltage (VSC) and an AC voltage (VSa) that is symmetrical in positive and negative directions and corresponds to the video signal.

By the way, as shown in FIG. 2, a parasitic capacitance 1 (Cgs) exists between the gate and source of the TPT3.

Because of this Cqs, the scanning signal voltage changes from vg,on to vg
.

When switched off, the display pixel electrode 4 is shifted to the negative side by Δ■p due to capacitance division. This shift amount is △
vp~ΔV(If *CfjS/ (CC1s〇Ic
). Here, Δvg=vg, onyg
, orr, and C1c represents the capacitance of the liquid crystal layer 6. Therefore, by shifting the potential of the counter electrode 5 to the negative side by this amount (p), the voltage applied to the liquid crystal layer 6 is made equal in even and odd frames.

(Problem to be Solved by the Invention) However, since the CIC exhibits a capacitance change with respect to the applied voltage, the value of ΔVp differs for each video signal. That is, the optimal counter electrode potential differs for each video signal. Generally, the counter electrode potential is set to the same potential for all pixels at the same time, so in a display screen where various video signal voltages are applied, it is not possible to set the optimal counter electrode potential for all pixels at the same time. . As a result, flicker occurs, which is flickering on the display screen.

FIG. 3 is a simple circuit diagram showing one pixel of a liquid crystal display element, which is described in, for example, Japanese Unexamined Patent Publication No. 56-162793 and is capable of solving the above-mentioned problems. In the figure, parts corresponding to those in Figure 3 are given the same reference numerals, and the storage capacitor (C3) does not change in capacitance with respect to the applied voltage.
By newly inserting ΔVp in parallel with the CIC, the dependence of ΔVp on the video signal voltage can be reduced. As a result, flicker can be reduced compared to the example shown in FIG.

FIG. 4 is a plan view for explaining the planar structure of one pixel on the display pixel electrode array substrate of the liquid crystal display element shown in FIG. 3. FIG. As shown in the figure, TFTlo is composed of a gate electrode 12 integrated with a scanning line 11, a drain electrode 14 integrated with a signal line 13, a source electrode 16 connected to a display pixel electrode 15, and a semiconductor layer 17. There is. Further, in a direction approximately parallel to the scanning line 11, an auxiliary capacitance forming wiring 18 is formed so as to partially face the display pixel electrode 15 with an insulating film (not shown) interposed therebetween. An additional storage capacitor (C3) is obtained at the overlapped portion between the storage capacitor 15 and the auxiliary capacitor forming wiring 18.

In FIG. 4, the auxiliary capacitance forming wiring 18 is formed of a transparent conductive film or a light-shielding metal film. When the auxiliary capacitance forming wiring 18 is formed of a transparent conductive film, the number of film forming steps and photolithography steps is increased, and there are many drawbacks in the manufacturing process. On the other hand, when the auxiliary capacitance forming wiring 18 is formed of a light-shielding metal film, the opening area, which is the area of the portion through which light passes, decreases, which directly leads to a decrease in the light transmittance of the liquid crystal display element.

This invention was made in view of such circumstances.

[Structure of the Invention] (Means for Solving the Problems) This invention arranges one pixel consisting of a TPT and a pixel electrode connected thereto in a matrix on one main surface of an insulating substrate, and an array substrate provided with a capacitor-forming electrode made of a light-shielding material that faces a pixel electrode with an insulating film interposed therebetween; a counter substrate formed with a common electrode and a light-shielding layer formed on one principal surface of the insulating substrate; This invention relates to an active matrix type liquid crystal display element including a liquid crystal sandwiched between an array substrate and a counter substrate, which are sandwiched between a gap obtained by combining an array substrate and a counter substrate such that their surfaces face each other. In a projection view of one pixel onto one main surface of the opposing substrate, the array configuration is such that the outline of the opening defined by the pattern of the light shielding layer falls within the pattern of the capacitor forming electrode.

(Function) In an active matrix liquid crystal display element using TPT, when no capacitance forming electrode is formed, or when the fourth
In the case of the example shown in the figure, the light shielding layer pattern on the counter substrate is designed to prevent the contrast ratio from decreasing even if the bonding between the array cover plate and the counter substrate deviates within the precision range. It is formed to cover a portion other than the electrode pattern, that is, a portion through which light not modulated by the liquid crystal layer passes. Specifically, the light shielding layer pattern on the counter substrate is formed so as to overlap the peripheral portion of the display pixel electrode pattern by the amount of bonding accuracy. Therefore, an invalid area that does not contribute to display exists at the outer periphery of the display pixel electrode pattern.

In this invention, this invalid area is used as an additional storage capacity (Cs
) is used for the formation of

(Example) Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a diagram showing an embodiment of the present invention, and FIG.
> represents a plan view of one pixel portion on the array substrate, FIG. In FIG. 1(a), a thin film transistor (TPT) 20 is connected to a gate electrode 22 integrated with a scanning line 21, a drain electrode 4fA 24 integrated with a signal line 23, and a display pixel electrode 25, as in the case of FIG. The semiconductor layer 27 includes a source electrode 26 and a semiconductor layer 27. Further, a capacitor forming electrode 28 is formed near the TPT 20 so as to extend linearly in a direction substantially parallel to the scanning line 21 and surround the display pixel electrode 25 with an insulating film (not shown) interposed therebetween. An additional storage capacity is formed at the overlapped portion of the display pixel electrode 25 and the capacitance forming electrode 28! (C
s) is obtained.

FIG. 1(b) corresponds to the AA section in FIG. 1(a) when viewed from the direction of the arrow. In FIG. 1(b), on one main surface of an insulating substrate 30 made of glass, for example, a Cr (chromium) film, which is a light-shielding material, is coated by sputtering, and then photo-etched into a predetermined shape. The gate electrode 22 and the capacitor forming electrode 28 are simultaneously formed by this process, and furthermore, a gate insulating film 31 made of silicon oxide (SiQx), for example, is formed by plasma CVD to cover this.
It is formed by the D method. Although not shown, when the gate electrode 22 and the capacitor forming electrode 28 are formed, the scanning line 21 is also formed in the same process. Further, the gate insulator 11131 is an insulating film interposed between the capacitor forming electrode 28 and the display pixel electrode 25 in FIG. 1(a). In a portion of the gate insulating film 31 facing the gate electrode 22, a semiconductor layer 27 made of, for example, i-type hydrogenated amorphous silicon (a-8i:H) is formed using a plasma CVD method. Further, on the semiconductor layer 27 are n-type a-8i layers electrically isolated from each other:
A drain region 32 and a source region 33 made of H are also provided using the plasma CVD method. Then, on the gate insulating film 31 adjacent to the source region 33 side of the semiconductor layer 27, for example, ITO (indium tin) is deposited.
A display pixel electrode 25 is provided by coating an oxide film by sputtering and then photo-etching it into a predetermined shape. Furthermore, one end of the source electrode 26 is connected to the source region 33, and the other end of the source electrode 26 extends over and is connected to the display pixel electrode 25. Furthermore, one end of the drain electrode 24 is connected to the train region 32 . Here, the drain electrode 24 and the source electrode 26 are
For example, an MO (molybdenum) film and an AI (aluminum) film are sequentially coated by a sputtering method, and are formed by the same process of photo-etching into a predetermined shape. Signal line 2 in figure (a)
3 is also formed in the same process as the drain electrode 24 and the source and source electrodes 26. In this way, the desired array substrate 34 is obtained. On the other hand, -1 of the insulating substrate 35 made of glass, for example.
A common electrode 36 made of, for example, ITO and a light shielding layer 37 as a black matrix made of, for example, A1 (aluminum) are sequentially formed on the surface, thereby forming a counter substrate 38 . Then, - of the array substrate 34
An alignment film 39 made of, for example, low-temperature cure type polyimide (PI) is further formed on the entire surface of the first surface, and an alignment film 39 made of, for example, low-temperature cure type polyimide (PI) is also formed on the entire surface of the opposite substrate 38. An alignment film 40 made of polyimide is formed.

Then, on the −1 plane of the array substrate 34 and the counter substrate 38,
By rubbing each of the alignment films 39 and 40 in a predetermined direction with a cloth or the like, alignment treatment by rubbing is performed, respectively. Furthermore, the array substrate 34 and the counter substrate 38 have one main surface facing each other, and their orientation axes are approximately 90'.
The liquid crystal 41 is sandwiched in the gap thus obtained. And array board 3
4 and the other main surface side of the counter substrate 38, there are polarizing plates 42, respectively.
．． 43 is adhered to the array substrate 34 and the counter substrate 3.
8, illumination is performed from the other main surface side.

FIG. 1(C) shows a schematic projection of a portion corresponding to FIG. 1(a) onto the -1 plane of the opposing substrate 38.

In FIG. 1(C), the light shielding layer 37 has a predetermined opening corresponding to the display pixel electrode 25 in FIG. 1(a), and completely covers the portion other than the display pixel electrode 25. Further, the outline 44 of the opening defined by the pattern of the light shielding layer 37 is arranged to fit within the pattern of the capacitor forming electrode 28. Furthermore, in FIG. 1(C),
The width L1 indicates the distance between the outer periphery of the capacitance forming N pole 28 and the contour line 44, while the width L2 indicates the distance between the capacitance forming N electrode 28 and the contour line 44.
The distance between the inner periphery of the contour line 44 and the contour line 44 is shown. This width L1
．． It is desirable that both L2 be set to a dimension that is greater than the bonding accuracy of the array substrate 34 and the counter substrate 38. The reason for this is that when the width is L1, the array substrate 34 and the counter substrate 38
This is to prevent a decrease in contrast ratio due to misalignment between the array substrate 34 and the counter substrate 38, and in the case of the width L2, to eliminate or reduce variations in the opening area due to misalignment between the array substrate 34 and the counter substrate 38.

In this embodiment, the capacitor-forming electrode 28 and the light-shielding layer 37 are arranged so that the outline 44 of the opening defined by the pattern of the light-shielding layer 37 falls within the pattern of the capacitor-forming electrode 28.
By devising the shape of the display pixel electrode 25, an additional capacity ff1 (C3
) can be formed. As a result, the capacitance forming electrode 2
Even when a metal film is selected as the material of No. 8, instead of a transparent conductive film that requires an additional photolithography process, the opening area can be increased. Therefore, in this embodiment, the display is brighter and the image quality with less flicker can be obtained compared to the conventional display.

Note that in this embodiment, the capacitance forming electrode 28 is connected to the scanning line 2.
Although the signal line 23 is formed at the same time as the 1-Y gate electrode 22, if it faces the display pixel electrode 25 with an insulating film interposed therebetween, the signal line 23
It goes without saying that they may be formed at the same time.

[Effects of the Invention] This invention forms an additional storage capacitor ff1 (Cs) with a metal film by defining an opening area with a pattern of a capacitance forming electrode made of a light-shielding material formed on an array substrate. Even when this happens, the decrease in light transmittance can be kept to a minimum, and a bright display with less flickering can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an embodiment of the present invention, FIGS. 2 and 3 are schematic circuit diagrams showing an example of one pixel of a conventional active matrix type liquid crystal display element, and FIG. 4 is a diagram showing an example of a conventional active matrix type liquid crystal display element. FIG. 2 is a diagram for explaining a planar structure of one pixel on an array substrate of a liquid crystal display element. 20... Thin film transistor 25... Display pixel electrode 28... Capacitor formation electrode 30.35... Insulating substrate 34... Array substrate 36... Common electrode 37... Light shielding layer 38... Opposing substrate 41...Liquid crystal 44...Contour line Agent Patent attorney Nori Chika Ken Yudo Kikuo Takehana Figure 1 (a) Figure 1

Claims (1)

[Claims] One pixel consisting of a thin film transistor and a display pixel electrode connected thereto is arranged in a matrix on one main surface of an insulating substrate, and each pixel is opposed to the display pixel electrode with an insulating film interposed therebetween. an array substrate provided with a capacitor-forming electrode made of a light-shielding material; and a light-shielding layer having a common electrode and a predetermined opening corresponding to the display pixel electrode formed on one main surface of the insulating substrate. In an active matrix liquid crystal display element comprising a counter substrate and a liquid crystal sandwiched between a gap obtained by combining the array substrate and the counter substrate so that the one principal surface sides thereof face each other, the one pixel includes: is a projection view onto the one main surface of the counter substrate, wherein the outline of the opening defined by the pattern of the light-shielding layer falls within the pattern of the capacitance forming electrode. type liquid crystal display element.