JPH0263821A - Laminated plate - Google Patents
Laminated plateInfo
- Publication number
- JPH0263821A JPH0263821A JP21723088A JP21723088A JPH0263821A JP H0263821 A JPH0263821 A JP H0263821A JP 21723088 A JP21723088 A JP 21723088A JP 21723088 A JP21723088 A JP 21723088A JP H0263821 A JPH0263821 A JP H0263821A
- Authority
- JP
- Japan
- Prior art keywords
- prepreg
- thermal expansion
- epoxy resin
- expansion coefficient
- base material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
- H05K1/036—Multilayers with layers of different types
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
- H05K1/0366—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
Landscapes
- Laminated Bodies (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、抵抗、IC等のチップ部品の面実装用プリン
ト配線板として適した積層板に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a laminate suitable as a printed wiring board for surface mounting of chip components such as resistors and ICs.
従来の技術
近年、電子機器の小型軽量化、高密度化の点より、これ
に組込んで使用される電子部品はリード付部品からチッ
プ部品へ急速に移行している。そして、その実装方式も
プリント配線板への面実装が主流になりつつある。この
背景の中で、プリント配線板の材料である銅張積層板に
対して、次のような厳しい特性が要求されてきた。BACKGROUND OF THE INVENTION In recent years, as electronic devices have become smaller, lighter, and more dense, electronic components used in these devices have rapidly shifted from leaded components to chip components. As for the mounting method, surface mounting on a printed wiring board is becoming mainstream. Against this background, the following strict characteristics have been required for copper-clad laminates, which are the material for printed wiring boards.
これを、−船釣なチップ部品搭載時の問題と共に第2図
の参考説明図により説明する。チップ部品1の熱膨張係
数とプリント配線板の基板4、例えばエポキシ樹脂−ガ
ラス不繊布基材積層板の熱膨張係数とが大きく異ると、
チップ部品lと銅回路2を接続している半田接合部3に
冷熱サイクル等の負荷により亀裂を生じ、実用上使用出
来なくなる。市販のtCやトランジスタ等のチップ部品
の熱膨張係数は、2〜7×10−b/’Cであり、一方
該チツブを搭載する基板4は、前述の積層板の場合17
x20xlO−b/”Cと大きく、半田接合部3の信頼
性の確保は困難である。ガラス不繊布基材に代えてパラ
系アラミド繊維不繊布基材を用いた銅張積層板が提案さ
れ、このものは、線膨張係数が前記チップの線膨張係数
と近似している。しかし、加熱処理時の寸法収縮が従来
の銅張積層板よりも大きい為、配線板回路加工時に寸法
精度が問題となる危険があることがわかった。This will be explained with reference to the reference explanatory diagram of FIG. 2 together with the problem when mounting chip components on a boat. If the coefficient of thermal expansion of the chip component 1 and the coefficient of thermal expansion of the substrate 4 of the printed wiring board, for example, an epoxy resin-glass nonwoven base material laminate, are significantly different,
The solder joint 3 connecting the chip component 1 and the copper circuit 2 cracks due to loads such as cooling and heating cycles, making it unusable for practical use. The thermal expansion coefficient of commercially available chip components such as tC and transistors is 2 to 7 x 10-b/'C, while the substrate 4 on which the chip is mounted is 17
x20xlO-b/''C, making it difficult to ensure the reliability of the solder joint 3.A copper-clad laminate using a para-aramid fiber nonwoven base material instead of the glass nonwoven base material has been proposed. The coefficient of linear expansion of this material is close to that of the chip.However, because the dimensional shrinkage during heat treatment is greater than that of conventional copper-clad laminates, dimensional accuracy becomes a problem when processing wiring board circuits. It turns out that there is a danger.
発明が解決しようとする課題
本発明は前記の如き熱膨張係数と寸法収縮の欠点を改善
し、チップ部品の面実装信φn性に優れかつ配線板加工
時の寸法収縮°の小さい、チップ部品の面実装用として
適した銅張積層板を提供することを目的とする。Problems to be Solved by the Invention The present invention improves the above-mentioned drawbacks of thermal expansion coefficient and dimensional shrinkage, and provides a chip component with excellent surface mount reliability and small dimensional shrinkage during wiring board processing. The purpose of the present invention is to provide a copper-clad laminate suitable for surface mounting.
課題を解決するための手段
上記目的を達成するために、本発明は、シート状基材に
ビスフェノール型エポキシ樹脂組成物または多官能エポ
キシ樹脂組成物を含浸して積層成形した積層板において
、第1図に示すように中央層6シート状基材をガラス繊
維織布、表面層5のシート状基材をパラ系アミ′ト′繊
維不繊布とした点に特徴を有する。Means for Solving the Problems In order to achieve the above objects, the present invention provides a laminate in which a sheet-like base material is impregnated with a bisphenol-type epoxy resin composition or a polyfunctional epoxy resin composition and then laminated and molded. As shown in the figure, the sheet-like base material of the center layer 6 is made of glass fiber woven fabric, and the sheet-like base material of the surface layer 5 is made of para-amino acid fiber nonwoven fabric.
作用
本発明は、上記の特徴を有することにより、第2図で説
明したようにチップ部品を搭載し半田接合した場合、表
面層5の熱膨張係数が前記チップ部品のそれと近似した
値となるため、冷熱サイクルにおける半田接合部の信頼
性を大きく向上させることが出来る。この効果は、表面
層5の樹脂中に無機質充填剤を含有させることにより、
熱膨張係数がさらに近似した値となり、増大させること
ができる。Operation The present invention has the above features, so that when a chip component is mounted and soldered as explained in FIG. 2, the coefficient of thermal expansion of the surface layer 5 becomes a value close to that of the chip component. , it is possible to greatly improve the reliability of solder joints during cooling and heating cycles. This effect can be achieved by incorporating an inorganic filler into the resin of the surface layer 5.
The coefficient of thermal expansion becomes a more approximate value and can be increased.
また、積層板は、配線板回路加工工程で受ける熱によっ
て、積層成形時のひずみの解放や樹脂の後硬化収縮を起
こす。表面層5のパラ系アミド繊維不繊布基材は圧縮応
力に対する剛性が低いため、これらの力を抑えることが
出来ず、積層板の寸法収縮が大きくなる惧れがあるが、
本発明では中央層6に圧縮応力に対する剛性が高いガラ
ス繊維織布を使用しているため、中央1iづ6は寸法収
縮が小さく剛性は高くなり、表面層5の寸法収縮を十分
に抑えて、全体として寸法収縮の小さい積層板となる。In addition, the heat received in the wiring board circuit processing process causes the laminate to release strain during laminate molding and shrink after curing the resin. Since the para-amide fiber nonwoven base material of the surface layer 5 has low rigidity against compressive stress, these forces cannot be suppressed, and there is a risk that the dimensional shrinkage of the laminate will increase.
In the present invention, since a glass fiber woven fabric with high rigidity against compressive stress is used for the center layer 6, the center layer 6 has small dimensional shrinkage and high rigidity, and the dimensional shrinkage of the surface layer 5 is sufficiently suppressed. The result is a laminate with small dimensional shrinkage as a whole.
また、表面層5の樹脂中に無機質充填剤を含有させるこ
とは、表面層5の樹脂量を減らすことになり、その結果
として後硬化収縮量が少なくなり、積層板の寸法収縮抑
制につながる。Furthermore, containing an inorganic filler in the resin of the surface layer 5 reduces the amount of resin in the surface layer 5, which results in a decrease in the amount of post-curing shrinkage, leading to suppression of dimensional shrinkage of the laminate.
実施例
本発明を実施するに当たり、エポキシ樹脂は、市販のビ
スフェノール型エポキシ樹脂−ジシアンジアミド硬化型
、グリシジルアミン型エポキシ樹脂−ジシアンジアミド
硬化型等を使用出来る。パラ系アラミド繊維不繊布は、
市販のポリバラフζニレンテレフタラミド等の低熱膨張
風維をヘースとしたものが使用出来る。尚、パラ系アラ
ミド繊維不繊布基材へのエポキシ樹脂の付着量は、表面
層の熱膨張係数をチップ部品のそれと近似させる(5〜
l0XIO−6/’C)上で、40〜70重量%に調整
するのが望ましい。また、SiO□、MgO、AI□0
.3等の無機質充填剤をエポキシ樹脂に対して5〜30
重雇%添加して、表面層の実質的な樹脂量を少なくする
ことにより、さらに低い熱膨張率の層とすることが出来
ると共に加熱収縮量を低減することが出来る。EXAMPLE In carrying out the present invention, commercially available bisphenol type epoxy resin-dicyandiamide cured type, glycidylamine type epoxy resin-dicyandiamide cured type, etc. can be used as the epoxy resin. Para-aramid fiber nonwoven fabric is
A hese made of low thermal expansion wind fibers such as commercially available polybalaf ζ nylene terephthalamide can be used. The amount of epoxy resin attached to the para-aramid fiber nonwoven base material is such that the thermal expansion coefficient of the surface layer approximates that of the chip component (5~
It is desirable to adjust it to 40 to 70% by weight on 10XIO-6/'C). Also, SiO□, MgO, AI□0
.. 3 grade inorganic filler to epoxy resin at a ratio of 5 to 30
By adding a large amount of resin to reduce the substantial amount of resin in the surface layer, it is possible to obtain a layer with an even lower coefficient of thermal expansion and to reduce the amount of heat shrinkage.
また、ガラス繊維織布は、電気絶縁用に通常使用されて
いるもので特に限定しない。積層成形時に積層板に一体
に貼り付ける銅箔は、市販の18μmまたは35μm電
解銅箔を使用出来る。Furthermore, the glass fiber woven fabric is one that is commonly used for electrical insulation and is not particularly limited. A commercially available 18 μm or 35 μm electrolytic copper foil can be used as the copper foil to be integrally attached to the laminate during lamination molding.
積層成形した積層板は、中央層の厚みが、中央層と表面
層を含めた厚みの5〜50%になるように、使用するパ
ラ系アラミド繊維不繊布、ガラス繊維織布の厚みおよび
枚数を調整するのがよい。中央層の厚みが50%を越え
た場合は、中央層の熱膨張係数(通常は15〜20 X
10−6/ ’C)が表面層に与える影響が大となり
、チップ部品を装着した際の半田接続信頼性が低くなる
。The thickness and number of para-aramid fiber nonwoven fabrics and glass fiber woven fabrics used are adjusted so that the thickness of the layer-molded laminate is 5 to 50% of the thickness of the center layer and surface layer. Better to adjust. If the thickness of the central layer exceeds 50%, the thermal expansion coefficient of the central layer (usually 15-20
10-6/'C) has a large influence on the surface layer, and the solder connection reliability when chip components are mounted becomes low.
方、厚みが5%未満となった場合、配線板回路加工時に
受ける熱による表面層の寸法収縮を十分に抑えられなく
なる。On the other hand, if the thickness is less than 5%, dimensional shrinkage of the surface layer due to heat received during wiring board circuit processing cannot be sufficiently suppressed.
実施例1
バラ系アラミド繊維不繊布(坪1:60g/rrr)に
硬化剤としてジシアンジアミド、硬化促進剤として4−
メチル2−エチルイミダゾールを加えたビスフェノール
型エポキシ樹脂を含浸乾燥して、樹脂量55重量%のプ
リプレグ(A)を作製した。一方、同じエポキシ樹脂を
ガラス繊維織布に含浸乾燥して、40重量%のプリプレ
グ(B)を作製した。前記プリプレグ(B)lプライを
中央層とし、その両表面に前記プリプレグ(A)を4ブ
ライずつ配置し、(表面N)さらにその構成物の両表面
に35μm厚電解銅電解配置した後、これを鏡面板では
さみ、温度160°C1圧力60kg/c−の条件で1
時間、加熱・加圧して1. Own厚の銅張積層板を製
造した。Example 1 Dicyandiamide as a hardening agent and 4- as a hardening accelerator were added to rose type aramid fiber nonwoven fabric (tsubo 1:60g/rrr).
A prepreg (A) having a resin content of 55% by weight was prepared by impregnating and drying a bisphenol type epoxy resin containing methyl 2-ethylimidazole. On the other hand, a 40% by weight prepreg (B) was prepared by impregnating a glass fiber woven fabric with the same epoxy resin and drying it. The prepreg (B) 1 ply was used as the center layer, and 4 pieces of the prepreg (A) were placed on both surfaces of the prepreg (A), and after 35 μm thick electrolytic copper was electrolytically placed on both surfaces of the structure (Surface N), this sandwiched between mirror plates and heated at a temperature of 160°C and a pressure of 60kg/c.
1. After heating and pressurizing for a while. A copper-clad laminate of own thickness was manufactured.
実施例2
実施例1におけるエポキシ樹脂に、該樹脂固型に対して
20%(重量)の5iOz、Al2O,の混合系よりな
る無機質充填剤(商品名サテントン、上屋カオリン補装
)を加えたエポキシ樹脂組成を調整した。これを実施例
1のバラ系アラミド繊維不繊布に含浸乾燥して、無機質
充填剤を含む樹脂量58%重量のプリプレグ(C)を作
製した。実施例1のプリプレグ(B)1プライを中央層
とし、その両表面に前記プリプレグ(C)を4ブライず
っ配置しく表面層)、さらにその張積層板を得た。Example 2 To the epoxy resin in Example 1, an inorganic filler (trade name: Satenton, Kagaya Kaolin Repair) consisting of a mixed system of 5iOz and Al2O was added in an amount of 20% (by weight) based on the solid resin. The epoxy resin composition was adjusted. This was impregnated into the rose type aramid fiber nonwoven fabric of Example 1 and dried to produce a prepreg (C) containing an inorganic filler and having a resin content of 58% by weight. One ply of the prepreg (B) of Example 1 was used as the center layer, and the prepreg (C) was arranged at four plies on both surfaces thereof (surface layer), and a stretched laminate thereof was obtained.
実施例3
パラ系アラミド繊維不繊布(坪ff160g/rrf)
に、硬化剤としてジシアンジアミド、硬化促進剤として
4−メチル2−エチルイミダゾールを(D)を作製した
。一方、同じエポキシ樹脂をガラス繊維織布に含浸乾燥
して、樹脂量40重量%のプリプレグ(E)を作製した
。前記プリプレグ(E)1プライを中央層とし、その両
表面に前記プリプレグ(D)を4ブライずっ配置しく表
面層)、さらにその構成物の両表面に35μm厚電解銅
電解配置した後、実施例1と同し成形条件にて1.0
mm厚の銅張積層板を得た。Example 3 Para-aramid fiber nonwoven fabric (tsubo ff160g/rrf)
Then, (D) was prepared using dicyandiamide as a curing agent and 4-methyl-2-ethylimidazole as a curing accelerator. On the other hand, a glass fiber woven fabric was impregnated with the same epoxy resin and dried to produce a prepreg (E) having a resin content of 40% by weight. One ply of the prepreg (E) was used as the center layer, and the prepreg (D) was arranged on both surfaces of the prepreg (D) at 4 ply as a surface layer), and after 35 μm thick electrolytic copper was electrolytically arranged on both surfaces of the structure, Example 1.0 under the same molding conditions as 1.
A copper-clad laminate with a thickness of mm was obtained.
比較例1
実施例1において作製したプリプレグ(A)を10プラ
イ重ね、その両表面に35μm厚電解銅電解配置した後
、実施例1と同じ成形条件にて1、0 mm厚の銅張積
層板を得た。Comparative Example 1 After stacking 10 plies of the prepreg (A) produced in Example 1 and electrolytically disposing 35 μm thick electrolytic copper on both surfaces, a 1.0 mm thick copper clad laminate was produced under the same molding conditions as Example 1. I got it.
比較例2
実施例2において作製したプリプレグ(C)を1019
4重ね、その両表面に35μm厚電解銅笛を配置した後
、実施例1と同じ成形条件にて1、 Omm厚の銅張積
層板を得た。Comparative Example 2 The prepreg (C) produced in Example 2 was
After 4 layers and 35 μm thick electrolytic copper whistles were placed on both surfaces, a 1.0 mm thick copper clad laminate was obtained under the same molding conditions as in Example 1.
比較例3
実施例1において作製したプリプレグ(B)を5ブライ
重ね、その両表面に35μm厚電解銅電解配置した後、
実施例1と同じ成形条件にて1、0 mm厚の銅張積層
板を得た。Comparative Example 3 Five prepregs (B) prepared in Example 1 were stacked and 35 μm thick electrolytic copper was placed on both surfaces, and then
A copper-clad laminate having a thickness of 1.0 mm was obtained under the same molding conditions as in Example 1.
実施例1〜3および比較例1〜3の銅張積層板の特性を
第1表に示した。Table 1 shows the properties of the copper-clad laminates of Examples 1 to 3 and Comparative Examples 1 to 3.
発明の効果
上述のように本発明に係る積層板は、中央層の基材を剛
性の高いガラス繊維織布、表面層の基材をパラ系アラミ
ド繊維不繊布としたことにより、表面層の線膨張係数を
、搭載するチップ部品のそれに近づけてチップ部品の面
実装信頼性に優れると共に、加熱による寸法収縮も小さ
く抑える優れた効果を有する。そして、これらの効果は
、表面層の樹脂中に無機質充填剤を含有させることによ
り、さらに顕著になるものである。Effects of the Invention As described above, the laminate according to the present invention uses a glass fiber woven fabric with high rigidity as the base material of the center layer and a para-aramid fiber nonwoven fabric as the base material of the surface layer. The coefficient of expansion is brought close to that of the chip component to be mounted, resulting in excellent surface mounting reliability of the chip component, and has the excellent effect of suppressing dimensional shrinkage due to heating to a small level. These effects become even more remarkable by incorporating an inorganic filler into the resin of the surface layer.
また、表面層はアラミド繊維不繊布を用いているため、
ガラス繊維織布を用いた場合より表面粗さが小さくなっ
ており、高密度実装回路用ス
としても適したちのげある。In addition, since the surface layer uses aramid fiber nonwoven fabric,
The surface roughness is smaller than when using glass fiber woven fabric, making it suitable for high-density packaging circuits.
第1図は本発明に係る積層板の断面図、第2図はチップ
部品を実装したプリント配線板の説明圓である。
5は表面層、6は中央層
第1図
第2図FIG. 1 is a sectional view of a laminate according to the present invention, and FIG. 2 is an explanatory diagram of a printed wiring board on which chip components are mounted. 5 is the surface layer, 6 is the central layer Fig. 1 Fig. 2
Claims (1)
物を含浸して積層成形した積層板において、中央層のシ
ート状基材をガラス繊維織布、表面層のシート状基材を
パラ系アラミド繊維不繊布とした積層板。 2、表面層の樹脂中に無機質充填剤を含有させた請求項
1記載の積層板。 3、中央層の厚みを全体の5〜50%とした請求項1ま
たは2記載の積層板。 4、ビスフェノール型エポキシ樹脂を多官能エポキシ樹
脂とした請求項1〜3のいずれかに記載の積層板。[Scope of Claims] 1. In a laminate formed by impregnating a bisphenol-type epoxy resin composition into a sheet-like base material and laminating it, the center layer sheet-like base material is a glass fiber woven fabric and the surface layer sheet-like base material A laminate made of para-aramid fiber nonwoven fabric. 2. The laminate according to claim 1, wherein the resin of the surface layer contains an inorganic filler. 3. The laminate according to claim 1 or 2, wherein the thickness of the central layer is 5 to 50% of the total thickness. 4. The laminate according to any one of claims 1 to 3, wherein the bisphenol type epoxy resin is a polyfunctional epoxy resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21723088A JP2503601B2 (en) | 1988-08-31 | 1988-08-31 | Laminate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21723088A JP2503601B2 (en) | 1988-08-31 | 1988-08-31 | Laminate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0263821A true JPH0263821A (en) | 1990-03-05 |
| JP2503601B2 JP2503601B2 (en) | 1996-06-05 |
Family
ID=16700886
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21723088A Expired - Lifetime JP2503601B2 (en) | 1988-08-31 | 1988-08-31 | Laminate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2503601B2 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04290744A (en) * | 1991-03-20 | 1992-10-15 | Shin Kobe Electric Mach Co Ltd | Composite laminated sheet |
| WO1994016003A1 (en) * | 1993-01-14 | 1994-07-21 | Toray Industries, Inc. | Prepreg, method of manufacturing the same, and laminated composite |
| WO2005051654A1 (en) * | 2003-11-25 | 2005-06-09 | Nitto Denko Corporation | Resin sheet, liquid crystal cell substrate, liquid crystal display, substrate for electroluminescent display, electroluminescent display and substrate for solar cell |
| CN104582277A (en) * | 2014-07-31 | 2015-04-29 | 江苏博敏电子有限公司 | Swelling and shrinking operation method of printed circuit board |
| US9661749B2 (en) | 2011-12-16 | 2017-05-23 | Panasonic Intellectual Property Management Co., Ltd. | Metal-clad laminate and printed wiring board |
-
1988
- 1988-08-31 JP JP21723088A patent/JP2503601B2/en not_active Expired - Lifetime
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04290744A (en) * | 1991-03-20 | 1992-10-15 | Shin Kobe Electric Mach Co Ltd | Composite laminated sheet |
| WO1994016003A1 (en) * | 1993-01-14 | 1994-07-21 | Toray Industries, Inc. | Prepreg, method of manufacturing the same, and laminated composite |
| WO2005051654A1 (en) * | 2003-11-25 | 2005-06-09 | Nitto Denko Corporation | Resin sheet, liquid crystal cell substrate, liquid crystal display, substrate for electroluminescent display, electroluminescent display and substrate for solar cell |
| US9661749B2 (en) | 2011-12-16 | 2017-05-23 | Panasonic Intellectual Property Management Co., Ltd. | Metal-clad laminate and printed wiring board |
| US9795030B2 (en) | 2011-12-16 | 2017-10-17 | Panasonic Intellectual Property Management Co., Ltd. | Metal-clad laminate and printed wiring board |
| CN104582277A (en) * | 2014-07-31 | 2015-04-29 | 江苏博敏电子有限公司 | Swelling and shrinking operation method of printed circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2503601B2 (en) | 1996-06-05 |
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