JPH0264239U - - Google Patents
Info
- Publication number
- JPH0264239U JPH0264239U JP14346388U JP14346388U JPH0264239U JP H0264239 U JPH0264239 U JP H0264239U JP 14346388 U JP14346388 U JP 14346388U JP 14346388 U JP14346388 U JP 14346388U JP H0264239 U JPH0264239 U JP H0264239U
- Authority
- JP
- Japan
- Prior art keywords
- switch
- analog signal
- converter
- closed
- taken
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 3
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
Landscapes
- Analogue/Digital Conversion (AREA)
Description
第１図は本考案の一実施例におけるＡ／Ｄ変換
回路の回路ブロツク図、第２図は第１図に示した
カウンタの動作を示すタイミングチヤート、第３
図はＡ／Ｄ変換回路の一従来例を示す回路ブロツ
ク図である。
１……ＣＰＵ、１Ａ……Ａ／Ｄコンバータ、２
……オペアンプ、４……カウンタ、２０……増幅
回路、３０Ａ〜３３Ａ，３０Ｂ〜３３Ｂ……アナ
ログスイツチ、Ｒ１，Ｒ２，Ｒ３，Ｒ４，Ｒ１０
，Ｒ１１，Ｒ１２，Ｒ１３……抵抗、ＶＲ１，Ｖ
Ｒ２……可変抵抗、Ｃ１０，Ｃ１１，Ｃ１２，Ｃ
１３……コンデンサ。
FIG. 1 is a circuit block diagram of an A/D conversion circuit according to an embodiment of the present invention, FIG. 2 is a timing chart showing the operation of the counter shown in FIG. 1, and FIG.
The figure is a circuit block diagram showing a conventional example of an A/D conversion circuit. 1...CPU, 1A...A/D converter, 2
...Operational amplifier, 4...Counter, 20...Amplification circuit, 30A to 33A, 30B to 33B...Analog switch, R1, R2, R3, R4, R10
, R11, R12, R13...Resistance, VR1, V
R2...variable resistance, C10, C11, C12, C
13... Capacitor.
Claims (1)
と、 該複数の入力端子の各々に対応して設けられ、
アナログ信号を取込むべき入力端子を切換えるス
イツチと、 該スイツチが閉となることにより取込まれたア
ナログ信号を増幅する１つの増幅回路と、 該増幅回路で増幅されたアナログ信号をＡ／Ｄ
変換するＡ／Ｄコンバータと、 前記スイツチの閉または開を定めるための信号
を発生する制御信号発生手段と を具えたことを特徴とするＡ／Ｄ変換回路。[Claims for Utility Model Registration] A plurality of input terminals for inputting analog signals, provided corresponding to each of the plurality of input terminals,
A switch that switches the input terminal to which an analog signal should be taken, an amplifier circuit that amplifies the analog signal taken in when the switch is closed, and an A/D converter that converts the analog signal amplified by the amplifier circuit.
An A/D conversion circuit comprising: an A/D converter for converting the switch; and control signal generation means for generating a signal for determining whether the switch is closed or opened.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14346388U JPH0264239U (en) | 1988-11-04 | 1988-11-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14346388U JPH0264239U (en) | 1988-11-04 | 1988-11-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0264239U true JPH0264239U (en) | 1990-05-15 |
Family
ID=31410314
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14346388U Pending JPH0264239U (en) | 1988-11-04 | 1988-11-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0264239U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5513410B2 (en) * | 1974-04-17 | 1980-04-09 | ||
| JPS56116146A (en) * | 1980-02-15 | 1981-09-11 | Toyoda Mach Works Ltd | Collector of measuring signal |
-
1988
- 1988-11-04 JP JP14346388U patent/JPH0264239U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5513410B2 (en) * | 1974-04-17 | 1980-04-09 | ||
| JPS56116146A (en) * | 1980-02-15 | 1981-09-11 | Toyoda Mach Works Ltd | Collector of measuring signal |