JPH0264844A - Information processor - Google Patents

Abstract

PURPOSE:To reduce the capacity of a program accumulation memory by storing the common part of respective programs and a different part of respective programs in the program accumulation memory. CONSTITUTION:The program 7 of a parallel processing processor 2-1 and different information 9 are stored in the program accumulation memory 4, and different information 9 shows the different part of a program 8 in a parallel processor 2-2 with respect to the program 7. For writing the program 8 in a program memory 3-2, a master processor 1 writes the part of the program 7 accumulated in the program accumulation memory 4, and executes writing by rewriting a content with respect to the different part based on different information 9. Thus, the capacity of the program accumulation memory can be reduced since the programs executed by the respective parallel processing processors are similar for the most part.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an information processing device that performs the same processing in parallel using a plurality of parallel processing processors, and particularly relates to a program that stores programs executed by each parallel processing processor. M
Regarding things that can reduce bond memory.

[Conventional technology]

In this type of information processing device, even if the processing contents of each parallel processing processor are the same, 10 (human output) at l/s,
Since the command address, work address, etc. are different for each parallel processing processor, the programs required by each parallel processing processor are different from each other.

Conventionally, a program dedicated to each parallel processing processor is stored in a program storage memory, and each program is read from the program storage memory under the control of a master processor. It was configured to be stored in .

[Problem to be solved by the invention]

However, in conventional information processing devices, since the programs are different for each parallel processing processor as described above,
There is a problem in that the number of programs corresponding to the number of parallel processing processors must be stored in the program storage memory, resulting in an increase in the capacity of the program memo memory.

SUMMARY OF THE INVENTION An object of the present invention is to provide an information processing device that requires a small program M product memory.

[Means to solve the problem]

In order to achieve the above-mentioned object, the present invention has a plurality of parallel processing processors that perform the same processing in parallel, and a system that is provided corresponding to each parallel processing processor and that can freely store programs to be executed by each parallel processing processor. a plurality of program memories; a program storage memory for storing common parts of each program and different parts of each program; and loading the common parts and corresponding different parts of the programs into each program memory when each parallel processing processor operates. This provides an information processing apparatus that includes a master processor that configures each program in each program memory.

[Operation] According to the present invention, the master processor configures each program in each program memory by writing common parts and different parts of the programs into each program memory. Therefore, in the program N bond memory,
It is sufficient to store the common parts of each program and the different parts of each program. Since most of the programs executed by each parallel processing processor are the same, it is possible to significantly reduce the capacity of the program storage memory.

〔Example〕

The present invention will be described in detail below using the drawings.

FIG. 1 shows the hardware configuration of an information processing device according to an embodiment of the present invention. The master processor 1 controls the operation of the entire information processing device. The parallel processing processors 2-1.2-2 are processors having the same functions. The program memo 1J3-1.3-2 is a memory into which programs to be executed by the parallel processor 2-1.2-2 can be written. The program storage memory 4 stores M programs necessary for the operation of this information processing device.
This is M memory. The common memory 5 is a communication memory for commands and status sent and received between the master processor 1 and the parallel processing processors 2-1 and 2-2. The signal bus 6 consists of address lines, data lines, and control signal lines, and connects each part.

FIGS. 2A and 2B show programs for each parallel processing processor. The program 7 of the parallel processing processor 2-1 and the program 8 of the parallel processing processor 2-2 have the same processing content, so most of them are the same. However, I
Since the O (input/output) address, command address, work address, etc. are different between the parallel processing processors 2-1.2-2, some differences occur. Here both programs 7
．． 8 assumes that the contents of address xxxx and address YYYY are different. Program 7 address XX
The contents of XX5YYYY are indicated by AAAA and BBBB, respectively, and the contents of addresses xxxx and yyyy of program 8 are respectively indicated by cccc.

Indicated by DDDD.

FIG. 3 shows the relationship between the contents of the program storage memory and the programs of each parallel processing processor. The program storage memory 41 stores the program 7 and the t-mail information 9. Difference information 9 is information created in advance, and indicates a difference between program 8 and program 7 . For example, the address xxxx of the difference and its content ccc
c, the address YYYY of the difference, and its contents DDD
It consists of D.

When writing the program 7 to the program memory 3-1, the mask-pro sensor 1 reads and writes the portion of the program 7 stored in the program storage memory 4 as it is. When writing the program 8 to the program memory 3-2, the part of the program 7 stored in the program M product memory 4 is written, and the difference location (address xxxx, yyyY
), rewrite the contents to CCCC5DDDD. This allows the program 8 to be written.

〔Effect of the invention〕

As described above, according to the present invention, the program storage memory only needs to store the common parts of each program and the different parts of each program.

Therefore, the capacity of the program storage memory can be significantly reduced, and an improvement in cost can be expected.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an information processing system according to an embodiment of the present invention, FIGS. 2A and B are conceptual diagrams showing programs of a parallel processing processor, and FIG. 3 shows the contents of a program storage memory and parallel processing. FIG. 2 is a conceptual diagram showing the relationship between processors. 1...Master processor, 2-1.2-2...Parallel processing processor, 3-
1.3-2...Program memory, 4...
...Program storage memory, 5...Common memory, 6...Signal bus, 7...Parallel processing processor 2 8...Parallel processing processor 2 9. ...Difference information. 1 program, 2 program,

Claims (1)

[Scope of Claims] A plurality of parallel processing processors that perform the same processing in parallel; a plurality of program memories provided corresponding to each parallel processing processor and capable of storing programs to be executed by each parallel processing processor; A program storage memory stores common parts of each program and different parts of each program, and when each parallel processing processor operates, the common parts of the programs and the corresponding different parts are written to each program memory. An information processing device comprising: a master processor configured in memory.