JPH0265218A - Manufacture of laminated ceramic capacitor - Google Patents

Manufacture of laminated ceramic capacitor

Info

Publication number
JPH0265218A
JPH0265218A JP21757288A JP21757288A JPH0265218A JP H0265218 A JPH0265218 A JP H0265218A JP 21757288 A JP21757288 A JP 21757288A JP 21757288 A JP21757288 A JP 21757288A JP H0265218 A JPH0265218 A JP H0265218A
Authority
JP
Japan
Prior art keywords
substrate
laminated body
chips
laminate
fixed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21757288A
Other languages
Japanese (ja)
Other versions
JPH0472372B2 (en
Inventor
Seiji Akao
赤尾 清二
Akira Hirasawa
平沢 章
Takehisa Kitamura
北村 武久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lincstech Circuit Co Ltd
Original Assignee
Hitachi Condenser Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Condenser Co Ltd filed Critical Hitachi Condenser Co Ltd
Priority to JP21757288A priority Critical patent/JPH0265218A/en
Publication of JPH0265218A publication Critical patent/JPH0265218A/en
Publication of JPH0472372B2 publication Critical patent/JPH0472372B2/ja
Granted legal-status Critical Current

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  • Ceramic Capacitors (AREA)

Abstract

PURPOSE:To prevent the deterioration of characteristics due to chip-to-chip contact by a method wherein a laminated body, which is formed by laminating and pressure- bonding a plurality of ceramic sheets carrying plural internal electrodes, is fixed to the surface of a substrate using an organic bonding agent, slits 7 are provided on the laminated material, and after the laminated material has been cut into a plurality of chips, a calcinating work is conducted thereon. CONSTITUTION:A laminated body 3 is formed by laminating and pressure-bonding a plurality of ceramic sheets 2 whereon inner electrodes 1 are formed. Said laminated body 3 is fixed to a substrate 5 using an organic bonding agent 4. A substrate whereon zirconia is coated on SiC, marmina and mulite, which do not react with the laminated body 3, is used. After the laminated body 3 has been fixed to the substrate 5, slits 7 are formed only on the laminated body 3 using a dicing machine 6, and the laminated body 3 is cut into chips 8. The desirable width of the slits 7 is 50 to 200mum or thereabout. After the laminated body 3 has been cut, the chips 8 are calcinated in the state wherein they are arranged on the substrate 5. The organic bonding agent 4 can be vapor deposited by the heat of calcination, and the chips 8 can be exforiated from the substrate easily. The chips 8 can be formed by cutting the substrate 5 with the laminated body 3 fixed thereto.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は積層セラミックチップコンデンサに関する。[Detailed description of the invention] (Industrial application field) The present invention relates to a multilayer ceramic chip capacitor.

(従来の技術) 従来、積Nセラミックチップコンデンサを製造するには
、セラミックシートの積層体を所定寸法のチップに切断
し、その後、チップを基板上に並べるかあるいは粉末中
に埋め焼成している。
(Prior Art) Conventionally, in order to manufacture multi-N ceramic chip capacitors, a laminate of ceramic sheets is cut into chips of predetermined dimensions, and then the chips are arranged on a substrate or buried in powder and fired. .

(発明が解決しようとする課題) しかし、この従来の方法では、作業効率が低い欠点があ
る。また、焼成時にチップどうしが接触し易く、セラミ
ックシートの内部電極と誘電体の部分とが反応して特性
が劣化する欠点があった。
(Problems to be Solved by the Invention) However, this conventional method has the drawback of low work efficiency. Additionally, the chips tend to come into contact with each other during firing, causing a reaction between the internal electrodes of the ceramic sheet and the dielectric portion, resulting in deterioration of characteristics.

本発明は、以上の欠点を改良し、製造が容易で特性を向
上しうる積層セラミックチップコンデンサを捏供するも
のである。
The present invention improves the above-mentioned drawbacks and provides a multilayer ceramic chip capacitor that is easy to manufacture and has improved characteristics.

(課題を解決するための手段) 本発明は、上記の目的を達成するために、積層セラミッ
クチップコンデンサの製造方法おいて、i)複数個の内
部電極を形成したセラミックシートを複数枚、積層し圧
着して積層体とする工程と、 11)該積層体を焼成時に前記積層体と反応しない基板
表面に有機系接着剤で固定する工程と、iii)前記積
層体にスリットを形成して複数個のチップに切断する工
程と、 iv )該チップを焼成する工程と、 を順次行なうことを特徴とする積層セラミックチップコ
ンデンサの製造方法を提供するものである。
(Means for Solving the Problems) In order to achieve the above object, the present invention provides a method for manufacturing a multilayer ceramic chip capacitor, in which: i) a plurality of ceramic sheets each having a plurality of internal electrodes formed thereon are laminated; 11) fixing the laminate to a substrate surface that does not react with the laminate during firing with an organic adhesive; and iii) forming a plurality of slits in the laminate. The present invention provides a method for manufacturing a multilayer ceramic chip capacitor, which comprises sequentially performing the steps of: cutting the chip into chips; and iv) firing the chip.

(作用) 本発明は、積層体にスリットを設けて切断し、形成した
チップを予め有機系接着剤により基板に固定している。
(Function) In the present invention, a laminate is provided with slits and cut, and the formed chips are fixed to a substrate in advance with an organic adhesive.

従って、チップは互いに接触することなく、所定の間隔
を維持したまま焼成できる。
Therefore, the chips can be fired while maintaining a predetermined distance without coming into contact with each other.

(実施例) 以下、本発明を実施例に基づいて説明する。(Example) Hereinafter, the present invention will be explained based on examples.

先ず、第1図に示ず通り、内部電極1を形成したセラミ
ックシート2を複数枚、積層し圧着して積層体3を形成
する。
First, as shown in FIG. 1, a plurality of ceramic sheets 2 having internal electrodes 1 formed thereon are laminated and pressed together to form a laminate 3.

次に第2図に示す通り、積層体3を有機系接着剤4によ
り基板5に固定する。基板5は、焼成時に積層体3と反
応しないものとし、例えば、3iCやマルミナ、ムライ
l〜にジルコニアを塗布したものを用いる。
Next, as shown in FIG. 2, the laminate 3 is fixed to the substrate 5 with an organic adhesive 4. The substrate 5 should not react with the laminate 3 during firing, and is made of, for example, 3iC, Marumina, or Murai l~ coated with zirconia.

積層体3を基板5に固定後、第3図に示す通り、ダイシ
ングマシン6により積層体3のみにスリット7を形成し
て、個々のチップ8に切断する。スリット7の幅は50
〜200μm程度が好ましい。
After fixing the laminate 3 to the substrate 5, as shown in FIG. 3, a dicing machine 6 forms slits 7 only in the laminate 3 and cuts it into individual chips 8. The width of slit 7 is 50
The thickness is preferably about 200 μm.

積層体3を、切断後、第4図に示す通り、デツプ8を基
板5に配置した状態で焼成する。焼成時の加熱により、
有機系接着剤4を蒸着でき、チップ8を基板5から容易
に剥離できる。
After cutting, the laminate 3 is fired with the depth 8 disposed on the substrate 5, as shown in FIG. Due to the heating during firing,
The organic adhesive 4 can be deposited, and the chip 8 can be easily peeled off from the substrate 5.

上記実施例では、積層体3を、基板5に固定したまま切
断して、チップ8を形成できる。従って、チップ8はお
互いに接触することなく、所定の間隔を維持できる。
In the above embodiment, the chip 8 can be formed by cutting the laminate 3 while being fixed to the substrate 5. Therefore, the chips 8 can maintain a predetermined distance without coming into contact with each other.

(発明の効果) 以上の通り、本発明によれば、基板に固定しだますチッ
プを形成できるため、作業が容易でチップどうしの接触
による特性の劣化を防止しつる積層セラミックヂップコ
ンデンザの製造方法が得られる。
(Effects of the Invention) As described above, according to the present invention, it is possible to form a chip that is fixed to a substrate, so the work is easy and the deterioration of characteristics due to contact between chips can be prevented. A manufacturing method is obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図〜第4図は本発明の製造工程の図を示し、第1図
は積層体の正面図、第2図は積層体を基板に固定した状
態の正面図、第3図は積層体を切断している状態の斜視
図、第4図はチップを基板に配置した状態の正面図を示
す。 1・・・内部電極、 2・・・セラミックシート、3・
・・積層体、 4・・・有機系接着剤、 5・・・基板
、7・・・スリット、 8・・・チップ。 特許出願人 日立コンデンサ株式会社
Figures 1 to 4 show diagrams of the manufacturing process of the present invention, where Figure 1 is a front view of the laminate, Figure 2 is a front view of the laminate fixed to a substrate, and Figure 3 is the laminate. FIG. 4 is a perspective view of the chip being cut away, and FIG. 4 is a front view of the chip being placed on the substrate. 1... Internal electrode, 2... Ceramic sheet, 3...
...Laminated body, 4...Organic adhesive, 5...Substrate, 7...Slit, 8...Chip. Patent applicant Hitachi Capacitor Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] (1)積層セラミックチップコンデンサの製造方法にお
いて、 i)複数個の内部電極を形成したセラミックシートを複
数枚、積層し圧着して積層体を 形成する工程と、 ii)該積層体を焼成時に前記積層体と反応しない基板
表面に有機系接着剤で固定する工 程と、 iii)前記積層体にスリットを形成して複数個のチッ
プに切断する工程と、 iv)該チップを焼成する工程と、 を順次行なうことを特徴とする積層セラミックチップコ
ンデンサの製造方法。
(1) A method for manufacturing a multilayer ceramic chip capacitor, which includes: i) laminating and pressing a plurality of ceramic sheets each having a plurality of internal electrodes formed thereon to form a laminate; and ii) performing the steps described above when firing the laminate. fixing with an organic adhesive on the surface of the substrate that does not react with the laminate; iii) forming slits in the laminate and cutting it into a plurality of chips; iv) firing the chips. A method for manufacturing a multilayer ceramic chip capacitor characterized by sequential steps.
JP21757288A 1988-08-31 1988-08-31 Manufacture of laminated ceramic capacitor Granted JPH0265218A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21757288A JPH0265218A (en) 1988-08-31 1988-08-31 Manufacture of laminated ceramic capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21757288A JPH0265218A (en) 1988-08-31 1988-08-31 Manufacture of laminated ceramic capacitor

Publications (2)

Publication Number Publication Date
JPH0265218A true JPH0265218A (en) 1990-03-05
JPH0472372B2 JPH0472372B2 (en) 1992-11-18

Family

ID=16706374

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21757288A Granted JPH0265218A (en) 1988-08-31 1988-08-31 Manufacture of laminated ceramic capacitor

Country Status (1)

Country Link
JP (1) JPH0265218A (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4981859A (en) * 1972-12-13 1974-08-07
JPS5988816A (en) * 1982-11-12 1984-05-22 日本電気ホームエレクトロニクス株式会社 Method of producing laminated ceramic part
JPS6050910A (en) * 1983-08-30 1985-03-22 日本電気株式会社 Method of producing laminated condenser
JPS61144810A (en) * 1984-12-18 1986-07-02 関西日本電気株式会社 Manufacture of laminated ceramic part
JPS61219124A (en) * 1985-03-25 1986-09-29 関西日本電気株式会社 Manufacture of ceramic part

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4981859A (en) * 1972-12-13 1974-08-07
JPS5988816A (en) * 1982-11-12 1984-05-22 日本電気ホームエレクトロニクス株式会社 Method of producing laminated ceramic part
JPS6050910A (en) * 1983-08-30 1985-03-22 日本電気株式会社 Method of producing laminated condenser
JPS61144810A (en) * 1984-12-18 1986-07-02 関西日本電気株式会社 Manufacture of laminated ceramic part
JPS61219124A (en) * 1985-03-25 1986-09-29 関西日本電気株式会社 Manufacture of ceramic part

Also Published As

Publication number Publication date
JPH0472372B2 (en) 1992-11-18

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