JPH026658Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to an envelope detector that converts a read high frequency signal into a DC voltage and digitally displays it when testing a magnetic recording medium or head of a magnetic disk device.

Generally, a magnetic disk device records computer data "1" and "0" onto a magnetic recording medium using two types of high frequency signals.

This distinction between "1" and "0" is made by setting the frequency for recording "0" to half the frequency for recording "1".

Testing of the magnetic recording medium of such a magnetic disk device is carried out by reading the aforementioned "1" and "0" information recorded in advance on the magnetic recording medium, as shown in Figure 1. This is done by obtaining a high frequency signal of several megahertz, finding the average of the peak amplitude values of this high frequency signal, and checking this.

However, the amplitude of this high-frequency signal fluctuates due to uneven coating of the magnetic recording medium, rotational fluctuations, etc.
In addition, since the magnetic recording medium is disc-shaped, the circumferential speed is different between the inner and outer sides, and the physical distance between the peaks of the signal (one peak is one bit) becomes wider as you go to the outside. Therefore, the waveform of the read signal on the inside is close to a triangular wave as shown in FIG. 2a, while on the outside it becomes a waveform with a shoulder as shown in FIG. 2b.

Therefore, even if such a signal is displayed digitally as it is with a normal digital voltmeter, it will be displayed as an effective value etc., so the value will be different even with the same amplitude due to the difference in waveform. It is not possible to provide an accurate digital display of the amount absorbed.

In view of these conventional drawbacks, the present invention has been developed by inputting a clock created by detecting a read high frequency signal into an up-down counter, and comparing the peak of the signal with the level of the previous output signal. The up-down counter is turned up when the level is higher than the level of the output signal, and is turned down when the level is lower than the level of the output signal, and the signal from the up-down counter is converted by a D/A converter to convert the read high-frequency signal. This is to obtain an envelope output signal that follows the peak.

An embodiment of the present invention will be specifically described below with reference to the drawings.

In FIG. 3, high frequency signals read from input terminal 1 are input to two comparators 2 and 3, respectively.

The previous output signal from the attenuator 4 is input to one comparator 2, and the comparator 2
The output is inputted via the memory 5 to the up-down mode switching terminal of the up-down counter 6. The output of the other comparator 3 is inputted to the clock terminal of the up-down counter 6 via the waveform shaping circuit 7.

The output of the up-down counter 6 is input to the attenuator 4 via the D/A converter 8.

The output of the attenuator 4 is input to the comparator 2 as described above, and is also amplified by the amplifier 9 and then taken out to the output terminal 10.

As a result, when a high-frequency signal read from input terminal 1 is input, comparator 3 compares the signal with zero volts because the other input terminal is grounded, so every time it crosses zero volts, a pulse-like signal is generated. Outputs a signal. This signal is then clock-shaped by the waveform shaping circuit 7 so that it always forms a constant rectangular wave.

A clock synchronized with each cycle of the high frequency signal thus read out is input to the up/down counter 6. Further, the read high frequency signal and the previous output signal from the attenuator 4 are both input to the other comparator 2.

Therefore, the comparator 2 compares the peak amplitude value of the high frequency signal with the level of the previous output signal. As a result, signals are output in which the peak of the high-frequency signal is larger and the peak is smaller.

After that is temporarily stored in memory 5,
In the former case, the up-down counter 6 is operated in the up mode, and in the latter case, the up-down counter 6 is operated in the down mode.

Therefore, since the up-down counter 6 performs an up or down count operation for each cycle of the high-frequency signal, this count data is input as parallel data to the D/A converter 8 and converted to an analog value, which is then input to the attenuator 4 and the amplifier 9. is taken out to the output terminal 10 via.

As a result, as shown in FIG. 4, a DC voltage output signal B is obtained which is delayed one bit at a time with respect to the read high frequency signal A and follows only changes in the magnitude of its peak.

By integrating this output signal B, it becomes possible to digitally display the peak amplitude value, which corresponds only to the peak amplitude value unrelated to the waveform shape of the high frequency signal A and becomes an average value that absorbs peak amplitude fluctuations.

In this case, the clock input to the up-down counter 6 is changed from the most significant bit of the counter to 1.
By switching the gate to the upper bit, the change value of the output signal of the DC voltage changes twice as much, thereby improving the tracking characteristics when the amplitude fluctuation of the high frequency signal is large.

In addition, in the above-mentioned embodiment, an envelope output signal that follows the positive peak in the read high-frequency signal is obtained, but an envelope output signal that also follows the negative peak is obtained, and both can be separated individually. It is also possible to display digitally, or to add and display digitally.

In this way, according to the present invention, it is possible to perform digital display that corresponds only to the amplitude, regardless of the waveform of the high-frequency signal, with a simple circuit configuration.
It is suitable for use in applications where the waveform of the read signal changes, such as in media testing of magnetic disk drives.

Furthermore, since the structure is simple and the high frequency signal read by the clock of the up-down counter 6 is used, there is no variation in the displayed value depending on the test location.

[Brief explanation of drawings]

Fig. 1 is a diagram showing a high frequency signal to which the present invention is applied, Fig. 2 a and b are diagrams showing different states of signal waveforms, and Fig. 3 is a circuit showing an embodiment of the envelope detector according to the present invention. FIG. 4 is a diagram showing an output signal according to the present invention. 1...Input terminal, 2, 3...Comparator, 4
...Attenuator, 5...Memory, 6...Up-down counter, 7...Waveform shaping circuit, 8...
D/A converter, 9...amplifier, 10...output terminal.

Claims (1)

[Scope of utility model registration request] Detects the zero-crossing point of the high-frequency signal having the read AC waveform, rises at the zero-crossing point,
A clock generation circuit that generates a clock that repeatedly falls; an up-down counter that performs counting operations using the clock output from the clock generation circuit; and a D/A conversion that converts the digital output from the up-down counter into an analog signal. The peak value of the wave currently input to the D/A converter is compared with the peak value of the previous wave output from the D/A converter, and if the peak value of the wave currently input is greater than the peak value of the previous wave. The envelope comprises a comparison circuit which instructs the up-down counter to count up and, conversely, instructs the up-down counter to count down when the up-down counter is small, and obtains an output signal of the envelope that follows the peak of the read high-frequency signal. Detector.