JPH026678Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an RS flip-flop circuit in which either set or reset takes priority when power is turned on.

The priority circuit of this type of flip-flop circuit is
Generally, a time constant circuit with a time constant different from the rise time constant of the power supply is constructed by combining resistors and capacitors, and this time constant circuit is used to give priority to set or reset. Since a constant circuit is required, there is a drawback that the circuit configuration becomes complicated.

The purpose of the present invention is to provide an RS flip-flop circuit that eliminates the need for a special priority circuit for setting or resetting by utilizing the difference between the rise characteristics of the power supply voltage when the power is turned on and the rise characteristics of the output of the flip-flop itself. It is to be.

The present invention will be explained below with reference to examples. Figure 1 is an RS flip-flop circuit diagram using an operational amplifier 1 which has a diode D at its output and whose amplification can be considered _infinite . A voltage E- divided by R ₂ is applied as a bias, and a voltage E+ obtained by dividing the +B voltage by resistors R ₃ and R ₄ is applied to the non-inverting input terminal 1b as a bias. At the same time, the voltage Eo at the output terminal 1c is fed back (positive feedback) via the resistor _R5 .

In the circuit shown in FIG. 1, in normal operation, the non-inverting input terminal 1b of the operational amplifier 1 functions as a set input terminal, and the inverting input terminal 1a functions as a 1-set input terminal. When a voltage is applied to the former terminal 1b and the relationship E+>E- is established, the voltage Eo at the output terminal 1c becomes a positive high level (slightly lower than the +B voltage), and this state is due to the positive feedback effect. Continued by holding E+>E-,
Also, when a voltage is applied to the latter terminal 1a, E+<E-
When the relationship becomes, the voltage Eo at the output terminal 1c becomes a positive low level (approximately zero volts), and this state continues as E+<E- is maintained by the normal return action. That is, in this case, the output terminal 1c works as a Q output terminal.

Figure 2 shows the relationship between the inverting input terminal 1a and the resistor R 1 in order to see only the rise characteristics of the voltage E- to be applied to the inverting input terminal 1a and the voltage E+ to be applied to the non-inverting input terminal _1b when the +B power supply is turned on. , _R2 are separated from the common connection point 2, and a resistor _R6 is newly connected between the inverting input terminal 1a and the ground.
In this way, the rise characteristics of the voltage E- at the common connection point 2 and the voltage E+ at the non-inverting input terminal 1b can be observed without inverting or restoring the operational amplifier 1. Then, the voltage E- at the common connection point 2
appears as a curve with the rising characteristic of the +B voltage as it is, and the voltage E+ at the non-inverting input terminal 1b is influenced by the rising characteristic of the operational amplifier 1 because the output voltage Eo is fed back.

Therefore, the constant of each resistance in Fig. 2 is R ₁
= 39KΩ, R ₂ = 33KΩ, R ₃ = 39KΩ, R ₄ = 27K
Ω, R ₅ =47KΩ, and _R6 = 15KΩ, the relationship between the rise of the voltages E- and E+ with respect to the rise of the +B voltage was investigated, and is shown in FIG.

In this Figure 3, the voltage E+ rises in proportion to the rise in the +B voltage with an exact linear function, but
The voltage E- exhibits nonlinear characteristics similar to the forward voltage/current characteristics of a diode. This is because the output voltage Eo is affected by the rising characteristics of the diode and transistor in the operational amplifier 1, and this voltage
This is because Eo is positively fed back to the non-inverting input terminal 1b. And the voltages E- and E+ are +B voltage
It crosses when it is 3.5V, and when it is less than 3.5, E->E+,
When the voltage exceeds 3.5V, the relationship is E-<E+.

The operational amplifier 1 does not operate normally unless the +B voltage is 3V or higher. Therefore, returning to Fig. 1, for example, when operating this operational amplifier 1 with a +B voltage of 3V, the +B voltage is 0 to 3V when the power is turned on.
However, the relationship of voltage E->E+ remains unchanged. Therefore, in this case, the voltage Eo at the output terminal 1c of the operational amplifier 1 is preferentially directed to a low level when the power is turned on. In other words, priority is given to reset.

However, when operating the operational amplifier 1 with the +B voltage of 4V, the voltage E-<
Since the relationship is E+, the voltage Eo at the output terminal 1c is preferentially directed to a high level. In other words, priority is given to set.

As described above, according to the present invention, since the non-linear characteristic of the rise of the output voltage with respect to the rise of the power supply voltage of the operational amplifier is utilized, priority can be given to setting or resetting when the power is turned on, without requiring any special circuit configuration. You will be able to do it.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of an RS flip-flop according to an embodiment of the present invention, FIG. 2 is a circuit diagram for measuring voltages E- and E+, and FIG. 3 is a characteristic diagram of voltages E- and E+ with respect to the +B voltage.

Claims (1)

[Claims for Utility Model Registration] (1) A first voltage obtained by dividing the power supply voltage is applied as a bias to the inverting input terminal of the operational amplifier, and a second voltage different from the first voltage is applied to the non-inverting input terminal. In an RS flip-flop circuit configured by applying a voltage and feeding back the voltage at the output terminal, the rise characteristic of the first voltage at power-on has linearity with respect to the rise of the power supply voltage, and the second voltage has linearity with respect to the rise of the power supply voltage. The rise characteristic of the voltage when the power is turned on has non-linearity with respect to the rise of the power supply voltage, so that the above-mentioned linear rise characteristic curve and the above-mentioned non-linear rise characteristic curve cross each other. RS flip-flop circuit. (2) The RS flip-flop circuit according to claim 1, wherein the power supply voltage at the crossing point is set within the normal operating range of the operational amplifier. (3) The RS flip-flop circuit according to claim 2, wherein the power supply voltage for normal operation is set lower than the crossing point. (4) The RS flip-flop circuit according to claim 2, wherein the power supply voltage for normal operation is set higher than the crossing point.