JPH0332113Y2 - - Google Patents
Info
- Publication number
- JPH0332113Y2 JPH0332113Y2 JP1982058131U JP5813182U JPH0332113Y2 JP H0332113 Y2 JPH0332113 Y2 JP H0332113Y2 JP 1982058131 U JP1982058131 U JP 1982058131U JP 5813182 U JP5813182 U JP 5813182U JP H0332113 Y2 JPH0332113 Y2 JP H0332113Y2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- single pulse
- time constant
- capacitor
- input terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Manipulation Of Pulses (AREA)
Description
【考案の詳細な説明】
本考案は電源電圧の接断やその変動に対しても
安定した動作が得られる単一パルス発生回路に関
するものである。[Detailed Description of the Invention] The present invention relates to a single pulse generation circuit that can provide stable operation even when the power supply voltage is disconnected or disconnected and its fluctuations.
一般に、単一パルスを発生する回路としては、
モノステーブルマルチバイブレータや、微分回路
による単一パルス発生回路が用いられている。こ
れら従来の回路は、電源電圧をオンとした時、あ
るいは電源電圧がトランジエント的な変動を生じ
た時にいて入力信号が入らないにも抱らずパルス
が出力されてしまうという欠点があつた。 Generally, a circuit that generates a single pulse is
A monostable multivibrator or a single pulse generation circuit using a differential circuit is used. These conventional circuits have the disadvantage that when the power supply voltage is turned on or when a transient fluctuation occurs in the power supply voltage, a pulse is output without any input signal even though there is no input signal.
従来の微分回路を用いた単一パルス発生回路と
して、第１図に示す回路がある。図中、IC1，IC2
は演算増幅器、C1はコンデンサ、R1〜R5は抵抗
である。このうちコンデンサC1と抵抗R1とによ
り微分回路を構成し、抵抗R3，R4により差動増
幅器IC2の動作レベルを決定している。まず、入
力信号１０により差動増幅器IC1の出力が、第２
図ａに示すように、ロウレベルからハイレベルに
変化した場合、コンデンサC1、抵抗R1の時定数
で決定される微分波形（第２図ｂ）が、演算増幅
器IC2の入力に加わり、抵抗R3，R4で決定される
レベルを超えたレベルの時間だけ単一パルスとし
て、第２図ｃに示したように出力端子１１に発生
する。ここで入力端子１０に信号が加わらない状
態で電源電圧が、第２図ｄに示すように変動した
場合、入力信号が入つたかのように微分回路が動
作し、出力端子に、第１図ｅに示すような単一パ
ルスを発生することになる。これは従来のこの種
の単一パルス発生回路の共通した欠点である。 As a conventional single pulse generation circuit using a differentiating circuit, there is a circuit shown in FIG. In the figure, IC 1 , IC 2
is an operational amplifier, C1 is a capacitor, and R1 to R5 are resistors. Of these, the capacitor C 1 and the resistor R 1 constitute a differentiating circuit, and the resistors R 3 and R 4 determine the operating level of the differential amplifier IC 2 . First, the input signal 10 causes the output of the differential amplifier IC 1 to
As shown in Figure a, when the level changes from low level to high level, the differential waveform (Figure 2 b) determined by the time constant of capacitor C 1 and resistor R 1 is applied to the input of operational amplifier IC 2 , and the resistor A single pulse is generated at the output terminal 11, as shown in FIG. 2c, for the duration of the level exceeding the level determined by R 3 and R 4 . If the power supply voltage fluctuates as shown in Figure 2 d with no signal applied to the input terminal 10, the differentiator circuit operates as if an input signal were input, and the output terminal 10 receives a signal as shown in Figure 1 e. This will generate a single pulse as shown in . This is a common drawback of conventional single pulse generation circuits of this type.
本考案の目的は、これらの欠点を除き、電源電
圧のオンあるいは電源電圧の変動時にこれらのた
めに単一パルスを発生することなく安定した動作
が出来る単一パルス発生回路を提供することにあ
る。 The purpose of the present invention is to eliminate these drawbacks and provide a single pulse generation circuit that can operate stably without generating a single pulse when the power supply voltage is turned on or when the power supply voltage fluctuates. .
本考案の構成は、入力信号を結合する結合コン
デンサとこのコンデンサの負荷抵抗とによる時定
数によりその入力信号を微分して所定微分出力を
得る微分回路と、この微分回路を一方の入力端に
接続し他方の入力端に動作点を決めるバイアス電
圧が供給される差動増幅器とからなる単一パルス
発生回路において、前記他方の入力端と電源端子
との間に前記微分回路の時定数より大きい時定数
をもたせたコンデンサを挿入することにより、電
源変動により前記微分回路にパルス状の立上り信
号が入力した時にはパルスを出力しないようにし
たことを特徴とする。 The configuration of the present invention consists of a differentiating circuit that differentiates the input signal using a time constant caused by a coupling capacitor that combines the input signal and a load resistance of this capacitor to obtain a predetermined differential output, and this differentiating circuit is connected to one input terminal. and a differential amplifier whose other input terminal is supplied with a bias voltage that determines an operating point, when the time constant between the other input terminal and the power supply terminal is larger than the time constant of the differentiating circuit. The present invention is characterized in that by inserting a capacitor having a constant value, a pulse is not output when a pulse-like rising signal is input to the differentiating circuit due to power fluctuations.
次に図面を参照して本考案を詳細に説明する。 Next, the present invention will be explained in detail with reference to the drawings.
第３図は本考案の一実施例を示す回路図であ
る。図において、IC1，IC2は演算増幅器、C1，C2
は微分用コンデンサ、R1はコンデンサC1と微分
時定数を決定する抵抗、R3，R4は差動増幅器IC2
の動作レベルを決定する抵抗である。 FIG. 3 is a circuit diagram showing an embodiment of the present invention. In the figure, IC 1 and IC 2 are operational amplifiers, C 1 and C 2
is the differential capacitor, R1 is the capacitor C1 and the resistor that determines the differential time constant, R3 and R4 are the differential amplifier IC2
is the resistance that determines the operating level of the
まず、演算増幅器IC1の入力端子１０に、第４
図ａに示すような信号が与えられると、IC1の出
力には、第４図ｂに示すように、ロウレベルから
ハイレベルに変わる信号となり、演算増幅器IC2
の入力端子には、第４図ｃに示すように、時定数
C1R1で決定される微分波形が与えられ、IC2の出
力には第４図ｄに示すような単一パルスが発生す
る。 First, the fourth
When a signal as shown in Figure a is applied, the output of IC 1 becomes a signal that changes from low level to high level as shown in Figure 4b, and the operational amplifier IC 2
As shown in Figure 4c, the input terminal of
A differential waveform determined by C 1 R 1 is given, and a single pulse as shown in FIG. 4d is generated at the output of IC 2 .
次に、入力端子１０に信号が加わらずに、電源
電圧が第４図ｅに示すように変動した場合、IC2
の入力端子には第４図ｆの実線に示すような時定
数C1R1で決定される微分波形が与えられる。ま
たIC2の他方の入力端子に加えられている動作レ
ベルも時定数C2R4により第４図ｆの点線に示す
ような波形が得られる。すなわち、IC2の出力は
信号入力端子の電圧が他方のバイアス入力端子の
電圧よりも高くなつた時に出力が発生するので、
時定数C1R1よりも時定数C2R4のほうを大きくな
るよう選んでおけば電源電圧オン時あるいは電源
電圧変動に対して単一パルスが出力することはな
い。 Next, if no signal is applied to the input terminal 10 and the power supply voltage fluctuates as shown in Figure 4e, IC 2
A differential waveform determined by the time constant C 1 R 1 as shown by the solid line in FIG. Also, the operating level applied to the other input terminal of IC 2 has a waveform as shown by the dotted line in FIG. 4f due to the time constant C 2 R 4 . In other words, the output of IC 2 occurs when the voltage at the signal input terminal becomes higher than the voltage at the other bias input terminal, so
If the time constant C 2 R 4 is selected to be larger than the time constant C 1 R 1 , a single pulse will not be output when the power supply voltage is turned on or when the power supply voltage fluctuates.
以上説明したように、本考案の単一パルス発生
回路は、電源電圧オン時あるいは電源電圧変動時
においても、これらの影響による出力パルスが発
生せず安定した動作が得られる利点がある。この
単一パルス発生回路は電源をオン／オフする装置
内において回路のオープン／シヨートを検出し、
その検出信号を単一パルスに変換したり、また長
いパルス信号を規定の短かいパルス幅に変換する
回路として使用すれば有効である。 As explained above, the single pulse generating circuit of the present invention has the advantage that even when the power supply voltage is on or when the power supply voltage fluctuates, no output pulse is generated due to these influences, and stable operation can be obtained. This single pulse generation circuit detects open/short circuits in devices that turn on/off power,
It is effective if used as a circuit that converts the detection signal into a single pulse or converts a long pulse signal into a prescribed short pulse width.
第１図は従来の微分による単一パルス発生回路
の回路図、第２図ａ〜ｅは第１図の動作波形図、
第３図は本考案の実施例の回路図、第４図ａ〜ｆ
は第３図の動作波形図である。図において、
１０……入力端子、１１……出力端子、IC1，
IC2……演算増幅器、C1，C2……コンデンサ、
CR1……ダイオード、R1〜R5……抵抗である。
Figure 1 is a circuit diagram of a conventional single pulse generation circuit using differentiation, Figures 2 a to e are operational waveform diagrams of Figure 1,
Figure 3 is a circuit diagram of an embodiment of the present invention, Figures 4 a to f
is an operating waveform diagram of FIG. 3. In the figure, 10...input terminal, 11...output terminal, IC 1 ,
IC 2 ... operational amplifier, C 1 , C 2 ... capacitor,
CR1 ...Diode, R1 to R5 ...Resistors.
Claims (1)
デンサの負荷抵抗とによる時定数によりその入力
信号を微分して所定微分出力を得る微分回路と、
この微分回路を一方の入力端に接続し他方の入力
端に動作点を決めるバイアス電圧が供給される差
動増幅器とからなる単一パルス発生回路におい
て、前記他方の入力端と電源端子との間に前記微
分回路の時定数より大きい時定数をもたせたコン
デンサを挿入することにより、電源変動により前
記微分回路にパルス状の立上り信号が入力した時
には単一パルスを出力しないようにしたことを特
徴とする単一パルス発生回路。 a differentiating circuit that obtains a predetermined differential output by differentiating the input signal using a time constant caused by a coupling capacitor that couples the input signal and a load resistance of the capacitor;
In a single pulse generation circuit consisting of a differential amplifier connected to one input terminal of this differentiating circuit and a bias voltage that determines the operating point is supplied to the other input terminal, the circuit is connected between the other input terminal and the power supply terminal. A capacitor having a time constant larger than the time constant of the differentiating circuit is inserted into the differentiating circuit, so that a single pulse is not output when a pulse-shaped rising signal is input to the differentiating circuit due to power fluctuations. Single pulse generation circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5813182U JPS58161333U (en) | 1982-04-21 | 1982-04-21 | Single pulse generator circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5813182U JPS58161333U (en) | 1982-04-21 | 1982-04-21 | Single pulse generator circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58161333U JPS58161333U (en) | 1983-10-27 |
| JPH0332113Y2 true JPH0332113Y2 (en) | 1991-07-08 |
Family
ID=30068536
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5813182U Granted JPS58161333U (en) | 1982-04-21 | 1982-04-21 | Single pulse generator circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58161333U (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005348124A (en) * | 2004-06-03 | 2005-12-15 | Kawasaki Microelectronics Kk | Digital signal input circuit |
| JP2006080594A (en) * | 2004-09-07 | 2006-03-23 | Matsushita Electric Ind Co Ltd | Timer circuit |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4714050U (en) * | 1971-03-17 | 1972-10-19 | ||
| JPS54121653A (en) * | 1978-03-15 | 1979-09-20 | Hitachi Ltd | Trigger pulse formation circuit |
| JPS5930338B2 (en) * | 1978-09-18 | 1984-07-26 | 株式会社ケンウッド | monostable multivibrator |
-
1982
- 1982-04-21 JP JP5813182U patent/JPS58161333U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58161333U (en) | 1983-10-27 |
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