JPH0267638U - - Google Patents
Info
- Publication number
- JPH0267638U JPH0267638U JP14669288U JP14669288U JPH0267638U JP H0267638 U JPH0267638 U JP H0267638U JP 14669288 U JP14669288 U JP 14669288U JP 14669288 U JP14669288 U JP 14669288U JP H0267638 U JPH0267638 U JP H0267638U
- Authority
- JP
- Japan
- Prior art keywords
- chip
- semiconductor device
- resin
- island
- mold
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- 238000000034 method Methods 0.000 claims description 3
- 239000011347 resin Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 claims description 3
- 238000001721 transfer moulding Methods 0.000 claims description 3
- 238000007789 sealing Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 3
- 238000000465 moulding Methods 0.000 description 1
Landscapes
- Moulds For Moulding Plastics Or The Like (AREA)
- Injection Moulding Of Plastics Or The Like (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Description
第1図ないし第4図は本考案の実施例、第5図
ないし第8図は従来例に関し、第1図は樹脂封止
形半導体装置の平面図、第2図は第1図の断面図
、第3図はアイランド部に対するチツプのマウン
ト位置を表したリードフレームの平面図、第4図
はトランスフア成形工程図、第5図は樹脂封止形
半導体装置の断面図、第6図はチツプをマウント
したリードフレームの平面図、第7図はトランス
フア成形工程図、第8図は成形後の半導体装置の
断面図である。図において、
1:チツプ、2:アイランド部、5:樹脂封止
パツケージ、6:リードフレーム、7:トランス
フア成形用金型、7a:上型、7b:下型、7c
:キヤビテイ、7d:ランナ、7e:ゲート。
Figures 1 to 4 relate to an embodiment of the present invention, Figures 5 to 8 relate to a conventional example, Figure 1 is a plan view of a resin-sealed semiconductor device, and Figure 2 is a sectional view of Figure 1. , Fig. 3 is a plan view of the lead frame showing the mounting position of the chip with respect to the island portion, Fig. 4 is a diagram of the transfer molding process, Fig. 5 is a cross-sectional view of the resin-sealed semiconductor device, and Fig. 6 is a diagram of the chip. FIG. 7 is a diagram of the transfer molding process, and FIG. 8 is a cross-sectional view of the semiconductor device after molding. In the figure, 1: chip, 2: island part, 5: resin sealing package, 6: lead frame, 7: transfer mold, 7a: upper mold, 7b: lower mold, 7c
: Cavity, 7d: Runner, 7e: Gate.
Claims (1)
ントしてなる半導体装置の仮組立体を金型にイン
サートし、トランスフア成形法によりチツプ、ア
イランドの周囲を樹脂封止した樹脂封止形半導体
装置において、アイランド部に対するチツプのマ
ウント位置をマウント部の中央位置からずらし、
金型へのインサート状態でキヤビテイに開口する
ゲート口と反対側の端縁にてアイランド部とチツ
プとの端縁が略面一に揃うように位置決めしてマ
ウントしたことを特徴とする樹脂封止形半導体装
置。 In a resin-molded semiconductor device, a temporary assembly of a semiconductor device consisting of a chip mounted on an island part of a lead frame is inserted into a mold, and the periphery of the chip and island is sealed with resin using the transfer molding method. Shift the mounting position of the chip from the center position of the mount part,
A resin sealing device characterized in that the chip is positioned and mounted so that the end edges of the island portion and the chip are substantially flush with each other at the end opposite to the gate opening opening into the cavity when inserted into a mold. shaped semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14669288U JPH064578Y2 (en) | 1988-11-10 | 1988-11-10 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14669288U JPH064578Y2 (en) | 1988-11-10 | 1988-11-10 | Resin-sealed semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0267638U true JPH0267638U (en) | 1990-05-22 |
| JPH064578Y2 JPH064578Y2 (en) | 1994-02-02 |
Family
ID=31416420
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14669288U Expired - Lifetime JPH064578Y2 (en) | 1988-11-10 | 1988-11-10 | Resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH064578Y2 (en) |
-
1988
- 1988-11-10 JP JP14669288U patent/JPH064578Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH064578Y2 (en) | 1994-02-02 |
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