JPH0267729A - Semiconductor device - Google Patents

Abstract

PURPOSE:To enable an input/output signal to be taken out of a pad directly through an arbitrary wiring layer without increasing chip area in a semiconductor device having multiple wiring layers by arranging and connecting all the wiring layers in the pad. CONSTITUTION:For example, in a semiconductor device having three wiring layers, a third wiring layer 11 and a second wiring layer 12 are connected to each other at a contact hole 14, and the second wiring layer 12 and a first wiring layer 13 are connected to each other at a contact hole 15. All the wiring layers are arranged and connected in this pad so that an input/output signal can be led out from the pad directly through the first wiring layer 26. The input/output signal can also equally be taken out through the second or the third wiring layer, and because all the wiring layers are arranged and connected in the pad, the input/output signal can be taken out from the pad directly through an arbitrary wiring layer without increasing chip area.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application 1] The present invention relates to a semiconductor device, and particularly to a method for extracting input/output signals.

[Prior Art 1] Hereinafter, a conventional technique will be described based on a case where input/output signals are taken out in the first wiring layer in a semiconductor device having three wiring layers.

The conventional example mentioned above was as shown in FIG.

As shown in FIG. 3, the pad has a single-layer structure with the third wiring layer 31 at the top, and when input/output signals are taken out from the pad through the first wiring layer 33, the third wiring layer 31 is placed on the outside of the pad. The wiring layer 31 and the second wiring layer 32 were connected through 34 contact holes, and the second wiring layer 32 and the first wiring layer 33 were connected through 35 contact holes. .

In the above, the conventional example has three wiring layers and the input/output signal is extracted from the pad through the first wiring layer. Even when input/output signals are routed through an arbitrary wiring layer, conventionally, as in the conventional example shown in FIG. The wirings M were individually connected through contact holes.

[Problem to be Solved by the Invention 1] Today, in semiconductor devices, there is a remarkable tendency to increase the multilayer wiring ratio in order to reduce the chip area.

In a semiconductor device having multiple wiring layers, when an input/output signal is extracted from a pad through an arbitrary wiring layer, conventional techniques have had problems such as an increase in chip area and deterioration in quality due to the following reasons.

1. The distance between the pad and the arbitrary wiring layer increases as the arbitrary wiring layer becomes a lower layer.

2. In particular, when a large current such as an output signal flows, it is necessary to increase the area of the contact hole connecting each wiring layer to prevent the wiring from melting. On the other hand, if the chip area is limited and the area of the contact holes connecting each wiring layer is insufficient, the problem of wiring melting occurs.

Therefore, the present invention solves the above-mentioned problems, and provides a semiconductor device that allows input/output signals to be taken out directly from pads through any wiring layer without increasing the chip area, and has improved quality. The purpose is to

[Means for Solving the Problems] A semiconductor device of the present invention includes a) an IC, b) at least two or more metal wiring layers, and C) a pad, and d) the pad is one of the at least two or more layers. All metal wiring layers are provided, and all of the at least two or more metal wiring layers are connected through contact holes, and e) Any metal wiring layer inside the IC is directly connected to the pad. It is characterized by what it did.

[Example 1] The present invention will be described below using an example of a semiconductor device having three wiring layers.

FIGS. 1(a) and 1(b) are a plan view and a sectional view, respectively, showing a basic embodiment of the pad of the present invention. In FIG. 1, 11 is the third wiring layer, 12 is the second wiring layer, and 13 is the third wiring layer.
is the first wiring layer, the above-mentioned 11 and 12 are connected through 14 contact holes, and the above-mentioned 12 and 13 are connected through 15 contact holes, respectively. Figure 2 (a), (b)
) connects the input/output signals from the pad shown in FIG.
FIG. 7 is a plan view and a cross-sectional view, respectively, showing an example in which wiring is drawn out at the second wiring layer. As shown in Figure 2, all wiring layers are arranged and connected at the pad shown in Figure 1, so input/output signals can be routed directly from the pad to the first layer wiring without increasing the chip area. It can be drawn out at layer 26.

The same thing can be said when extracting input/output signals from the second and third wiring layers.Since all wiring layers are arranged and connected to the pads, the chip area does not increase. Input/output signals can be directly extracted from the pad through any input/output wiring layer, and the following effects are also achieved.

1. The area of the contact hole that connects each wiring layer can be made larger than the conventional example without affecting the chip area, and therefore the permissible current value in the contact hole is large and wiring melting can be prevented. .

2. The thickness of the connection between each wiring layer is thicker than in the conventional example because all the wiring layers overlap, so the connection resistance between each wiring layer is reduced and the speed is increased.

3. The contact area between the wire ball and the pad during bonding is larger because it is a three-dimensional contact than the conventional planar contact, and therefore the contact resistance is reduced and the speed is increased.

Although the above description has been made regarding a semiconductor device having three layers of wiring, the same thing can be said not only in the above embodiment but also in cases where the device has a multilayer wiring layer other than three layers by arranging and connecting all the wiring layers to the pads. .

〔Effect of the invention〕

According to the present invention, in a semiconductor device having multiple wiring layers, the following effects can be achieved by arranging and connecting all wiring layers to pads.

1. It is possible to take out input/output signals directly from the pad to any wiring layer without increasing the chip area.

2. The area of the contact hole that connects each wiring layer can be made larger than the conventional example without affecting the chip area, and therefore, the permissible current value in the contact hole is increased and wiring melting can be prevented. .

3. The thickness of the connection between each wiring layer is thicker than in the conventional example because all the wiring layers overlap, so the connection resistance between each wiring layer is reduced and the speed is increased.

4. The contact area between the wire ball and the pad during bonding is larger because it is a three-dimensional contact than the conventional planar contact, and therefore the contact resistance is reduced and the speed is increased.

A plan view, a sectional view, and a third diagram showing the basic embodiment of the
Figures (a) and (b) are a plan view and a sectional view, respectively, showing a conventional example.

1 l, l　2、 l　3. 14. 21. 22. 22, l　5. 31 ・ ・ ・ ・ 32 ・ ・ ・ ・ 26, 32・ 24, 25, ・3rd layer wiring layer ・Second wiring layer ・1st wiring layer 34.35 ・Contact hole that's all Applicant: Seiko Epson Corporation Agent: Patent attorney Homare Kamiyanagi (1 other person)

[Brief explanation of the drawing]

FIGS. 1(a) and 1(b) are a plan view and a sectional view showing a basic embodiment of the pad of the present invention, and FIGS.
b) is the method of extracting input/output signals (O-) (b) School 1) Request (F))

Claims (1)

[Scope of Claims] a) A semiconductor integrated circuit (hereinafter abbreviated as IC), b) at least two or more metal wiring layers, and c) a metal connection part (hereinafter referred to as IC) for wire connection between an IC external device and the IC. d) the pad comprises all of the at least two or more metal wiring layers, and is configured by connecting all of the at least two or more metal wiring layers with a contact hole. , e) and a semiconductor device characterized in that an arbitrary metal wiring layer inside the IC and the pad are directly connected.