JPH027178B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a production equipment system for semiconductor devices, and more particularly to a production equipment system for automatically producing semiconductor devices in an integrated manner.

In general, semiconductor devices are made from single crystal semiconductor wafers, which undergo epitaxial growth, oxidation, resist processing (resist coating, exposure, development, etching), impurity doping (thermal diffusion or ion implantation), vapor phase growth (polycrystalline silicon, A series of processes such as silicon nitride film, silicon oxide film, etc.) and electrode wiring material deposition are repeated. Each of these processes is interrelated, and the optimal conditions are determined within the overall flow.

Conventionally, control within this process has been increasingly automated, and quality control technology based on the accumulation of various data has already become sophisticated. However, wafers are still transferred between processes or by a simple robot or conveyance device. Therefore, if you try to correct the effects of fluctuations in the previous process in the subsequent process, you will have to rely on manual control within each process, making it difficult to eliminate "people" who are the source of dust from the production line. Ta.

SUMMARY OF THE INVENTION An object of the present invention is to provide a technology for manufacturing semiconductor devices by automating the connecting parts between processes and making at least a portion of the semiconductor device manufacturing line an integrated production line.

The present invention provides an inspection system having an automatic inspection mechanism between manufacturing equipment M _{N of a certain process P N and} manufacturing equipment M N+ ₁ of the next process P _N+1 in a semiconductor device production equipment system. Introduce a device C _N , set the median value of the inspection item and the upper and lower limits of the allowable range in advance on the inspection device C _N , and if the inspection result is the median value, the product will be manufactured in the next process P _N+1. If the inspection result is out of the standard, it will be considered defective and will not be sent to the manufacturing equipment M _{N+1 in the} next process, and even if it is within the standard, the If it deviates to the side, the manufacturing equipment M _{N+1 of the next process P N+1 or} the manufacturing equipment M _N+M of the subsequent process P N _+M will be processed to compensate for the deviation. If the value deviates from the median value to the negative side, the compensation will be applied to the manufacturing equipment M _N+1 of the next process P _N +1 or the manufacturing equipment M _N+M of the subsequent process P N+ _M . The manufacturing equipment for the next process P _N+1 is instructed to perform processing to compensate in the opposite direction.
The manufacturing line is configured to proceed to M _N+1 , and each of the manufacturing devices is controlled by a computer, the computer is connected to a parent computer together with the inspection device, and the inspection results are processed by the parent computer, Production of a semiconductor device characterized in that the instruction for compensation is sent from the parent computer to the computer of a predetermined manufacturing device, and thereby the semiconductor device is manufactured in a completely automated manner including the compensation. It is a device system.

Further, the present invention provides a semiconductor device production equipment system in which a manufacturing equipment M _N of a certain process P _N and a next process P _N+1
An inspection device C _N with an automatic inspection function is introduced between the manufacturing device M _{N +1} of If the inspection result is the median value, the product is allowed to proceed to the next process, but if the inspection result is out of specification, it is considered defective and sent to the next process, manufacturing equipment M _{N+ 1 in P N+1.} does not proceed, and even if it is within the specification, if it deviates from the median value to the positive side, the next process
P _N+1 manufacturing equipment M _N+1 or subsequent processes
Instruct the manufacturing equipment M _N+M of P _N+M to process to compensate for the deviation, and also instruct the manufacturing equipment M _{N of process P N to} set conditions to bring it closer to the median value. , and if it deviates from the median value to the negative side, then the corresponding deviation with respect to the manufacturing device M _N+1 of the next process P _N+ 1 or the manufacturing device M _N+M of the subsequent process P _N+M At the same time, the manufacturing equipment M _N of the process P _N is instructed to compensate for the amount of
is instructed to change the conditions to bring it closer to the median value, and the product is transferred to the manufacturing equipment for the next process P _N+1.
Configuring a manufacturing line that advances to _M Production of a semiconductor device characterized in that the instruction for compensation is sent from the parent computer to the computer of a predetermined manufacturing device, and thereby the semiconductor device including the compensation is completely automated to be manufactured. It is a device system.

According to the present invention, manufacturing equipment M _N of process P _N and the next process
It becomes possible to connect P _N+1 's manufacturing equipment M _N+1 and automate it, making it possible to consistently manufacture semiconductor devices.

Furthermore, the present invention eliminates the need for humans, who are the source of development, to be on the production line, so the production line can be maintained at a high level of cleanliness. Furthermore, due to the above two effects, there is also the accompanying effect that semiconductor devices can be produced with uniform quality. Furthermore, due to the above effects, the operating rate of the manufacturing equipment can be increased and productivity can be improved.

Next, embodiments of the present invention will be described with reference to the drawings.

First, a conventional method will be explained for comparison. 1st
FIG. 2 shows a conventional technique. FIG. 1 shows a method of analyzing data and changing the process after completing the final test, and information on the finished product is required to change the process to increase the rate of non-defective products. Also, in the method shown in Figure 2, as shown in Figure 1, process changes are made based on not only information on the finished product but also information on intermediate processes, but in both cases the system changes the conditions of the previous process after inspection. , the inspection data is not sent to the next process. Therefore, a product that once deviates from the median value will continue to carry that ``deviation'' until the end without being compensated for.

On the other hand, FIG. 3 is a diagram for explaining the system of one embodiment of the present invention. In other words, a system with an inspection function is introduced between the process P _N+1 and it is possible to check whether the processed dimensions or physical measurement values of the products that have passed through the process P _N deviate positively or negatively from the standard median value. For example, if there is a positive deviation, then whether or not it is within the standard is verified. If it is out of specification, we have no choice but to re-do the work or go out of business, but if it is within the specification, information is sent to the next process P _N+1 that the item has deviated to the positive side in the previous process P _N. Then, the conditions of the process P _N+1 are changed to compensate for the deviation to the positive side in the process P _N+1 . The same is true if there is a deviation on the negative side, and a mechanism is provided that gives an instruction to change the conditions of process P _N+1 so that process P _N+1 compensates for the deviation on the negative side in the opposite direction.

FIG. 4 is a diagram illustrating the method of the second embodiment of the present invention. In other words, it is first verified whether the processed dimensions or physical measurement values of the product that has gone through the process P _N deviate positively or negatively from the median value of the preset standard. If there is
Next, it is verified whether the deviation is within the specifications or outside the specifications.

If the value is outside the standard, the work must be rebuilt or disposed of. Also, if it is within the specifications, the next process P _N+1
, information is given that the product has deviated to the positive side in the previous process P _N , and the conditions of the next process P _N+1 are changed to compensate for the deviation to the positive side in process P _N+1. Do it like this. Regardless of whether it is within or outside of the standard, information that deviates to the positive side is transmitted to the previous process P _N , and the process P _N itself changes its conditions and corrects it. The same goes for _the case where the deviation is to the negative side _.
Configure a system that instructs corrective action in each case.

By incorporating the methods shown in FIGS. 3 and 4 into production equipment and establishing a technology for manufacturing as an integrated production system, the quality of the product and the manufacturing line itself will become stable.

This will be explained in more detail by giving an example. Figure 5 is
It is part of the manufacturing process for integrated circuits using MOS field effect transistors, and includes the etching process of polycrystalline silicon that will become the gate electrode and the subsequent source and
This figure shows a drain forming step. That is, it passes through the polycrystalline silicon film growth process P _N-1 , passes through the polycrystalline silicon processing process P _N , and then enters the source/drain formation process.
This is the part leading to P _N+1 . To explain in detail, as shown in FIG. 5B, the polycrystalline silicon film 5 made in step P _N-1
A resist film 52 is applied on top of the resist film 52, and after being lightly baked at about 50° C. for about 10 minutes, alignment exposure is performed, and then the resist film 52 is developed using a developer and its appearance is inspected. Approximately 200 if there are no abnormalities.
Bake at ℃ for 1 hour. Next, the polycrystalline silicon film 51 is plasma etched using a CF ₄ -based gas, and then the resist film 52 serving as an etching mask is peeled off and the film is sent to an inspection system C _N.
Here, it is assumed that FIG. 6 shows an example of the inspection data of the width of the polycrystalline silicon gate electrode after etching, and that the value of wafer N has just been measured. A commercially available length measuring machine using a laser beam may be used for dimension measurement, and the wafer may be transported up to this point using an air belt method or a robot vehicle. Now, like wafer N, the seventh
The median value of L in Figure A is 2μm, which is within the standard (2μ±0.2μ).
However, it is assumed that the processed width L of the polycrystalline silicon 71 is 2.1μ, which is on the positive side as shown in FIG. 7B. Since this wafer is within the specifications, the process proceeds directly to step P _N+1 in FIG. 5 in which As ions are implanted to form the next source 53 and drain 54. However, at that time, the results from the inspection system C _N are transmitted to this process P _N+1 , and the nitrogen flow after ion implantation is a process of heat treatment at 1000℃ for 30 minutes. By performing heat diffusion in the lateral direction, the effective channel length Leff is automatically changed as shown in Figure 7C and D, in the same way as when the polycrystalline silicon gate electrode width L is the median value. Adjust the heat treatment furnace system. As a result, the process P _N
This means that the fluctuations in the system of process P _{N+1 have been compensated for by the system of process P N+1} .

The above example corresponds to the flow shown in Figure 3, but the information from the inspection system C _N is transmitted to the process P _N-1 at the same time, and the conditions of the etching equipment system are changed to make the next etching time a little longer. By adjusting the amount of etching in the lateral direction, L is
If it is set to 2.0μ, this corresponds to the embodiment shown in FIG.

FIG. 8 further schematically shows the above example. . That is, the flow of wafers 80 is depicted as a cross-sectional view of a belt conveyor, and a control device is connected thereto. This will be explained in conjunction with FIG. 5. In FIG. 8, a wafer 80 is sent from I to a polycrystalline silicon growth apparatus 81 by a belt conveyor 81'. A computer M _{N-1,K controls this polycrystalline silicon growth apparatus 81,} and this computer M _N-1,K is a parent computer.
Connected to R _N-1 . If necessary, this parent computer R _N-1 is further connected to a higher-level computer CPU. After the polycrystalline silicon is grown, the wafer 80 is sent to the film quality inspection device C _N-1 , where the film thickness, layer resistance, grain size, etc. are inspected, and the values are sent to the parent computers R _N-1 and R _N. Sent. It is processed whether the value deviates to the positive side or negative side from the median value, and whether the value of the deviation is within the standard.
The countermeasures are instructed from the parent computers R _N-1 and R _N to the necessary control devices. If it is within the specifications, the wafer 80 is sent to a resist coating device 82 and is coated with a resist solution, for example, by rotation. After that, about
After being sent to a drying oven 83 at 100° C. and lightly baked for a certain period of time as a pretreatment, the mask pattern and the wafer are aligned in an exposure device 84 and exposed to ultraviolet rays. Subsequently, the wafer 80 is developed in a developing device 85, and its appearance is checked in a visual inspection device C _N ', and then the resist is hardened in a baking furnace 86 in an atmosphere of 150°C. Thereafter, the wafer 80 is sent to a dry etcher 87 to dry-etch the polycrystalline silicon, then sent to a plasma assher 88 to remove the resist film, and then checked by an inspection device _CN . During this time, all the devices from the resist coating device 82 to the plasma asher 88 are controlled by computers M _N1 to M _N7 , and these computers M _N1 to M _N7 are further connected to the parent computer R _N , if necessary, to a higher-level computer CPN. ing. The inspection device C _N checks the dimensions, shape, etc. of the polycrystalline silicon etching pattern, and information such as whether the values are within the specifications and whether the deviation is positive or negative is sent to the parent computers R _N and R _N respectively. ₊₁ ,
The system is such that the information is communicated to the upper computer CPU and instructions for countermeasures are requested. After the above-mentioned appropriate instructions are given, the in-spec wafer is sent to the next ion implanter 89, and the required amount of ions is implanted under conditions adjusted based on the instructions.

Although the connection between the etching process and the impurity doping process has been described above, the present invention can connect all processes using the same concept. As a result, the production line has a self-normalizing ability, and the quality of the finished product is also extremely uniform. Furthermore, as an embodiment of the present invention, only the case where the fluctuation in the process P _N is compensated for only in the next process P _N+1 was illustrated, but the present invention is not limited to just such a case, but also compensates for the fluctuation in the process P _N Next process
Compensation may be performed at P _N+1 or in subsequent steps if necessary. Furthermore, in the embodiment of the present invention, the route in which the final inspection results as shown in Figures 1 and 2 require changing conditions in each process is omitted; Needless to say, there is nothing that can be added.

[Brief explanation of drawings]

1 and 2 are diagrams showing a typical conventional semiconductor device manufacturing process for comparison with the present invention, and FIGS. 3 and 4 are diagrams showing the first and second embodiments of the present invention. A semiconductor device manufacturing process diagram shown in FIG. 5A
and B are a process diagram and a corresponding cross-sectional view of a semiconductor wafer, respectively, to explain the embodiment of the present invention in more detail, and FIGS. 6 and 7 are quality diagrams of some processes to explain FIG. 5 in more detail. These are a control chart and a wafer cross-sectional view, and FIG. 8 is a system configuration diagram schematically showing the flow of FIG. 5. In the figure, 51, 71... polycrystalline silicon, 52... resist film, 53... source, 54
...Drain, 80...Wafer, 81...Polycrystalline silicon growth device, 81'...Belt conveyor,
82...Resist coating device, 83...Drying oven, 8
4... Exposure device, 85... Developing device, 86... Baking furnace, 87... Dry etcher, 88... Plasma assher, 89... Ion implantation device.

Claims (1)

[Claims] 1. In a semiconductor device production equipment system, there is an automatic connection between the manufacturing equipment M _N of a certain manufacturing process P _N and the manufacturing equipment M _N+1 used in the next manufacturing process P N _+1. An inspection device C _N with an inspection function is introduced, the median value and tolerance range of inspection items are set in advance on the inspection device C _N , and if the inspection result is the median value, the product is manufactured as is in the manufacturing process P _N+1. Proceed to equipment M _N+1 , and if the inspection result deviates from the median value to the positive side, if it is out of specification, it is considered a defective product and is not allowed to proceed to manufacturing equipment M _N+1 in the next process P _N+1. figure,
If it is within the specifications, the manufacturing equipment for the next process P _N+1
M _N+1 or later process P _N+M manufacturing equipment
M _N+M is instructed to perform processing to compensate for the deviation toward the positive side, and if the inspection result deviates from the median value to the negative side, if it is out of specification, it is considered a defective product and goes to the next process.
Do not proceed to the manufacturing device M _N+1 of P _N+1. If it is within the specifications, the manufacturing device M _{N +1} of the next process P _N+ 1 or the manufacturing device M _N of the subsequent process P _{N+M +M} is configured to instruct to take measures to compensate for the deviation to the negative side, and the product is advanced to the manufacturing equipment M _N+ 1 of the next process P _N+1 , and furthermore, each of the above The manufacturing equipment is controlled by a computer, the computer is connected to a parent computer together with the inspection equipment, the inspection results are processed by the parent computer, and the compensation instruction is sent from the parent computer to the computer of a predetermined manufacturing equipment. 1. A semiconductor device production equipment system, characterized in that the semiconductor device manufacturing system is configured such that semiconductor devices are manufactured completely automatically including the compensation. 2 In a semiconductor device production equipment system, an inspection device C having an automatic inspection function between manufacturing device M _N of a certain manufacturing process P _N and manufacturing device M _{N+1 of} the next manufacturing process P N+1. _N is introduced, the median value and tolerance range of the inspection items are set in advance on the inspection device C _N , and if the inspection result is the median value, the product is directly transferred to the manufacturing device of process P _N+1.
Proceed to M _N+1 , and if the inspection result deviates from the median value to the positive side, if the value is out of specification, it will be considered a defective product and will not proceed to the manufacturing equipment M _N+1 of the next process P _N+1. , if it is within the standard, the deviation on the positive side is compensated for the manufacturing equipment M _N+1 of the next process P _N+1 or the manufacturing equipment M _{N+M of} the subsequent process P N+M. instruct, and
The manufacturing equipment M _N of the process P _N is instructed to change the conditions to bring it closer to the median value, and on the other hand,
If the inspection result deviates from the median value to the negative side and the value is outside the standard, it is considered a defective product and is not allowed to proceed to the manufacturing equipment M _N+1 of the next process P _N+1 , even if the value is within the standard. For example, instruct the manufacturing equipment M _N+1 of the next process P _N+M or the manufacturing equipment M _N+M of the subsequent process P _N+1 to compensate for the deviation on the negative side, and also The configuration is such that the manufacturing equipment M _N of _N is instructed to change the conditions to bring it closer to the median value, and the product is sent to the manufacturing equipment M N ₊ 1 of the next process P _N+1 , and further, the above Each manufacturing device is controlled by a computer,
The computer is connected to a parent computer together with the inspection device, the inspection results are processed by the parent computer, and the instruction for compensation is sent from the parent computer to the computer of a predetermined manufacturing device. 1. A semiconductor device production equipment system characterized by completely automated manufacturing of semiconductor devices.