JPH027271A - Digital data modulator/demodulator - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital data modulation/demodulation device, and particularly to a digital data modulation/demodulation device suitable for recording and reproducing digital data with a tape recorder.

[Conventional technology]

Conventionally, in analog recording, the signal level corresponded linearly to the depth of the sound groove and magnetic tape magnetic flux density, whereas in digital recording, the level of the signal corresponded linearly to the depth of the sound groove and the magnetic flux density of the magnetic tape, whereas in digital recording, the level of the signal corresponded linearly to the depth of the sound groove and the magnetic flux density of the magnetic tape.
It is only necessary to be able to discriminate whether it is I or not, and there is no influence from nonlinearity of the medium, so the performance is excellent. Therefore, these days it is used for audio purposes.

DAT (Digital Audio Tape)
recorder) is being used.

In addition, because digital data was recorded and played back on magnetic tape using digital recording, a very wide range of frequencies had to be handled, so a rotating head mechanism was installed.
We are expanding the frequency band.

An example of a related patent is Equity 111'? 5
No. 1-21054 is mentioned.

[Problem to be Solved by the Invention] In the above-mentioned conventional technology, since digital data is recorded using a digital recording method, it is difficult to record the data on a tape recorder. Furthermore, even if digital data is converted to analog data using a D/A converter and recorded in analog form, there are limitations on frequency characteristics and poor phase characteristics, so errors in the digital values may occur when played back and converted to digital data. The problem was that it occurred frequently.

SUMMARY OF THE INVENTION An object of the present invention is to provide a digital data modulation/demodulation device that solves the conventional problems, enables recording of digital data on a tape recorder, and reduces read errors during playback.

[Means to solve the problem]

In order to solve the above problems, the digital data modulation/demodulation device of the present invention includes a modulation means for modulating input digital data to a peak-to-peak value of a certain carrier wave, and a modulation means for outputting the modulated signal to an external tape recorder. The present invention is characterized by comprising an interface, an interface for inputting a signal from the external tape recorder, and demodulation means for demodulating a peak-to-peak value of a signal reproduced from the external tape recorder into corresponding digital data. be.

[Effect]

In the present invention, by modulating digital data into a frequency band that can be handled by a cassette tape recorder and recording it in analog form, it is possible to record and reproduce digital data with a [,Q' circuit configuration.

〔Example〕

Hereinafter, one embodiment of the present invention will be described in detail with reference to one drawing.

FIG. 1 is a block diagram of a digital data modulation/demodulation device showing one embodiment of the present invention.

In Fig. 1, 1 is an input/output interface unit for inputting and outputting digital data, and 2 is a digital data modulation/demodulation unit that modulates input digital data to a certain carrier level during recording and performs digital demodulation during playback. 3 is a D/A converter that performs digital/analog conversion of the modulated signal, and 4 is a low pass filter for removing harmonic components.
r), 5 is a tape recorder that records an analog signal from which harmonic components have been removed, 6 is a peak detector section that detects the peak value of the signal from the tape recorder 5, and 7 is an A/D
This is the conversion section.

FIG. 2 is a diagram for explaining the principle of the level modulation method used in this embodiment. This is 11 Q 3+ to 2
Vp-p (Vp-p: P') - H') Voltage>,
1" as a signal of 4VP-.This method allows digital data to be represented by the frequency of the carrier wave, so by taking the carrier wave to a frequency that can be handled by the tape recorder, recording on the tape recorder is possible. Also, if the speed of the input data exceeds the frequency range that can be handled by the tape recorder, it is also possible to express the binary value as a level.For example, if the upper limit of the frequency range of the tape recorder is 3K Hz, 48008
PS, that is, the input signal of 480011z as it is,
Even if Ml is at the level of 60″ and II I II,
It is clear that errors occur frequently during playback. Therefore, in the case of 4800 BPS, two values of digital data, namely 11 Q , Q 71 , 11 Q , l
Give one level to each combination of l″It l, Q l″i′1゜1″ and 24. OO)I
Record with z.

Suppose that the digital data rooloollJ is input, it is made into a set of 2 bits, and “0
．． O” 11 l, Q” II Q, ]”, “
1,1”.11 Q, Q
17 to IV.

“0.1” is 2VP-, “1, O” is 3Vp
If -p, "1, 1" is 4 VP-, the recording waveform of the above data will be as shown in FIG.

In order to perform such recording, the modulation/demodulation section 2 only has to output the value obtained by sampling the SIN curve corresponding to the digital data at a certain sampling frequency to the D/A conversion section 3 in accordance with the sampling frequency.

On the other hand, during playback, the SIN played from the tape recorder 5
The peak on the + side of the curve and the peak on one side are converted to A/D converter 7.
, and digitally demodulates the data corresponding to the sum of the reading values.

FIG. 4 shows the digital data modulation/demodulation section 2 in FIG.
FIG. 2 is a configuration diagram of a modulation circuit of FIG. Further, FIG. 5 shows an example in which one waveform is formed using four sampling clocks.

In Fig. 4, 21 is the I10 port, 22 is the CPU,
23 is memory (RAM), 24 is table data (RO
M), 25 is a memory counter, 26 is a memory input pointer, 27 is a memory output pointer, 28 is a data counter, and 29 is a sampling clock generator.

When the CPU 22 receives a signal indicating data input from the input/output interface section 1, it converts the digital data into ■/
- Take in the data via the port, temporarily store the data at the address indicated by the memory input pointer 26, and increment the memory counter 25 and the memory input pointer 26 by 1. The table data 24 is a value obtained by sampling a waveform corresponding to digital data at the cycle of the sampling clock. Assuming that one waveform is formed by four sampling clocks, as shown in Figure 5, 0, 10
0,0. The -100(7) value becomes table data, and each value is stored at an address that is the start address plus the value of the data counter 28. In other words, the first address corresponds to digital data ``'0'' II I II. Assuming that the waveform in the example figure is that of digital data ``'0'',
Assuming that the first address is address 1000, the relationship between table data and addresses is as shown in FIG. Of course, if the data counter 28 reaches 113",
Return to 0N. Similarly, digital data II
I II table data is also formed.

FIG. 7 shows the digital data modulation/demodulation section 2 in FIG.
FIG. 2 is a configuration diagram of a demodulation circuit of FIG.

In FIG. 7, 31 is the I10 boat, 32 is the CPU,
33 is memory (RAM), 34 is table data (RO
M).

When the peak detector unit 6 detects a signal informing the I10 boat that a + side peak has been detected, the CPU
32 takes in peak value data from the A/D converter 7 via the ■/○ port 31 and temporarily stores it in a specific area of the memory 33. Next, when detecting a signal that detects one side peak, the CPU 32 takes in the peak value data from the A/D converter 7 via the I10 port 31, and calculates the sum with the + side peak value previously stored in the memory 33. Take.

This forms data corresponding to peak-to-peak values of the waveform.

In the table data, the peak-to-peak value data is used as an address, and digital data corresponding to the peak-to-peak value is stored at that address. For example, the peak-to-peak value of digital data 110" is 100,
Assuming that the peak-to-peak value of digital data “1” is 200, addresses 0 to 150 are “OII, 151
Addresses 255 to 255 may be designated as II I IN.

The CPU 32 reads table data corresponding to the peak-to-peak values calculated by the CPU 32 and outputs it to the input/output interface section 1 via the I10 port 31.

Generally speaking, it has been difficult to record digital data with tape recorders due to large wow and flutter and level fluctuations (an example of this is shown in Figure 8). Therefore, it is less susceptible to GND level fluctuations and accurate data can be obtained.

What must be noted here is that the level must be written and read accurately, so it is necessary to match the level at the time of input to the tape recorder and the level at the time of output. Furthermore, it is also possible to integrate a tape recorder into a data recorder. In this case, level adjustment is not necessary.

〔Effect of the invention〕

As described above, according to the present invention, digital data can be recorded on a tape recorder, and read errors during playback can be reduced.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a digital data modulation/demodulation device showing an embodiment of the present invention, Fig. 2 is a diagram for explaining the principle of the level modulation method used in the embodiment of the present invention, and Fig. 3 is a diagram for recording data. Figure 4 is a diagram showing a waveform example. Figure 4 is a configuration diagram of the modulation circuit of the digital data modulation/demodulation section in Figure 1. Figure 5 is a diagram showing an example of forming one waveform with four sampling clocks. Figure 6 is a table. FIG. 7 is a diagram showing the relationship between data and addresses, FIG. 7 is a block diagram of a demodulation circuit of the digital data modulation/demodulation section in FIG. 1, and FIG. 8 is a diagram showing an example of level fluctuation. ]: Input/output interface section, 2: Digital data modulation/demodulation section, 3: D/A conversion section, 4: Low-pass filter, 5
:Tape recorder, 6:Peak detector section, 7:
A/D converter, 21: ] 10 ports, 22: CPU, 2
3: Memory (RAM), 24: Table data (ROM
), 25; memory counter, 26: memory input pointer, 27: memory output pointer, 28: data counter,
29: Zumbling clock generator, 3]: I/○ board, 32: CPU, 33: Memory (RAM 4), 34:
Table data (ROM). Patent applicant Rico Co., Ltd.

Claims (1)

[Claims] (1) A modulation means for modulating input digital data into a peak-to-peak value of a certain carrier wave, an interface for outputting the modulated signal to an external tape recorder, and inputting a signal from the external tape recorder. 1. A digital data modulation/demodulation device comprising: an interface for reproducing data from the external tape recorder; and demodulation means for demodulating peak-to-peak values of a signal reproduced from the external tape recorder into corresponding digital data.