JPH0273642A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To simplify whole steps, and to eliminate the accurate aligning of a resist pattern to a gate by laminating a low resistance metal film, an intermediate metal film, and a gate metal film by utilizing one resist pattern. CONSTITUTION:A W.Si film 2 having thickness of approx. 2000Angstrom is formed as a gate metal film on a GaAs substrate 1, and a Ti film 3 having thickness of approx. 500Angstrom is provided as an intermediate metal film thereon. A TiN film 4 having thickness of approx. 1000Angstrom and a Ti film 5 having thickness of approx. 500Angstrom are laminated thereon, and an Au film 6 having thickness of approx. 4000Angstrom is sequentially grown as a low resistance metal film by a sputtering method. A resist pattern 7 is selectively provided on a gate forming region on the thereafter formed multilayer film, with it as a mask the film 6 is formed in a gate shape by reactive ion etching using chlorine gas, and further etched continuously up to the film 3. Then, gas is replaced with fluorine gas, the mask etched in the previous step as a mask the film 2 is etched.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a semiconductor device in which a gold wiring is formed on the gate of a field effect transistor.

[Conventional technology]

Conventionally, in field effect transistors, the gate electrode is formed of a high-melting point metal, but this type of metal has a relatively high resistance, which is disadvantageous in terms of increasing operating speed. Therefore, in this type of semiconductor device, a low-resistance metal such as gold (Au) is formed integrally on the gate electrode.

For example, FIGS. 3(a) to 3(d) show an example manufacturing method.

First, as shown in FIG. 3(a), a semiconductor substrate, here G
A gate 22 made of WSi is formed on an aAs substrate 21 using a known photolithography technique.

Next, as shown in FIG. 3(b), a glabellar insulating film 23 such as a silicon oxide film is grown, and this glabellar insulating film 23 is flattened by a known method to the extent that it is somewhat thinner than the gate metal thickness. .

Next, as shown in FIG. 3(c), A u / T i
A multilayer film 24 made of /TiN is grown. Furthermore, a resist pattern 25 is formed in a region covering the gate 22 above. Then, by etching the multilayer film 24 using this resist pattern 25 as a mask, the multilayer film 24 is etched as shown in FIG.
As shown in d), a metal layer containing low resistance Au is completed on the gate 22.

[Problem to be solved by the invention]

In the conventional manufacturing method described above, after forming the gate 22 using photolithography, it is necessary to form the multilayer film 24 again using photolithography, which increases the number of manufacturing steps and reduces yield due to variations in each step. The problem is that it gets worse. In addition, since it is necessary to form the resist pattern 25 by positioning the gate 22 with high precision, the alignment accuracy of the resist pattern 25 decreases, which tends to cause misalignment between the gate 22 and the multilayer film 24, resulting in minute There is also the problem that it is difficult to manufacture a semiconductor device.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device that reduces the number of manufacturing steps and eliminates the need for alignment, making it easy to manufacture fine semiconductor devices.

[Means for Solving the Problems] A method for manufacturing a semiconductor device of the present invention includes a step of forming a gate metal film on a semiconductor substrate, and a step of forming an intermediate metal film and a low-resistance metal film in a laminated state thereon. a step of forming the low-resistance metal film into a gate shape using a resist pattern; a step of etching the intermediate metal film with a chlorine-based gas using the low-resistance metal film as a mask; The method includes a step of etching the gate metal film with a fluorine-based gas using the film and the intermediate metal film as a mask.

[Effect]

In the above-described manufacturing method, the low-resistance metal film, the intermediate metal film, and the gate metal film can be formed through a series of steps using one resist pattern, thereby simplifying the steps and eliminating the need for high-precision matching.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to 1(d) are vertical cross-sectional views showing a first embodiment of the present invention in the order of manufacturing steps, and here, an example of manufacturing a Schottky field effect transistor on a GaAs substrate is shown.

First, as shown in FIG. 1(a), a 2,000-layer WSiS2O2 film is formed on a GaAs substrate 1 as a gate metal film, and a 500-layer Ti film (3,1,000-layer film) is formed on this as an intermediate metal film.
Person (7) TiN film 4. 150 people (7) Ti film 5 is formed, and 4000 people A as a low resistance metal film is formed on this.
The U film 6 is sequentially grown by sputtering.

Next, as shown in FIG. 1(b), a resist pattern 7 is formed on the gate formation region on the formed multilayer film by a known method.
selectively formed.

Then, using this resist pattern 7 as a mask, reactive ion etching is performed using chlorine gas to etch the Au film 6 into a gate shape as shown in FIG. Perform etching to achieve this. In this case, in order to prevent side etching of the Au film 6 and the Ti film 5.3, CC(2a, CHCl!, , B
eF2. , SiCL or the like is preferably used.

Next, as shown in FIG. 1(d), the gas is changed to a fluorine-based gas, and the WS is etched using the film etched in the previous step as a mask.
iS2O2 switching. At this time, in order to prevent WSiS2O2 etching, it is preferable to use a gas such as C, F, or Cj F.

According to this manufacturing method, by forming one resist pattern 7 and performing a series of etchings while switching gases, the gate 2 made of WSi and the low resistance film 6 made of Au can be formed thereon. Therefore, the number of manufacturing steps is reduced and manufacturing is simplified, and highly accurate alignment of resist patterns is not required, making it possible to manufacture fine semiconductor devices.

FIGS. 2(a) to 2(C) are longitudinal cross-sectional views showing a second embodiment of the present invention in the order of manufacturing steps.

First, as shown in FIG. 2(a), on the GaAs substrate 11,
WS3WA12. Ti film 13. A TiN film 14° and a PL film 15 are formed by sputtering.

Next, as shown in FIG. 2(b), a resist 16 is formed on the entire surface, and electron beam (B) drawing is performed on this resist to remove the resist in the gate formation region. Then, using this resist 16 as a mask, the exposed PT film 1
5 is plated with Au, and an Au film 17 is selectively formed.

Next, after removing the resist 16, using the Au film 17 as a mask, as shown in FIG. 2(C), the Pt film 15, Ti film 14. T
The i film 13 is etched, and the WSi film 12 is further etched by an etching method using a fluorine gas.

Thereby, a gate having a low resistance film can be easily formed by performing one resist pattern forming process and a continuous etching process.

In this example, since the Au film 17 is used as a mask, the shape of the Au film 17 affects the processability, but since the Au film 17 is formed perpendicularly to the side surface of the resist 16 by the EB drawing method, the Au film 17 is used as a mask. The side surfaces of the film 17 are also vertical, and suitable workability can be obtained.

〔Effect of the invention〕

As explained above, the present invention utilizes one resist pattern to form a low resistance metal film and an intermediate metal film.

Since the gate metal film and gate metal film are formed in series, the entire process including the resist patterning process is simplified, and there is no need for highly accurate matching of the resist pattern to the gate, making it possible to manufacture fine semiconductor devices. be.

[Brief explanation of the drawing]

FIGS. 1(a) to (d) are vertical cross-sectional views showing the first embodiment of the present invention in the order of steps, and FIGS. 2(a) to (C) are longitudinal cross-sectional views showing the second embodiment of the present invention in the order of steps. Figures 3(a) to (
d) is a vertical sectional view showing the conventional method in the order of steps. 1-GaAs substrate, 2.WSi film, 3-Ti
Film, 4...TiN film, 5...Ti film, 6...Au
film, 7-river resist pattern, 11...GaAs substrate,
12...WSt film, 13...Ti film, 14...T
iN film, 15...Pt film, 16...resist, 17
...Au film, 21...GaAs substrate, 22...gate, 23...interlayer insulating film, 24...multilayer film, 25
...Resist pattern. Figure 1 Figure 2 Figure 3 Figure 3

Claims (1)

[Claims] 1. A step of forming a gate metal film on a semiconductor substrate, a step of forming an intermediate metal film and a low-resistance metal film on this in a laminated state, and forming the low-resistance metal film into a gate shape using a resist pattern. a step of etching the intermediate metal film with chlorine-based gas using the low resistance metal film as a mask; and etching the gate metal film with fluorine using the low resistance metal film and the intermediate metal film as a mask. A method for manufacturing a semiconductor device, comprising a step of etching with a system gas.