JPH02749B2 - - Google Patents

Description

[Detailed description of the invention]

"Field of Industrial Application" The present invention relates to an image signal filtering method and apparatus, and more particularly to an image signal filtering method and apparatus for obtaining an ancy sheep signal used in detail enhancement processing. "Conventional example" Detail enhancement processing in pixel scanning recording processing is performed by calculating S+K(S-U)( K:
This is achieved by performing the calculation (coefficient). The unsharp signal U necessary for this detail emphasis processing can be obtained in an optical analog manner by using an aperture having a larger diameter than the aperture for obtaining the sharp signal S. However, this method requires an optical system to obtain the unsharp signal U in addition to the optical system to obtain the sharp signal S, and the type of input image (line drawing and image with gradation). , it is necessary to change the aperture diameter for the sharp signal S according to the duplication magnification and the number of screen lines during halftone dot duplication, and it is also necessary to mechanically change the aperture diameter for the unsharp signal U in accordance with this, which is time-consuming. There are disadvantages such as the height and the need for multiple mechanical systems. In order to eliminate the drawbacks of the analog method described above, the applicant of the present application disclosed a detail emphasis processing method by digital processing in Japanese Patent Application No. 54-82571, and also disclosed the above method in Japanese Patent Application No. 58-14621. This patent discloses a method that further improves the drawbacks of the technique disclosed in Japanese Patent Application No. 54-82571. In other words, a circuit that multiplies the image signals of an arbitrary number of pixels arranged in the scanning order by weighting coefficients W ₁ to _{W 15} and then adds and averages the signals, or a circuit that combines a doubler and an adder. This method uses However, this image signal filtering circuit (for creating an unsharp signal U) uses multipliers or adders whose number corresponds to the diameter (physical mask size) of the unsharp signal U. There is a drawback that the larger the number of multipliers or adders is, the more the number of multipliers or adders increases.Also, when changing the weighting coefficient, there is a drawback that a circuit for changing each coefficient is required individually. "Means for Solving the Problems" In the present invention, as a means for solving the above problems, for example, among image signals of an arbitrary number of pixels sequentially inputted by photoelectric scanning in the main scanning direction, Alternatively, the sum of the first image signal sequence is obtained by adding the image signals of a required number of consecutive pixels in the sub-scanning direction, and then the image signals of the same number of consecutive pixels following the required number of pixels are added. By calculating the sum of the second image signal sequence and cumulatively adding and subtracting the sum of the first image signal sequence and the sum of the second image signal sequence, the sum of the second image signal sequence is calculated. ) is getting an unsharp signal. Further, for example, the sum of the image signal strings of a required number of continuous pixels in the main scanning direction or the sub-scanning direction obtained by photoelectric scanning in the main scanning direction, and whether the front end or the rear end of the required number of consecutive pixels is determined. multiplying the image signal of one of the pixels by the same number as the number of pixels forming the image signal string to obtain a product, and cumulatively adding and subtracting the sum of the image signal string and the product of the image signal of the pixel at one end thereof; An unsharp signal in the main scanning direction or the sub-scanning direction (one-dimensional) is obtained. Furthermore, after obtaining the unsharp signal in one direction (one dimension) of the main scanning direction or the sub-scanning direction, a required number of the one-dimensional signals that are continuous in the other direction of the main scanning direction or the sub-scanning direction are obtained. unsharp signals are added to obtain a first unsharp signal string, and the same number of consecutive one-dimensional unsharp signals following the required number of one-dimensional unsharp signals are added to obtain a second unsharp signal string By calculating the sum of the first unsharp signal sequence and the sum of the second unsharp signal sequence in a second cumulative addition and subtraction, two-dimensional (main scanning direction and sub-scanning direction) I am getting an unsharp signal. Note that the weighting coefficient W of the unsharp signal given to each image signal is W∞ with respect to the value (l) indicating the position of the pixel of that signal (a number that increases sequentially from both ends toward the center pixel). There is a relationship l ⁿ . ``Embodiment'' First, an image scanning recording apparatus to which the present invention is applied will be briefly described based on FIG. 12. An original image A wound around an original image drum 41 is photoelectrically scanned by a scanning head 42. Red (R), green
(G), blue (B) are converted into three analog color (electrical) signals. These signals are converted into digital color signals by the A/D converter 43 (or remain as analog signals without passing through the A/D converter 43), and are then converted to digital color signals by a known color calculator 44 (digital or analog). ), color correction and gradation correction are performed, and the signal is converted into each color version signal of yellow (Y), magenta (M), cyan (C), and black (K). Note that if the signal is still an analog signal, it is then converted to a digital signal through an A/D converter 43. For each color plate signal, a color selector (a device that controls multicolor simultaneous output processing or single color output processing) 45 selects the signal of the color plate to be duplicated, and a detail emphasis circuit 46 (to be described later) processes sharpness (detail) emphasis. The photosensitive material B is then wound around the exposure drum 49 from the exposure head 48 via the halftone dot generator 47.
to expose. Each of the above-mentioned digital circuits is created by timing pulses input to the synchronous controller 52 from rotary encoders 50 and 51 provided on the original image drum 41 and the exposure drum 49, respectively.
It is synchronously controlled by clock pulses etc. output from. The detail emphasis circuit 46 includes the following image signal filtering circuit.
Detail emphasis processing is performed using the unsharp signal U and the sharp signal S. Next, an image signal d input to the filtering circuit used in the present invention, a number l indicating the position of a pixel of the image signal actually subjected to filtering processing,
Furthermore, the symbols assigned to each element V (or line memory L) of the shift register used in the filtering circuit are defined in FIG. In this invention, the image signal (dk to d-d-
k+2) is subjected to filtering processing. Therefore, a pixel position number l is assigned to the image signals of the (2k-1) pixels. However, in this processing process, image signals of (2k+1) pixels are required, so the positions of each element of the shift register V and line memory L described below are coded k...1, 0, -1, ..., -k is attached.
However, the element V _k or the line memory L _k corresponding to the symbol k may be omitted. FIG. 1 shows an embodiment of an image signal filtering circuit in which the present invention is applied to a one-dimensional (main scanning direction) image signal. First, the cumulative addition/subtraction circuits 2, 3, and 4 used here provide an addition signal P and a subtraction signal Q, as well as the previous calculation results of these addition/subtraction circuits stored in registers 5, 6, and 7 (at the start of photoelectric scanning). A cumulative addition/subtraction process of P-Q+R is performed from R to the cumulative addition/subtraction signal from one clock cycle before the current time. (From now on, such cumulative addition/subtraction processing will be
In principle, the description of R is omitted and the expression is expressed as cumulative addition and subtraction of signal P and signal Q. ) In addition, shift register 1 such as registers 5, 6, and 7
etc. and line memories 11, 15, 16, which will be described later.
17, etc., all have a clear function for initialization, and are always initialized before performing filtering processing. And (2k+1) stage elements V _k , V _k-1 ...V ₁ , V ₀
For example, an image signal D _i in the main scanning direction is sequentially input to the shift register 1 having V _-k , and the image signal d _k loaded into the first stage element V _k of the shift register 1 is transferred to the cumulative addition/subtraction circuit 2. The image signal d ₀ (delayed by k steps from d _k ), which is input as an addition signal to the shift register 1 and further loaded into the element V ₀ of the shift register 1, is input to the cumulative addition/subtraction circuit 2 as a subtraction signal. , is input as an addition signal to another cumulative addition/subtraction circuit 3. Further, the image signal d _-k (delayed by 2k stages from d _k ) loaded into the final stage element V _-k of the shift register 1 is input to the cumulative adder/subtractor 3 as a subtraction signal. The output signal U _1a of the cumulative adder/subtractor 2 is
As shown in Table 1, the sum (first image signal column sum) and is input as an addition signal to the cumulative adder/subtractor 4 at the next stage. On the other hand, the output signal U _1b of the cumulative adder/subtractor 3 is, as shown in Table 3, Equation 2, the same number of consecutive pixels (corresponding to the radius of the mask size of the unsharp signal) following the required number of consecutive pixels. This becomes the sum of the image signals of the pixels (the sum of the second image signal sequence), and is input as a subtraction signal to the cumulative adder/subtractor 4 at the next stage. The relationship between the output signals of the cumulative adders/subtractors 2, 3, and 4 of the circuit configured as described above and the signals loaded into the shift register 1 is shown in detail in Table 1. In this first table, (2k+1)
Using shift registers of stages, V _k to V ₁ and V ₀ to _{V -k} , the image signal D ₁ is once loaded into the first stage element V _k of the shift register 1 and then input to the cumulative adder/subtractor 2. However, the element corresponding to the first stage element V _k of the shift register 1 or an equivalent product shown in FIG. 1 can be omitted for convenience.

【table】

[Table] As is clear from Table 1, from the cumulative adder/subtractor 4 in the next stage, the shift register 1 is
The total sum of signals to which a weighting coefficient of W=l (linear function) is attached to the image signals up to the (2k-1)th pixel counted from the image signal d _k loaded in the element V _k . Therefore, the signal U ₂ can be used as the unsharp signal U and _the image signal d ₁ (center of (2k−1) pixels) loaded into the element V ₁ of the shift register 1. image signal of the pixel) can be used as the sharp signal S. When the image signal to be added is input as the subtraction signal Q and the image signal to be subtracted is inputted as the addition signal P to the cumulative adders/subtractors 2, 3, and 4, the cumulative addition/subtraction result will have a sign different from the originally required result. is inverted (that is, multiplied by -1), and the original result is obtained by taking the two's complement (inverting all bits and adding 1). Therefore, Example (1st
Even if the addition signal and subtraction signal of the cumulative addition/subtraction processing in FIGS. 2, 3, and 4) are interchanged, similar filtering processing can be performed depending on the subsequent processing. Figure 2 shows the cumulative adder/subtractor 4 of the circuit shown in Figure 1.
Observing the signal U _1a and the signal U _1b among the signals input to the , the signal U _1b is delayed by k stages from the signal U _1a , and the signal U _1b is delayed by k stages from the signal U 1a, and This is a circuit in which the accumulative adder/subtractor 3 is replaced with a shift register 5', focusing on symmetry, and the operational results of the circuit of FIG. 1 and the circuit of FIG. 2 are substantially the same. That is, in place of the (2K+1) stage shift register 1 in FIG. 1, a (k+1) stage shift register 1' is used, and in place of the register 5, a k stage shift register (S ₀ , S ^- ₁ , ..., S _{- k+2} , S _-k+1 ) shift register 5' (the number of stages of this shift register is, in principle, matched to the interval between the image signals of the two pixels, the addition input signal and the subtraction input signal of the cumulative adder/subtractor 2) The output signal of the cumulative adder/subtractor 2 (the sum of the first image signal string) is inputted sequentially to the shift register 5', and the signal of the first stage element _S0 of the shift register 5' is input to the cumulative position (photoelectric It is returned to the addition input terminal of the cumulative adder/subtractor 2 as the cumulative addition/subtraction signal by the cumulative adder/subtractor 2 from the start point to one clock before the current time), and is further output as the output signal of the final stage element S _-k+1 of the shift register 5' ( The sum of the second image signal sequence) is used as the subtraction signal of the cumulative adder/subtractor 4. As a result, the same signal U' ₂ as the unsharp signal U ₂ shown in FIG. 1 is obtained from the cumulative adder/subtractor 4. This circuit has a simple circuit configuration and operates in the same way as the circuit shown in FIG. 1, so it is very effective. FIG. 17 is a circuit diagram of another embodiment for obtaining an unsharp signal in the main scanning direction as shown in FIG. 1 or 2. This circuit photoelectrically scans an original image, sequentially adds the image signals of a required number (for example, k) of pixels consecutive in the main scanning direction among the obtained image signals, and obtains, for example, a first image. The means 300 for creating the sum of signal examples is constructed by connecting (k-1) adders in a tree shape. To briefly explain its operation, among the image signals stored in the k-stage shift register 1, in principle, the image signals of two adjacent pixels are each
The adder groups in the second stage add the output signals, and the output signals of the first adder groups adjacent to each other are added together in the adder groups in the second stage. The operation of adding together the output signals of , respectively, in the third-stage adder group is repeated to obtain the sum of the image signals of the required number of pixels. Next, a means 300 for creating a sum of a first image signal sequence of image signals of a required number (for example, k) of pixels consecutive in the main scanning direction subsequent to the required number of pixels.
The sum of the second image signal strings is determined by the means 301 for creating the sum of the second image signal strings having the same configuration as . A desired unsharp signal is obtained by cumulatively adding and subtracting the sum of the first image signal sequence and the sum of the second image signal sequence obtained in this manner in the cumulative adder/subtractor 4.
Get _U2 . In addition, Fig. 1, Fig. 2, Fig. 3, Fig. 4, Fig. 5, Fig. 6, Fig. 7, Fig. 8, Fig. 9
The part surrounded by the dotted line in FIG.
The means 300 or the second
It can be replaced by means 301 for creating a sum of image signal sequences. FIG. 3 is a circuit diagram of an embodiment for creating the latter half of a one-dimensional (main scanning direction) unsharp signal. Image signal d _i obtained by photoelectrically scanning the original image
are sequentially input to the shift register 1', and image signals of two pixels separated by the number of pixels corresponding to the radius of the desired unsharp signal (image signals from the first stage V _k and the last stage V ₀ of the shift register 1') are obtained. are cumulatively added and subtracted by the cumulative adder/subtractor 2. The output signal of the cumulative adder/subtractor 2 and the image signal from the final stage _V0 of the shift register 1' are multiplied by the required (k) times by the multiplier 23.
The second half of the one-dimensional unsharp signal is created by cumulative addition and subtraction. Note that the multiplication coefficient k of the multiplier described here is the same as the interval (k) between two pixels that the cumulative adder/subtractor 2 performs cumulative addition/subtraction. FIG. 4 is a circuit diagram of an embodiment for creating the first half of a one-dimensional unsharp signal. The difference between FIG. 3 and FIG. 4 is that at the input terminal of the cumulative adder/subtractor 4, the output signal of the cumulative adder/subtracter 2 is used as the subtraction input, and the output signal of the multiplier 23 is used as the addition input. To obtain a complete unsharp signal from the circuit diagrams in Figures 3 and 4, adjust the timing of one of the image signals (so that the unsharp signal in the first half and the unsharp signal in the latter half are exactly combined, e.g. , after the shift register 1' in FIG.
After combining the shift registers 1' shown in the figure, and making the final stage element V ₀ of the shift register 1' shown in Fig. 3 and the first stage element V _k of the shift register 1' shown in Fig. 4 the same element, etc.), , both outputs may be added using an adder (not shown). In FIGS. 3 and 4, the shift register 1' is replaced with a plurality of line memories (each of which can store the image signal of one scanning line), and the sum ( It is also possible to obtain an unsharp signal in the sub-scanning direction by calculating the sum of the first image signal strings and replacing the registers 5 and 7 with line memories that can store the image signal of one scanning line. FIG. 5 is a circuit diagram of another embodiment for creating an unsharp signal. In this circuit diagram, the explanation of the same parts as in FIG. 3 will be omitted, and only the different parts will be explained. In this circuit, with the same configuration as shown in FIG. The addition/subtraction signal is input to the multiplier 23, and the output signal of the cumulative addition/subtraction device 4 is subtracted by the subtracter 210 from the signal multiplied by the desired magnification k (equal to the interval k between two pixels subjected to cumulative addition/subtraction in the cumulative addition/subtraction device 2). By doing this, a signal corresponding to the first half of the one-dimensional (main scanning direction) unsharp signal is obtained, and by further delaying the output of the subtracter 210 by the k-stage shift register 211, the second half of the unsharp signal is obtained. The unsharp signal is obtained by adjusting the timing of the minute signal and the first half signal, and adding the output signal of the cumulative adder/subtractor 4 and the output signal from the final stage of the shift register 211 in the adder 212. . FIG. 18 is a circuit diagram of an embodiment of the basic configuration shown in FIG. 17 for obtaining an unsharp signal in the sub-scanning direction. This circuit sequentially stores each image signal obtained by photoelectrically scanning an original image in a line memory 11 that can store image signals of a plurality of scanning lines, and sequentially stores the required number of consecutive image signals (for example, k For example, the means 300 for adding the image signals of pixels of (k+
1) Adders are connected in a tree shape. Next, a means 30 for creating a sum of a first image signal sequence includes image signals of a required number (for example, k) of pixels consecutive in the sub-scanning direction subsequent to the required number of pixels.
The sum of the second image signal strings is determined by the means 301 for creating the sum of the second image signal strings having the same configuration as 0. A desired unsharp signal U _8a is obtained by cumulatively adding and subtracting the sum of the first image signal sequence and the sum of the second image signal sequence obtained in this way by the cumulative adder/subtractor 4a. FIG. 6 shows an image signal filtering circuit when the present invention is applied to image signals of two-dimensional pixels (main scanning direction and sub-scanning direction), and is similar to the circuit shown in FIG. 1. It has a structure in which two layers of approximately the same circuit are stacked in series. The first layer is for obtaining an unsharp signal in the sub-scanning direction, and is the (2k+1) stage shift register 1 mentioned above.
Line memory 11 (L _k , L _k-1 . . . L ₁ ,
L ₀ , L _-1 ...L _-k ) (or a shift register that can store image signals of pixels for one scanning line), and
Line memories 15, 16, 1 capable of storing one scanning line worth of image signals in place of stage registers 5, 6, 7
7 (or line shift register). Then, image signals for a plurality of scanning lines obtained by photoelectric scanning are sequentially stored in each line memory 11, and the sum of the image signal strings of the required number of pixels continuous in the sub-scanning direction (first image In order to obtain the sum of signal sequences), the output signal of the first line memory L _k and the output signal of the (k+1)th line memory L ₀ are combined (i.e., two pixels with an interval of k scanning lines). image signals) are cumulatively added and subtracted by the cumulative adder/subtractor 2a, and then the sum of the image signal strings of the same number of pixels consecutive in the sub-scanning direction following the required number of pixels (the sum of the second image signal strings) ), the output signal of the (k+1)th line memory _L0 and the output signal of the (2k+1)th line memory L _- k (i.e., The cumulative addition/subtraction device 3a performs cumulative addition/subtraction on the image signals of two pixels having an interval of a scanning line, and the cumulative addition/subtraction device 4a adds and subtracts the obtained sum of the first image signal string and the sum of the second image signal string. By cumulative addition and subtraction, the first
An unsharp signal U 8a having the weighting shown in the table (Table 1 is for the main scanning direction, but it is applied to continuous image signals in the sub-scanning direction) is obtained, and the unsharp signal U _8a of the lower layer ( 2k+1) stages of shift registers 1b. The weighting state of each signal stored in each element of the shift register 1b is illustrated in an easy-to-understand manner by collecting the signals of each surrounding pixel as shown in FIG. 10a. By performing the same processing as shown in FIG. 1 on the one-dimensional weighted unsharp signal stored in each element of the shift register 1b in this way, the two-dimensional For example, for (2k-1) x (2k-1) image signals out of the unsharp signals with weighting of It is now possible to obtain a signal U _3b (unsharp signal) which is the sum of the signals with weighting coefficients. Note that the number of pixels in the main scanning direction and the number of pixels in the sub-scanning direction on which image filtering processing is performed are, in principle, the same, but they may be different. FIG. 7 is a circuit diagram of an embodiment in which the order of the processing in FIG. 6 is reversed, and processing in the main scanning direction is performed first and processing in the sub-scanning direction is performed later. The operation is to sequentially input the image signals obtained by photoelectrically scanning the original image to the shift register 1b, take out two sets of two-pixel image signals having an interval of the number of pixels corresponding to the radius of the unsharp signal, and then output the image signals from the shift register 1b. The image signals of the two pixels in the latter stage (those photoelectrically scanned later) are input to the cumulative adder/subtractor 2b for cumulative addition/subtraction, and at the same time, the image signals of the two pixels in the front stage (those that were photoelectrically scanned first) are input to the cumulative adder/subtractor 3b. Input and perform cumulative addition and subtraction. The output signals of both cumulative adders/subtractors 2b and 3b are cumulatively added/subtracted by a cumulative adder/subtractor 4b to obtain an unsharp signal for each pixel weighted in the main scanning direction (one dimension). Next, the output of the cumulative adder/subtractor 4b is input to the line memory or shift register 11 that can store image signals for one scanning line of (2k+1) lines, and the output signal of the first line memory L _k and the (k+1)th The output signal of the line memory _L0 (that is, the one-dimensional unsharp signal of two pixels between the k line memories) is cumulatively added and subtracted by the cumulative adder/subtractor 2a. Meanwhile, in parallel with this operation, the output signal (one-dimensional unsharp signal) of the (k+1)th line memory L ₀ and the output signal (one-dimensional unsharp signal) of the (2k+1)th line memory L _-k (i.e. 2 which is delayed by k scanning lines in the sub-scanning direction from the one-dimensional unsharp signal of the two pixels.
An unsharp signal weighted in the main scanning direction and the sub-scanning direction (two dimensions) is obtained by cumulatively adding and subtracting the one-dimensional unsharp signal of the pixel by the cumulative adder/subtractor 4a. When the cumulative addition/subtraction units 2a, 3a, and 4a cumulatively add/subtract the one-dimensional unsharp signals of two pixels in the sub-scanning direction, each cumulative addition/subtraction signal from the start of photoelectric scanning to one clock before the current time is memorized. Storage means 1
5, 16, and 17 are different in that they each have a capacity that can store image signals for one or more scanning lines instead of having one stage of storage means. FIG. 8 is a circuit diagram of an embodiment for obtaining an unsharp signal in the main scanning direction and the sub-scanning direction (two-dimensional) based on the configuration of FIG. 2. The image signal D _i obtained by photoelectrically scanning the original image is
(k+1) line memories 200 are sequentially input to the output signal of the first line memory L _k ,
The output signal of the (k+1)th line memory _L0 (that is, the image signal of 2 pixels having an interval of k scanning lines in the sub-scanning direction) is added to the cumulative adder/subtractor;
The first cumulative addition/subtraction is performed using 01. The cumulative addition/subtraction signal and the cumulative addition/subtraction signal are stored in the line memory 2.
The signal delayed by k lines in the sub-scanning direction by 03 is
The cumulative addition/subtraction unit 202 performs cumulative addition/subtraction to obtain an unsharp signal in the sub-scanning direction (one dimension) for each pixel. In addition, in the cumulative addition/subtraction units 201 and 202, a line memory capable of storing image signals for one or more scanning lines is used as a storage means for storing each cumulative addition/subtraction signal from the start of photoelectric scanning to one clock before the current time. Or shift register 20
3,204 is used. The output signal of the accumulative adder/subtractor 202 (an unsharp signal for each pixel weighted in the sub-scanning direction) is sequentially input to the (k+1) stage shift register 1' to generate two signals having an interval of the required (k) number of pixels. The cumulative addition/subtraction signal is subjected to cumulative addition/subtraction by the cumulative addition/subtraction unit 2. The cumulative addition/subtraction signal and the signal obtained by delaying the cumulative addition/subtraction signal by the k-stage shift register 5' are
An unsharp signal in the main scanning direction is obtained by cumulatively adding and subtracting in the cumulative adder/subtractor 4, and unsharp signals in the main scanning direction and the sub-scanning direction (two-dimensional) are obtained. FIG. 9 is a circuit diagram of an embodiment for obtaining a two-dimensional unsharp signal based on the configuration shown in FIG. It performs processing in the sub-scanning direction. The image signal D _i obtained by photoelectrically scanning the original image is (k
+1) stage shift register 1' sequentially,
Image signals are taken out from the first and last stage elements of the shift register 1', and the image signals of two pixels having an interval of k pixels are cumulatively added and subtracted by the cumulative adder/subtractor 2.
The cumulative addition/subtraction signal and the cumulative addition/subtraction signal are k
The signal delayed by the shift register 5' of the stage is cumulatively added/subtracted by the cumulative adder/subtractor 4, and the signals are accumulated in the main scanning direction (1
An unsharp signal is obtained for each pixel with a weighting of (dimension). The cumulative addition/subtraction (one-dimensional unsharp) signal is inputted sequentially to (k+1) line memories 200, and the output signal of the first line memory L _k and the output signal of the (k+1)th line memory L ₀ ( That is, 2
pixel unsharp signal) and the cumulative adder/subtractor 20
Accumulate addition and subtraction with 1. The cumulative addition/subtraction signal and the signal delayed in the sub-scanning direction by the k line memories 203 are cumulatively added/subtracted by the cumulative adder/subtractor 202, thereby adding/subtracting the cumulative addition/subtraction signal in the main scanning direction and the sub-scanning direction (two-dimensional). A weighted unsharp signal is obtained. Note that a two-dimensional unsharp signal can also be created by combining the configuration in FIG. 1 and the configuration in FIG. 2 (one-dimensional processing). FIG. 11 shows that the weighting coefficient is at the position (l) of the image signal.
(a number that increases sequentially toward the image signal of the k-th pixel from both ends), the function W = l ² (quadratic function)
This is an image signal filtering circuit that performs cumulative addition/subtraction processing in three stages to obtain weighting coefficients. The first-stage cumulative addition/subtraction processing 22a, 22b is the same as the processing shown in FIG. 1, so the explanation will be omitted. The second stage cumulative addition/subtraction processing is performed by cumulative addition/subtraction units 24a and 24b.
It is done with. That is, the cumulative adder/subtractor 24a
Then, the signals obtained from the first-stage cumulative adder/subtractor 22a are cumulatively added, and from that signal, a signal (kd ₀ ) obtained by multiplying the image signal d ₀ loaded into the element V ₀ of the shift register 21 by k is obtained. Cumulative subtraction. Further, the cumulative adder/subtractor 24b cumulatively subtracts the signal obtained from the cumulative adder/subtractor 22b, and adds the above-mentioned signal kd ₀ to that signal. The summation U _4a can be obtained by weighting W=l for the image signals (d _k to _{d 1} ) loaded from the element V _k to the element V ₁ of the shift register 21, and from the adder 24b, As shown in equation (5) of Table 3, the image signals (d ₀ to d -k+1) loaded from element V ₀ to element V _{-k+ 1} of the shift register 21 are weighted by W = l + 1. We can get the sum U _4b . The respective sums U _4a and U _4b are the elements of the shift register
It is symmetrical with respect to the image signal d ₀ of the pixel at V ₀ . Therefore, using this property, the summation U _4b can also be created by other circuit configurations (see FIG. 5). The two output signals obtained from the cumulative adders/subtractors 24a, 24b in this way are transmitted to the multipliers 28a, 28.
b is doubled, and further subtracters 29a and 29b multiply the third
The signals obtained as a result of the first stage cumulative addition/subtraction processing are subtracted from the doubled signals as shown in Tables (6) and (7), resulting in W = 2l-1 and W = 2l + 1, respectively. The sums U _5a and U _5b of the weighted image signals are obtained.
Next, the output value U _5a of the subtracter 29a is sent to the third stage cumulative adder/subtractor 30 as an addition signal, and
The output signal U _5b of is inputted to the cumulative adder/subtracter 30 as a subtraction signal. Here, since the cumulative adder/subtractor 30 sequentially outputs signals as shown in Table 2, each element of the shift register 21 V _k ...V ₁ , as shown in Equation 8 of Table 3 as a result.
Image signal d _k … d ₁ loaded in V ₀ …V _-k+2 ,
d ₀ ,...d _-k+2 is weighted W=l ² (quadratic function).
You can get _U6 .

[Table] Furthermore, by adding the following configuration to the above configuration, weighting that is a quadratic function having a negative gradient becomes possible. That is, when the signal obtained from the first-stage cumulative adder/subtracter 22b is subtracted from the output of the cumulative adder/subtracter 24b by the subtracter 33, and this signal and the output signal from the cumulative adder/subtracter 24a are added together by the adder 34, the first The same signal U'' ₂ as obtained by the circuit shown in the figure can be obtained. The output signal U ₆ of the cumulative adder/subtractor ₃₀ is subtracted by the subtracter 32 from the signal U 2 which is further multiplied by 2k by the multiplier 35. To obtain a signal U7, which is the sum of the signals with a weighting coefficient of W=l(2k-l) (a quadratic function with a negative gradient) as shown in Table 3 ( ₉ ), as an unsharp signal U. Figure 15 shows the diameter (mask dimensions) of the unsharp signal U obtained in this way under platemaking conditions (for example, a relatively small-sized mask for line drawings such as characters and figures, and a relatively small-sized mask for images). This figure shows an example of the same filtering circuit as in Figure 1, which can change the number of pixels to be operated on in order to change the number of pixels to be calculated depending on the size of the mask (using a large-sized mask).2k+1 stages (V _k
...V ₁ , V ₀ ...V _-k (However, the first stage element V _k can be omitted) The center element of shift register 1
Switching means 212, 213 such as selectors and multiplexers from elements located symmetrically to V ₀
The pixel positions of the addition signal of the cumulative adder/subtractor 2 and the input signal to the cumulative adder/subtracter 3 can be switched via the . At this time, when the duplication conditions (magnification, screen line count, document type, etc.) are input, the size specification register (1 type of decoder) 2 is used to determine the number of pixels (mask size) that forms the unsharp signal U.
11 selects the image signal from which stage of the shift register 1 to the switching means 212 and 213;
A signal is given to specify whether to input the cumulative adder/subtractor 2 or 3. FIG. 16 is a circuit diagram of an embodiment in which the number of pixels to be calculated can be changed in order to change the diameter of the unsharp signal U according to plate-making conditions, and follows the basic configuration of FIG. 2. In this case, the size designation register 211 gives a signal to the switching means 214 to designate which stage of the shift register 5' the image signal is to be input to the cumulative adder/subtractor 4 according to the plate-making conditions. 1 is a diagram showing one specific example of cumulative adders/subtractors (2, 3, 4, . . . ) and peripheral circuits. 100-1
07 is an inverter, and 108 to 113 are adders, which use ICs such as TI's 74LS83A and 74LS283. When the C ₀ terminal is set to low level, this IC becomes an adder for paired data among the two sets of input data input to the two sets of input terminals A ₁ to _{A 4} and B ₁ to B ₄ . C ₀ terminal is set to high level, and 2
When one of the pair of input data is inverted and inputted, it becomes a subtracter between the paired data, and the resultant data after addition or subtraction is output from the output terminals Σ ₀ to _{Σ 4} C ₄ . Ru. inverter 100
107 and adders (108 to 113) are connected as shown in the figure, and the output is connected to the D flip-flop 114.
By temporarily storing the input signal at one input terminal B ₁ of adders 108 to 110, the signal is delayed by one clock.
~B ₄ has been entered. The operation is based on a set of signals Rt = 0 from one clock ago temporarily stored in the D flip-flop 114, and
A set of signals P of the current clock is added to an adder (108
-110), the paired signals are added together, and from the result, another set of signals Q of the current clock is subtracted between the paired signals in the adders (111-113). Therefore, the D flip-flop 114 temporarily stores the added and subtracted cumulative value.

[Table] “Effects of the invention” As described above, this invention (mainly the first
The basic configuration shown in Figs. It has the feature that unsharp signals in both sub-scanning directions can be created at low cost. The basic configurations shown in FIGS. 3 to 5 also have the feature that the circuit configuration is relatively simple and only a small number of expensive multipliers are required. If the basic configuration of Figure 2 is applied to the basic configuration of Figure 17,
The present invention has the feature that only one set of adders connected in a tree shape is required, and no expensive multipliers are required. In addition, the interval between the image signals of two pixels that are cumulatively added and subtracted can be varied without significantly changing the circuit configuration (when calculating the sum of the image signals of multiple pixels,
Since the mask size of the unsharp signal can be easily changed by changing the number of pixels as necessary, there is no need to provide a plurality of such circuits. Further, by changing the number of steps in the cumulative addition/subtraction processing, it is possible to weight the number l indicating the position of the image signal to be an arbitrary rational integer function.

[Brief explanation of drawings]

1, 2, 3, 4, and 5 are circuit diagrams of an example of an apparatus for implementing the present invention on one-dimensional (main scanning direction) image signals; 7, 8, and 9 are circuit diagrams of an example of an apparatus for carrying out the present invention on two-dimensional image signals, and FIG. A conceptual diagram that clearly shows the process,
FIG. 11 is a circuit diagram of an embodiment for obtaining an unsharp signal having quadratic function weighting, FIG. 12 is a block circuit diagram showing an image scanning recording device to which this invention is applied, and FIG. 13 is a definition of symbols. Figure, 1st
Figure 4 is a diagram showing one specific example of an accumulative adder/subtractor;
16 and 16 are circuit diagrams of an embodiment for varying the interval between pixels subjected to arithmetic processing in order to vary the diameter of an unsharp signal, and FIG. 17 is a circuit diagram of an embodiment for obtaining an unsharp signal in the main scanning direction. 18th
The figure is a circuit diagram of an embodiment for obtaining an unsharp signal in the sub-scanning direction. In the figure, 1, 1', 1b...shift register,
2, 3, 4...cumulative adder/subtractor, 2a, 2b, 3a,
3b, 4a, 4b...accumulative adder, 5,6,7...register, 5'...shift register, 11...line memory or shift register, 15,16,17...line memory or shift register, 23...multiplier,
300, 301... Addition circuit in which a plurality of adders are connected in a tree shape.

Claims (1)

[Scope of Claims] 1. The sum of the first image signal sequence is determined by adding the image signals of a required number of pixels consecutive in the main scanning direction or the sub-scanning direction obtained by photoelectrically scanning the original image, and Multiply the image signal of either the front end or the rear end of the required number of pixels by the same number as the number of pixels that constituted the first image signal string, calculate the product, and calculate the sum of the first image signal string. An image signal filtering method for obtaining an unsharp signal by sequentially cumulatively adding and subtracting and the product of the image signal of the pixel at one end thereof. 2 Claims that calculate the sum of the first image signal sequence by cumulatively adding and subtracting image signals of two pixels having a required interval among image signals of pixels continuous in the main scanning direction or sub-scanning direction The image signal filtering method according to item 1. 3. Claim 1 describes that the sum of the first image signals is obtained by sequentially adding the image signals of a required number of pixels that are continuous in the main scanning direction or the sub-scanning direction using a plurality of adders. image signal filtering method. 4 means for calculating the sum of a first image signal sequence by adding image signals of a required number of consecutive pixels in the main scanning direction or sub-scanning direction obtained by photoelectrically scanning an original image; a multiplier that calculates a product by multiplying the image signal of one of the pixels at the front end or the rear end by the same number as the pixels constituting the sum of the first image signal string; and the sum of the first image signal string. and a cumulative adder/subtracter for cumulatively adding and subtracting the product of the image signal of the pixel at one end of the image signal filtering device. 5 Construct means for calculating the sum of the first image signal sequence by an accumulative adder/subtractor that cumulatively adds and subtracts image signals of two pixels having a required interval among image signals of pixels continuous in the main scanning direction or sub-scanning direction. An image signal filtering device for obtaining an unsharp signal according to claim 4. 6. Claim 4, wherein the means for calculating the sum of the first image signal string is configured by a plurality of adders that sequentially add image signals of a required number of consecutive pixels in the main scanning direction or the sub-scanning direction. An image signal filtering device for obtaining the described unsharp signal.