JPH027668A - Image processing device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image processing device that performs image processing on a region-by-region basis.

[Conventional technology]

2. Description of the Related Art An image processing apparatus is known that photoelectrically reads an original image using an image sensor such as a COD and reproduces the image based on the image signal obtained by the reading.

[Problem to be solved by the invention] When such an image processing device processes a mixture of multiple images with different characteristics such as text and photographs, even if one image is processed well, the other image may be There was a problem that the images were not processed well.

[Means for solving problems]

The present invention has been made in view of the above points, and includes a means for photoelectrically converting an input image of a document and outputting a digital image signal;
The present invention provides an image processing apparatus having means for specifying a desired area of a document image and means for independently setting an edge enhancement amount or a smoothing amount for each specified area.

〔Example〕

The present invention will be explained below using preferred embodiments.

FIG. 5 is an external view of an image reading device to which the present invention is applied.

A document placed on a document table 101 is illuminated with a fluorescent lamp 104, and an image of the document is formed via mirrors 105 to 107 and a lens 108 on a CCD 103 in which several dozen light receiving elements are arranged in a line. It is configured. Furthermore, the drive motor 11
101: Mirrors 105-107 from 1m with CCD103
This device moves in a direction perpendicular to the arrangement direction of the light-receiving elements, sequentially focuses original images on a CCD 103, and reads one page's worth of information line by line.

FIG. 1 is an overall block diagram of the image reading apparatus shown in FIG. 5, and the description will be made according to this diagram. The CCD 103 (eg, Toshiba TCD 106C, 5000 pixels) receives light from the original and outputs an analog signal depending on the intensity of the light. After this analog signal is amplified by an amplifier 12, it is converted into a digital signal for each pixel by an 8-bit A/D converter 13, and this digital signal is corrected for output non-uniformity by a shading correction circuit 14. Ru.

The shading correction circuit 14 uses a fluorescent lamp 104 . outside the document placement area. Bringing an optical system consisting of a mirror 105,
CC when scanning the white plate 102 attached there
Data for one main scan from D103 is stored in memory 14'
The non-uniformity of the actual image signal is corrected based on the data in the memory 14'.

The shading-corrected image data is input to the buffer memory section 15.

The buffer memory section 15 will be explained with reference to FIG.

The image data 60 is input to the selector 53 and written into one of the selected memories 52A, B, C, and D. Memories 52A, B, C, and D each have 15
It has a capacity of 42 minutes, and each line is sequentially written from 52A to 52B, 52C, 52D, 52A, and so on.

Then, selectors 51A, B,
C.

The write address is given by the corresponding one of D.

Also, the remaining three memories that have not been written to (for example, memory 52B when writing to memory 52A).

52C, 52D) are given read addresses by the corresponding selectors 51. The data being read from the memory 51 is output by the selector 53 to the filter 16 as image data 63A, B, and C after being stored in the buffer memory.

The relationship between image data 63A, 63B, and 63C is always n-
The relationship between the 1st, nth, and (n+1)th lines is output.

The image data of lines (n-1, n, and n+1) created in this manner are input to a filter 16, which is a circuit block for edge enhancement or filter processing.

The filter 16 will be explained according to FIG.

The filter 16 includes a circuit section 54.55 for edge enhancement and a filter 56.55 for smoothing processing. 57, a circuit section 58 which delays the image data by the same amount of time as the processing of the above-mentioned circuits and does not perform any processing, and a selector 59 which selects one of the outputs of the above-mentioned five circuits.

The edge enhancement circuit sections 54 and 54 have a stronger edge enhancement ability, and the smoothing filter section 56. 57 is 5
6 has stronger smoothing ability.

With this configuration, the selector 59 selects the processed image data required for edge enhancement, filter processing, or no processing in accordance with the 3-bit data from the editing memory 22.

Next, the processed image data enters the γ correction circuit 17 and undergoes density conversion. The γ correction circuit 17 is composed of a ROM as shown in the third diagram, and performs density correction using an address table with six types of correction characteristics, and the type of correction is determined by 3-bit data from the editing memory 22. Switching is performed by accessing the upper address (ADR, 8 to 10) of .

The density-converted image data is input to the trim mask circuit 18 and subjected to trimming/masking processing to extract/delete a desired image.

The trim mask circuit 18 is used for outputting the density instructed by the microcomputer from the output port door 2 through the reselector 71 as shown in FIG.
It is configured to be switched according to data from 2.

A negative/positive image is selected from the trimmed and masked image data by the negative/positive unit 19. The negative/positive circuit 19 is constituted by an exclusive OR circuit, and by inverting and outputting the image data according to the data from the editing memory 22, image data representing a negative image is generated, and by outputting a non-inverted video signal, Image data representing a positive image can be extracted. The image data controlled as described above is sent to the printer section 20 consisting of, for example, a laser beam printer, and an image with gradation is output to the printer section 20.
The image is formed by

Figure 6 shows a printer section 20 consisting of a laser beam printer.
FIG. 7 is a diagram showing the signals of each part.

The input image data is converted by the D/A converter 131 into an analog signal as shown in FIG. 7(a).

Also, 132. 133 is a triangular wave generation circuit; 132
133 generates a triangular wave with one period per pixel as shown in FIG. 7(b), and numeral 133 generates a triangular wave with one period per three pixels as shown in FIG. 7(c). The comparator 134 compares the signal 140 from the D/A converter 131 with the triangular wave signal 141, and obtains a pulse width modulated signal as shown in FIG. 7(d). Similarly, a pulse width modulated signal is obtained by the comparator 135 as shown in FIG. 7(e).

In this way, the pulse width modulated signals using the two types of triangular waves are sent to the gate circuit 136 which operates according to the data from the editing memory 22. 137. Either one is selected by a selector circuit consisting of 138 and 139, and becomes a laser drive signal.

The difference between the signal 143 (FIG. 7(d)) and the signal 144 (FIG. 7(e)) will be described.

Since the signal 143 is pulse-modulated for each pixel, it has the advantage of good resolution. However, the pulse is very small (so it is not very suitable for expressing density gradations).

As a method to compensate for this drawback, the signal 144 incorporates an area gradation expression technique in which one density is expressed using three pixels. This signal 144 has a slightly inferior resolution, but can exhibit excellent gradation. Therefore, when characters, etc. require high-resolution signal 143, such as in photographs, the laser is driven with signal 144 to improve gradation reproducibility.

In other words, in this example, the resolution is 400 dots/1.
Since it is configured as a nch machine, there are 400 lines and 13
It becomes a 3-wire switchable device.

FIG. 8 is an external view of the operation unit 24, which includes a digitizer part 162 provided on the document holder for inputting editing conditions and editing coordinates. By pressing the coordinate input section 150 of the digitizer section 162 with the pointing pen 151, the X and Y coordinates from the reference point 166 are transmitted to the CPU 23. Further, 152 to 162 are keys for inputting various editing conditions, and by pressing these keys with the pointing pen 151, data indicating the corresponding editing conditions are transmitted to the CPU 23. Note that on the top surface of the image reading device other than the document holder, there are a numeric keypad and clear key 170 for inputting numerical values, and a disk 141 for displaying numerical values.3.
A start key 171 for instructing to start an image reading operation and a stop key 172 for instructing to stop the image reading operation are provided. The information of these keys 170 to 172 is also CP
It is transmitted to U23.

The switching signal of the filter 16 and the γ correction circuit 1 described above
7, the area signal of the trim mask circuit 18, the negative area signal of the negative/positive section 19, and the gradation capability switching signal of the printer are output from the editing memory 22 in which the image processing mode specified by the operation section is set. It looks like this.

The editing memory 22 will be explained with reference to FIG.

The editing memory 22 has a first memory. - There are second editing memories 401 and 402, and the editing memories 401 and 402 have a 9-bit configuration. In the above embodiment, bit 0 is "image prohibited", that is, in the trim mask circuit 18, the density instructed by the microcomputer is The image data output instruction bit 1 is "video inversion", that is, the image data output instruction for inverting the image in the negative/positive circuit 19; bit 2. 3.
Reference numeral 4 denotes a "gamma correction level", which is connected to the ADHs 8 to 10 of the memory in the gamma correction circuit 17, and used to instruct switching of the gamma pattern. Also, bit 5. 6.
7 is a signal for "filter selection", and bit 8 is connected as a gradation capability switching signal of the printer.

Editing memories 401 and 402 are RAMs that store image editing data (that is, information for performing image processing). M
When SEL (memory select signal) is set to rHJ level, selector 403. [5 is selected as the A side, and the editing memory 401 is controlled by the CCD address (main scanning address). Thereby, the contents of the editing memory 401 are output as editing data via the selector 405 according to the CCD address. At this time, the selector 40
4.406 selects the B side, and the editing memory 402 is controlled by the microcomputer address. In this state, the editing memory 402 is connected to the address bus and data bus of the microcomputer, and can be freely read and written by the microcomputer.

By the way, when the editing memories 401 and 402 are connected to the COD address, the addresses of the editing memories 401 and 402 correspond to the pixel addresses of the COD. In other words, the first pixel of the COD corresponds to memory address 1, and the nth pixel corresponds to address n, so if you use a COD with a total of 5000 pixels, 8 bytes ( 8 bits x 9) is used. Therefore, m
Processing data for processing the th pixel is written to address m of the image memory.

In this device, a region is input using a digitizer, and the processing to be performed on that region can be set arbitrarily, and the number of regions can be set without limit. Therefore, for example, if the first area is edge-enhanced or negative, the second area is
Edge enhancement, filter, density, negative/positive, and 133/400 lines can be independently selected in any combination, such as filter and 133 lines in the area, and edge enhancement and thin image processing in the third area. I can do it.

Editing memory 401 or 40 using FIG. 9 and FIG.
2, an example of image editing data set by the CPU circuit unit 23 will be explained.

FIG. 9 shows the processing content on the original ORG, in which the operator specifies three arbitrary areas (1), (II), and (m) using the digitizer of the operation unit 24, and furthermore, the image of area (I) is For the image, white mask processing and first edge enhancement processing are performed, for the image in region (n), first smoothing processing and 133 line output are performed, and for region (m) Assume that an instruction is given to perform a second edge enhancement process and a first image density conversion on the image.

Note that SO to S8 indicate pixel positions in the main scanning direction, (A)
.

(B) and (C) show scanning lines in the sub-scanning direction.

In accordance with the above instructions, the CPU circuit unit 23 forms image editing data for the image signal of each scanning line and sets it in the editing memories 401 and 402. In addition, the designated area (I)
, (II), and (m) are subjected to white mask processing.

10(1), (2), and (3) show image editing data set in the editing memory corresponding to scanning lines (A), (B), and (C) shown in FIG. 8, respectively. That is, the image editing data for areas other than the specified areas (I), (n), and (m) is (oooooooooo), (110000010) for area (I), and (100110001 for area (II)). ), and for region (III) (
100010100) is the pixel position SO~ in the main scanning direction
It is written to the address corresponding to S8. Incidentally, in FIG. 9, to prevent the drawing from becoming complicated, consecutive pieces of the same data are indicated by "~" marks.

Furthermore, the existence of two memory systems such as the editing memories 401 and 402 means that each line or multiple lines has M
This is to set the SL (memory select signal) to "HJ, rLJ" to switch between the editing memory that is accessed by the microcomputer and the editing memory that is accessed by the CCD address.In other words, it is set to microcomputer access, and the next editing is performed. While editing information regarding the content is being written into one editing memory, read information already written from the other editing memory is read out onto the bus for use in CCD image editing.

To switch image editing data to new data, use MSE
By switching the level of L, the edit memory accessed by the C and CD addresses can be switched to the edit memory in which new edit data has been written by the microcomputer. That is, if the MSEL level is changed line by line, the editing data can be changed every line at most. When the image editing data is not changed, that is, when the MSEL is not changed, the same image editing data that is always written in the same editing memory is repeatedly used.

The operation procedure of the CPU 23 regarding the formation of the above pixel editing data will be explained.

11(A), (B) and FIG. 12(A), (B) are flowcharts showing the control procedure of the microcomputer of the CPU 23 related to the formation of image editing data, and this procedure is performed by the microcomputer. Internal memory R
It is written in the OM in advance.

FIGS. 11A and 11B are flowcharts showing control procedures regarding input determination from the digitizer part 150.

When keys 152 to 158 of the digitizer part 150 are pressed, it is determined in step 701 that any editing key has been turned on, and data indicating the editing conditions corresponding to the pressed key is stored in the built-in memory RAM of the CPU 23. Ru. Next, when two points on the diagonal line of the coordinate input section 150 (indicating two corners of a desired rectangular area) are pressed with the touch pen 151, the coordinates (Xi, Yl, X2°Y2) indicating the two points are determined in steps 702 to 705. is stored in memory RAM.

Next, the editing conditions of the pressed editing keys 152 to 161 are determined, and Flag 1 on the memory RAM is set according to the conditions.
~Turn on Flag10 (steps 706 to 723)
.

That is, if the key 152 or 153 for specifying trimming of the specified area is pressed, the process advances from step 706 to step 707, and if the key 152 is to make the outside of the trimming area black, the flag is set in step 708.
Turn on l. Further, if the key 153 makes the outside of the trimming area white, Flag2 is turned on in step 709.

Further, if the key 154 or 154 for specifying masking of a specified area is pressed, steps 706 and 710
Proceed to step 711 and further mask key 1 with black.
54, flag3 is turned on in step 712. Further, if the key 155 is to be masked with white, Flag4 is turned on in step 713.

If the key 156 specifies that the specified area be processed in photo mode, step 706°710.7
14, the process proceeds to step 715, and Flag5 is turned on.

If the key 156 instructs to process the specified area in photo mode, steps 706, 710, 7
14, the process proceeds to step 715, and Flag5 is turned on.

If the key 157 specifies processing outside the specified area in photo mode, steps 706, 710, 7
14. Proceed to step 719 from 716 and turn on Flag6.

If the key 158 instructs to output the specified area as a negative image, steps 706 and 710;
Proceed to step 719 from 714.716.718 and F
Turn on lag7.

If the key 159 instructs to output an area outside the designated area as a negative image, steps 706 and 710;
714.716.718.720, the process advances to step 721, and Flag8 is turned on.

If the key 160 instructs to output the specified area at a desired density, steps 706, 710 and 714
, 718.720.722. Proceed to step 23,
Turn on Flag9.

If the key 161 instructs to perform desired edge enhancement processing or smoothing processing within the specified area, step 706.710.714.718.720°722.7
24, the process proceeds to step 725, and FlaglO is turned on.

As described above, the coordinate data representing the desired area of the document input by the operator and the data corresponding to the editing conditions for images within or outside the desired area are stored in the memory R.
Set to AM. Note that multiple areas may be specified on the manuscript (and different types of editing conditions can be set for the specified areas).

12(A) and 12(B), before the start key 171 is pressed, the C
The start key 17 is activated based on the coordinate data and editing condition data stored in the memory RAM of the PU circuit unit 208.
11 is a flowchart showing the control procedure of the CPU circuit unit 208 when reading a document after the button 1 is pressed. FIG.

When the start key 171 is pressed, the CPU circuit section 208
performs the following processing depending on what mode is set in the editing area (memory RAM).

First, data is set in the editing memories 401 and 402 to set initial values, such as character mode, trimming, no masking, and intermediate density level (step 749).

Then, in steps 750, 751, and 752, it is determined whether the current scanning position of the original (the line read by the CCD 103) corresponds to the area (editing area) designated as described above.

Further, steps 753 to 788 determine which flag is set in the memory RAM, and set a bit in the editing memory indicating the editing condition corresponding to the flag.

Note that steps 753 to 771 are processes performed before the scanning position reaches the designated area and after passing through the designated area, and steps 773 to 792 are processes performed while the designated area is being scanned.

Assume that the key 152 is now pressed and Flagl is turned on. When reading the original, the process advances from step 750 to step 753. Therefore, when it is determined in step 753 that Flagl is on, the processing in step 754 is performed until the scanning position reaches the editing area, and bit O in the entire area of the editing memory is set to bit l so that black is output without outputting an image. set. Next, if it is determined in step 772 that the editing area has been reached, steps 773 to 77
Proceed to step 4, and only the editing area is output as an image (bit O is set to 1)
, the editing memory is set so that the area outside the editing area is black. After that, when it is determined in step 752 that the editing area has been passed, the process goes from step 753 to step 754 again, and the editing memory sets bit 0 of the entire area to 0 so that it becomes an image point.

If the trimming white key 153 is pressed and Flag2 is turned on, bit O of the editing memory is set to 0 in steps 755 and 756 so that white is output until the editing area is reached. If the image has been reached, only the image in the editing area is output in steps 775 and 776 (
Bit O is 1), otherwise the editing memory is set such that the image is inhibited and white is output (O in bit O). Next, when the editing area ends, bit 0 of the entire editing memory is set to 0 so that the image is prohibited again in step 756 and all white is output.

Further, when the masking black key 154 is pressed and FIag3 is turned on, bits 0 to 1 of the editing memory are set to 1 in steps 757 and 758 so that all images are output until reaching the editing area. When the editing area is reached, in steps 777 and 778, the editing memory is set such that only the editing area becomes a black image (O in bit 0), and images are output in other areas (1 in bit 0). Next, when the editing area ends, bit 0 of the entire editing memory is set to 1 so that the entire image is output again (steps 757, 758).

Also, if the masking white key 155 is pressed and F1ag4 is turned on, steps 759 and 760
Until the editing area is reached, bit O of the entire editing memory is set to 1 so that the entire image is output. When the editing area is reached, the image becomes white only in the editing area (bit O is set to 1) in steps 779 and 780. 0), otherwise the editing memory is set so that the image is output (bit 0 = 1).

Next, when the editing area ends, the bit O in the entire editing memory is set to 1 so that the entire image is output (steps 759 and 760).

Also, if the in-area photo key 156 is pressed and FIag5 is turned on, bit 8 of the entire editing memory is set to O so that the image is output in character mode until it reaches the editing area in steps 761 and 762. set. When the editing area is reached, the editing memory is set in steps 781 and 782 so that only the editing area is subjected to photo processing (bit 8 is 1), and the rest is text processing (bit 6 is 0). Next, when the editing area ends, bit 8 of the editing memory is set to 0 so that the entire image is processed in character mode.
is set (steps 761, 762).

In addition, when the out-of-area photo key 157 is pressed and FIag6 is turned on, bit 8 of the entire editing memory is set such that all images are output in photo mode until the editing area is reached in steps 763 and 764. Set to 1. Then, if the editing area is reached, step 783,
784, only the editing area is set to character mode (bit 8 is set to 0).
), and otherwise set the editing memory to perform photo processing (bit 8 = 1). Next, when the editing area ends, bit 8 of the entire editing memory is set to 1 so that the entire image is processed in photo mode (step 763.7).
64).

In addition, when the in-area negative key 158 is pressed and F]ag7 is turned on, bit l of the entire editing memory is set to 0 so that the entire area is output as a positive image until the editing area is reached in steps 765 and 766. Set. When the editing area is reached, steps 785 and 78
6, the editing memory is set so that only the editing area is in negative mode (bit 1 is 1) and the rest is in positive mode (bit 1 is 0). Next, when the editing area ends, bit 2 of the entire editing memory is set to 0 so that the entire image becomes a positive image (step 76
5.766).

In addition, if the out-of-area negative key 159 is pressed and Flag8 is turned on, bit l of the entire editing memory is set to 1 in steps 767 and 768 so that the entire area is output as a negative image until the editing area is reached. do. If the editing area is reached, steps 787, 7
88, only the editing area is in positive mode (
Bit l is set to O), otherwise the mode is negative (
Set bit 1 to 1) in the editing memory. Next, when the editing area ends, bit 1 of the entire editing memory is set to 1 so that the entire image becomes a negative image (steps 767 and 768).

In addition, if the area density key 160 is pressed and Flag9 is turned on, editing is performed so that the density is set to "F5" in the normal first γ correction process until the editing area is reached in step 769. bit 2.3 of whole memory
．． Set O to 4. When the editing area is reached, the bits corresponding to the γ correction processing in which only the editing area is specified are set to bit 2 in steps 789 and 790. 3.4
otherwise, set bit 2.3.4 to O. Next, when the editing area ends, the first γ processing should be performed on the entire image (bit 2 of the entire editing memory
．． 3. 4 is set to 0 (step 769).

Also, when the area filter key 161 is pressed, Flagl
If O is on, bits 5, 6, and 7 of the entire editing memory are set so that no filtering or edge enhancement processing is performed until the editing area is reached in step 771.
Set to 0. When the editing area is reached, bits 5 and 5 are set in steps 791 and 792 to select the bit corresponding to the filter or edge emphasis processing in which only the editing area is specified.
6. 7, otherwise bits 5.6.
Set 7 to 0.

Next, when the editing area ends, bits 5, 6, and 7 of the entire editing memory are set to 0 in order to leave the entire image unprocessed (step 771).

As described above, appropriate conditions are set in the editing memory by the CPU 23 in relation to the scanning position in accordance with the editing key and area designation.

In the above embodiment, an editing memory is provided corresponding to one pixel of the CCD, but a plurality of consecutive pixels (for example, 8 pixels) may be treated as one block, and an editing memory may be provided corresponding to this block. .

According to this, the capacity of editing memory can be reduced.

However, in this case, the accuracy of image editing will deteriorate, but the microcomputer's calculations will be faster.

Further, in this embodiment, a digitizer is used as an input means for inputting the trimming area, etc., but a numeric keypad and keys representing X and Y may also be used. For example, X (
150~200mm), when trimming Y (50~100mm), press the “X” key “150*200*”
The same thing can be achieved by sequentially inputting data using the numeric keypad, such as "Y" key "50*100*".

It is also possible to use voice input as another means of inputting the trimming area, etc., and it is also possible to directly input the operations pressed on the numeric keypad by voice, thereby replacing the numeric keypad.

Further, as another input means, it can also be realized by inputting an area determined by another microcomputer through serial communication.

Furthermore, as another input means, the same thing can be achieved by having the CPU read data stored in an IC card, memory card, or the like.

Further, although the editing RAM is used in such a manner that all editing information is written in each pixel, it can also be realized by writing only the changes in processing to the memory. Using this method saves the time required to write data to memory, but complicates the calculations.

Also, the capacity of the editing RAM was set to be the same as the number of main scanning pixels (
In this embodiment, since a 5,000 pixel CCD is used, a memory corresponding to 1 bit can also be used for 2 pixels, 3 pixels, etc. (the pixel bone is used for 5 of the 8K x 8 bit memory). In that case, the editing accuracy will deteriorate (for example, in the case of 1 bit for 2 pixels, the unit is 0.125 mm, and for the case of 1 bit for 3 pixels, the unit is 0.1875 mm), but the memory capacity will be halved, 1/3, etc. Memory capacity is reduced and processing speed is improved. However, the same effects as the present invention can be obtained. In addition, in this embodiment, the image editing data is 8 bits for each pixel, making it possible to execute several types of editing processing for each pixel, but by increasing this number of bits, even more types of editing processing can be performed. In addition, the number of bits can be reduced if so many types of editing processing are not required.

As explained above, where you want to emphasize text, increase the amount of edge enhancement to make the text appear clearer.For halftone images, etc., applying edge enhancement causes moire, so adjust the amount of smoothing filtering to adjust the strength of moire. You can switch accordingly. Therefore, it is possible to select the amount of edge enhancement depending on the text area, such as thin text or dark text, and to select the filter strength depending on the amount of moiré for each area, resulting in very high quality images. It will be done.

〔effect〕

As explained above, according to the present invention, since the edge enhancement amount or smoothing 1 can be set independently for each document image area, it is possible to satisfactorily process a document image in which multiple images with different characteristics coexist. .

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an image processing device according to the present invention, and FIG.
The figure is a block diagram showing the configuration of the buffer memory unit and filter, Figure 3 is a block diagram showing the configuration of the γ conversion, masking trimming, and negative/positive conversion units, Figure 4 is a block diagram showing the configuration of the editing memory, and Figure 5 6 is a diagram showing the configuration of the image reading device, FIG. 6 is a diagram showing the configuration of the printer, FIG. 7 is a diagram showing the signals of each part of the printer, FIG. 8 is a diagram showing the configuration of the operation section, and FIG. 9 is a diagram showing the configuration of the printer. A diagram showing a processing example, FIG. 10 is a diagram showing the contents of the editing memory, FIG. 11 (A), (B), and
Figure 2 (A). (B) is a flowchart showing the operating procedure of the CPU, in which 103 is a CCD, 16 is a filter, 17 is a γ correction circuit, 18 is a trim mask circuit, and 19 is a negative/positive section.

Claims (1)

[Claims] It has a means for photoelectrically converting the input image of the original and outputs a digital image signal, a means for specifying a desired area of the original image, and a means for independently setting the amount of edge enhancement or the amount of smoothing for each specified area. An image processing device characterized by: