JPH027780A - Active matrix liquid crystal display driver - Google Patents

Active matrix liquid crystal display driver

Info

Publication number
JPH027780A
JPH027780A JP15860588A JP15860588A JPH027780A JP H027780 A JPH027780 A JP H027780A JP 15860588 A JP15860588 A JP 15860588A JP 15860588 A JP15860588 A JP 15860588A JP H027780 A JPH027780 A JP H027780A
Authority
JP
Japan
Prior art keywords
liquid crystal
electrode
common
common electrode
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15860588A
Other languages
Japanese (ja)
Inventor
Hiroaki Ishitani
石谷 普朗
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP15860588A priority Critical patent/JPH027780A/en
Publication of JPH027780A publication Critical patent/JPH027780A/en
Pending legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Transforming Electric Information Into Light Information (AREA)

Abstract

PURPOSE:To reduce flicker by adopting a segmented common electrode and supplying an AC amplitude modulation pulse on a common potential. CONSTITUTION:The common electrode 9 is segmented for each row so as to supply a signal independently for each row and when a FET 3 is turned off, an AC signal in which the envelope of the amplitude peak varies opposite to the voltage drop is applied to other common electrodes 9 clipping the liquid crystal 1 while superimposed on the common potential so that the brightness change in each picture element due to the voltage drop caused during one frame of gate nonselection period caused by the effect of the resistive component of the liquid crystal 1 or the like. Thus, the brightness change is reduced considerably in average over each frame.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明はアクティブマトリクス液晶ディスプレイのフ
リッカ−を低減することのできる駆動装置に関するもの
である。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a driving device that can reduce flicker in an active matrix liquid crystal display.

〔従来の技術〕[Conventional technology]

第3図は従来のアクティブマトリクス液晶ディスプレイ
の等価回路図である。図において1はマトリクス状に配
された液晶セル、2は各液晶セル1と並列になされてい
る記憶用コンデンサ、3は各液晶セル1毎にその一方の
電極(ドレイン電極あるいは画素電極)に接続されて設
けられている電界効果トランジスタ(FET)であって
、これら3つの素子にて一画素を構成している。4はマ
トリクスの各列毎にFET3の人力電極(ソース電極)
に共通接続された複数のX電極、5はマトリクスの各行
毎にFET3のゲート電極に共通接続された複数のY電
極である。6はY電極5に順次走査パルスを印加する走
査回路、7は映像信号をサンプリングしホールドするこ
とにより一水平走査線分の映像信号をX電極数の並列の
映像信号に変換しX電極4に印加する直/並列変換回路
である。8は全ての液晶セル1の他方の電極に共通接続
された共通電極である。
FIG. 3 is an equivalent circuit diagram of a conventional active matrix liquid crystal display. In the figure, 1 is a liquid crystal cell arranged in a matrix, 2 is a storage capacitor connected in parallel with each liquid crystal cell 1, and 3 is connected to one electrode (drain electrode or pixel electrode) of each liquid crystal cell 1. These three elements constitute one pixel. 4 is the manual electrode (source electrode) of FET3 for each column of the matrix
A plurality of X electrodes are commonly connected to each other, and a plurality of Y electrodes 5 are commonly connected to the gate electrodes of the FETs 3 for each row of the matrix. 6 is a scanning circuit that sequentially applies scanning pulses to the Y electrodes 5; 7 is a scanning circuit that samples and holds the video signal, converts the video signal for one horizontal scanning line into parallel video signals of the number of X electrodes, and sends them to the X electrodes 4; This is a serial/parallel conversion circuit that applies voltage. A common electrode 8 is commonly connected to the other electrode of all liquid crystal cells 1.

次にこの表示装置の駆動方法について説明する。Next, a method of driving this display device will be explained.

今、Y電極のi行目をYiとするとY電極5の各ti、
例えばY1〜Y4の電極には、第5図のY1〜Y4のよ
うなタイミングの波形信号が走査回路6により印加され
ている。この走査パルスがFET3のゲートに加わると
その選択された行の全てのFET3はオン状態となり、
X電極4から並列映像信号に応じた電荷がFET3を介
して記憶用コンデンサ2に充電される。そしてFET3
がオフ状態になっても記憶用コンデンサ2に蓄えられた
電荷により液晶に映像信号に対応した電圧が印加され続
けるため、各液晶セルの透過光が映像信号により制御さ
れ表示できることになる。
Now, if the i-th row of the Y electrode is Yi, each ti of the Y electrode 5,
For example, the scanning circuit 6 applies waveform signals having timings such as those shown in FIG. 5 to the electrodes Y1 to Y4. When this scanning pulse is applied to the gate of FET3, all FET3 in the selected row are turned on,
A charge corresponding to the parallel video signal is charged from the X electrode 4 to the storage capacitor 2 via the FET 3. and FET3
Even when the storage capacitor 2 is turned off, a voltage corresponding to the video signal continues to be applied to the liquid crystal due to the charge stored in the storage capacitor 2, so that the transmitted light of each liquid crystal cell can be controlled by the video signal and displayed.

なお、液晶に同極性の電圧を印加し続けると寿命が短く
なるという問題があるため、液晶に印加する電圧の極性
が逆になっても同じ透過光特性を有していることを利用
して共通電極8の電位Vcに対して画素電極の電位がフ
レーム周期で反転するような信号処理を施している。
However, since there is a problem that the lifetime of the liquid crystal will be shortened if voltage of the same polarity is continuously applied to the liquid crystal, it is possible to use a liquid crystal that has the same transmitted light characteristics even if the polarity of the voltage applied to the liquid crystal is reversed Signal processing is performed such that the potential of the pixel electrode is inverted with respect to the potential Vc of the common electrode 8 at a frame period.

以上は理想的なアクティブマトリクス液晶ディスプレイ
の駆動方式の説明であるが、実際にはFETがOFFで
あるとき(非選択期間)、液晶の抵抗骨RLCDによる
各画素にチャージされた電荷のコモン電極に向かっての
リーク等による影響の為、■フレーム期間内において各
画素の電位は変動している。
The above is an explanation of the driving method of an ideal active matrix liquid crystal display, but in reality, when the FET is OFF (non-selection period), the charge charged in each pixel by the resistance bone RLCD of the liquid crystal is transferred to the common electrode. Due to the influence of leakage, etc., the potential of each pixel fluctuates within the frame period.

第4図はある1画素の1フレーム内の上記RLC0の影
響による画素電極の電位の変動を説明した図である。第
4図のRLCDによる降下分はRLCDが無限大となる
とこの影響は近似的に零となり、もし、RIll以外の
変動要因がなければ正極性時、或いは負極性時それぞれ
1フレ一ム間、同じ電圧が液晶に印加され続ける為、時
間的に1フレ一ム間輝度は変化せず、フリフカ−は感じ
られない。
FIG. 4 is a diagram illustrating fluctuations in the potential of the pixel electrode due to the influence of RLC0 in one frame of a certain pixel. The drop caused by RLCD in Figure 4 becomes approximately zero when RLCD becomes infinite, and if there are no fluctuation factors other than RIll, it will remain the same for one frame at positive polarity or negative polarity. Since voltage continues to be applied to the liquid crystal, the brightness does not change from frame to frame over time, and no flicker is felt.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来のアクティブマトリクス液晶ディスプレイの駆動方
式は以上のようなものであるので、実際にはRLCD0
値は有限である等の為、種々の影響による1フレーム内
の輝度変化が生じ、フリッカ−を感じるなどの問題点が
あった。
The driving method of the conventional active matrix liquid crystal display is as described above, so in reality, RLCD0
Since the value is finite, there are problems such as brightness changes within one frame due to various influences, such as flickering.

この発明は上記のような問題点を解消するためになされ
たもので、上記フリッカ−を低減できるアクティブマト
リクス液晶ディスプレイの駆動装置を得ることを目的と
する。
The present invention was made to solve the above-mentioned problems, and an object of the present invention is to provide a driving device for an active matrix liquid crystal display that can reduce the above-mentioned flicker.

〔課題を解決するための手段〕[Means to solve the problem]

この発明に係るアクティブマトリクス液晶ディスプレイ
の駆動装置は、共通電極を行単位にセグメント化すると
共に、各共通電極(コモンライン)に、そのラインに対
応する画素電極電位の1フレ一ム期間内の各フレームに
わたる平均的な変動による輝度変化をキャンセルできる
交流振幅変調パルスをコモン電位に重畳し、供給するよ
うにしたものである。
The driving device for an active matrix liquid crystal display according to the present invention segments a common electrode in units of rows, and applies each common electrode (common line) to each pixel electrode potential within one frame period corresponding to that line. An alternating current amplitude modulation pulse that can cancel luminance changes due to average fluctuations over a frame is superimposed on the common potential and supplied.

〔作用〕[Effect]

この発明においては、共通電極をセグメント化したため
、各画素が選択される時点に時間的な位相を合わせた輝
度変動の補正パルスをその画素のコモン電極へ供給する
ことが可能となり、また、その補正パルスがその画素の
1フレ一ム期間内の各フレームにわたる平均的な輝度変
化をキャンセルできる交流振幅変調パルスをコモン電位
に重畳した信号とした為、上記輝度変化が大幅に減少し
、フリッカ−を低減できる。
In this invention, since the common electrode is segmented, it is possible to supply a correction pulse for brightness fluctuations whose temporal phase is aligned with the time point at which each pixel is selected to the common electrode of that pixel. Since the pulse is a signal in which an AC amplitude modulation pulse that can cancel the average brightness change over each frame within one frame period of that pixel is superimposed on the common potential, the above brightness change is significantly reduced and flicker is eliminated. Can be reduced.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.

第1図において、lはマトリクス状に配された液晶セル
、2は各液晶セル1と並列になされている記憶用コンデ
ンサ、3は各液晶セル1毎にその一方の電極(ドレイン
電極あるいは画素電極)に接続されて設けられている電
界効果トランジスタ(FET)であって、これら3つの
素子にて一画素を構成している。4はマトリクスの各列
毎にFET3の入力電極(ソース電極)に共通接続され
た複数のX電極、5はマトリクスの各行毎にFET3の
ゲート電極に共通接続された複数のY電極である。6は
Y電極5に順次走査パルスを印加する走査回路、7は映
像信号をサンプリングホールドすることにより一水平走
査線分の映像信号をX電極数の並列の映像信号に変換し
X電極4に印加する直/並列変換回路である。9は液晶
セル1の他方のマトリクス状に配された電極を各行毎に
共通接続された複数のC電極(コモンライン)で、10
は各コモンラインに共通電極電位及び補正パルスを印加
するコモンライントライバである。
In FIG. 1, l indicates liquid crystal cells arranged in a matrix, 2 indicates a storage capacitor connected in parallel with each liquid crystal cell 1, and 3 indicates one electrode (drain electrode or pixel electrode) for each liquid crystal cell 1. ), and these three elements constitute one pixel. 4 is a plurality of X electrodes commonly connected to the input electrode (source electrode) of the FET 3 for each column of the matrix, and 5 is a plurality of Y electrodes commonly connected to the gate electrode of the FET 3 for each row of the matrix. 6 is a scanning circuit that sequentially applies scanning pulses to the Y electrodes 5; 7 is a scanning circuit that samples and holds the video signal to convert the video signal for one horizontal scanning line into parallel video signals of the number of X electrodes, and applies the same to the X electrodes 4; This is a serial/parallel conversion circuit. Reference numeral 9 denotes a plurality of C electrodes (common lines) which are commonly connected to the other electrodes arranged in a matrix in each row of the liquid crystal cell 1;
is a common line driver that applies a common electrode potential and a correction pulse to each common line.

次に本装置の駆動方法について説明する。Next, a method of driving this device will be explained.

第1図のX電極5のi行目の電極をYi、 C電極9の
yti行目電極をCiとする。コモンライントライバ1
0により、各C電極9には第2図に示す01〜C4のよ
うな、コモン電極電位Vcに対し対称に矩形波状のパル
スを重畳してなる信号が印加される。また走査回路6に
より、X電極5には従来例と同様に第2図に示すY1〜
Y4のような走査パルスが印加される。さらにこの走査
パルスはFET3のゲートに加わるとその選択された行
の総てのFET3がオン状態となり、X電極4から並列
映像信号に応じた電荷がFET3を介して記憶用コンデ
ンサ2に充電されることも従来例と同様である。
It is assumed that the i-th electrode of the X electrode 5 in FIG. 1 is Yi, and the yti-th row electrode of the C electrode 9 is Ci. Common line driver 1
0, a signal such as 01 to C4 shown in FIG. 2, which is formed by symmetrically superimposing rectangular wave pulses on the common electrode potential Vc, is applied to each C electrode 9. Furthermore, the scanning circuit 6 allows the X electrodes 5 to be connected to Y1 to Y1 shown in FIG. 2, as in the conventional example.
A scanning pulse such as Y4 is applied. Furthermore, when this scanning pulse is applied to the gate of the FET 3, all the FETs 3 in the selected row are turned on, and the storage capacitor 2 is charged with an electric charge corresponding to the parallel video signal from the X electrode 4 via the FET 3. This is also the same as in the conventional example.

ここで、FET3がオフ状態になったとき第4図に示し
たように液晶の抵抗分RLCll等の影響によりゲート
非選択期間の1フレ一ム間に電圧降下が生じるが、この
電圧降下による各画素の輝度変化を補償するように液晶
を挟んでいる他方の共通電極9に、その振幅のピーク値
のエンベロープが上記電圧降下とは逆方向になるような
交流信号をコモン電位に重畳し印加しているため、上記
輝度変化をキャンセルできることになる。即ちTN(ツ
ィステッド ネマティック)モードでの液晶は、その両
端に印加されている電位差ではなく、その実効値に対し
て応答するものである為、上記のようにコモン電極のD
C電位を一定に保ったまま交流骨を振幅変調した信号を
コモン電極に重畳することにより、上記輝度変化を補正
できることになる。
Here, when FET3 is turned off, a voltage drop occurs during one frame of the gate non-selection period due to the influence of the liquid crystal resistance RLCll, etc., as shown in FIG. An alternating current signal whose amplitude peak value envelope is in the opposite direction to the voltage drop is superimposed on the common potential and applied to the other common electrode 9 sandwiching the liquid crystal so as to compensate for changes in pixel brightness. Therefore, the above luminance change can be canceled. In other words, the liquid crystal in TN (twisted nematic) mode responds not to the potential difference applied between its ends but to its effective value, so as mentioned above, the D of the common electrode
By superimposing a signal obtained by amplitude modulating the AC bone on the common electrode while keeping the C potential constant, it is possible to correct the brightness change described above.

なお、コモン電極を各行毎にセグメント化するのは各画
素への書込み時刻により上記輝度変化の位相が異なる為
、これに対応すべく各行ごとに独立に信号を供給できる
様に考慮したものである。
Note that the common electrode is segmented for each row because the phase of the luminance change described above differs depending on the writing time to each pixel, so in order to cope with this, it is possible to supply signals independently for each row. .

更に上記ではある時刻でのフレームについてのみ説明し
たが、動画時は各フレームによって画素電極の電位は変
化し、そのフリッカ−の強さは異なる。しかしながら、
全てのフレームを通じて画素電極の電位の変動量が変動
してもその傾向は変わらない為、上記変動の中で中レベ
ル程度のものに合わせてそれを補償できる補正パルスを
Ci電極に重畳することにより、各フレームにわたり上
記輝度変化を平均的に大幅に低減できる。
Furthermore, although only frames at a certain time have been described above, when a moving image is displayed, the potential of the pixel electrode changes depending on each frame, and the intensity of flicker varies depending on the frame. however,
Even if the amount of fluctuation in the potential of the pixel electrode changes throughout all frames, the tendency does not change, so by superimposing a correction pulse on the Ci electrode that can compensate for the medium level of the fluctuation. , the luminance change can be significantly reduced on average over each frame.

なお上記実施例ではコモン電極に重畳する交流信号とし
て第2図に示したような矩形波状のパルスを用いた場合
を説明したが、これはコモン電極電位Vcに対し対称な
波形であれば正弦波や三角波等であってもよ(、上記実
施例と同様の効果を奏する。
In the above embodiment, a case was explained in which a rectangular waveform pulse as shown in FIG. It may also be a triangular wave or the like (which produces the same effect as the above embodiment).

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば共通電極をセグメント
化し、該共通電極に、そのラインに対応する画素電極電
位の1フレ一ム期間内の各フレームにわたる平均的変動
による輝度変化をキャンセルできる交流振幅変調パルス
をコモン電位に重畳して供給するようにしたため、各フ
レームにわたる1フレーム内での平均的な輝度変化を減
少でき、フリッカ−を低減できるという効果がある。
As described above, according to the present invention, a common electrode is segmented, and an alternating current is applied to the common electrode, which can cancel the luminance change caused by the average fluctuation over each frame within one frame period of the pixel electrode potential corresponding to the line. Since the amplitude modulation pulse is supplied superimposed on the common potential, the average luminance change within one frame over each frame can be reduced, and flicker can be reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例によるアクティブマトリク
ス液晶ディスプレイの駆動装置を説明するための構成図
、第2図は第1図の各部のタイミング及び波形を示す図
、第3図は従来のアクティブマトリクス液晶ディスプレ
イの駆動装置を説明するための構成図、第4図は1画素
当たりのダイナミックな特性を説明する図である。 1は液晶セル、2は記憶用コンデンサ、3はFET、4
はX電極、5はY電極、6は走査回路、7は直/並列変
換回路、8は共通電極、9は共通電極、10はコモンラ
イントライバ(共通電極駆動手段)。 なお、図中同一符号は同一または相当部分を示す。
FIG. 1 is a block diagram for explaining a driving device for an active matrix liquid crystal display according to an embodiment of the present invention, FIG. 2 is a diagram showing the timing and waveforms of each part of FIG. 1, and FIG. FIG. 4 is a block diagram illustrating a driving device for a matrix liquid crystal display, and is a diagram illustrating dynamic characteristics per pixel. 1 is a liquid crystal cell, 2 is a memory capacitor, 3 is an FET, 4
5 is an X electrode, 5 is a Y electrode, 6 is a scanning circuit, 7 is a serial/parallel conversion circuit, 8 is a common electrode, 9 is a common electrode, and 10 is a common line driver (common electrode driving means). Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] (1)アクティブマトリクス液晶ディスプレイの駆動装
置において、 各行ごとにセグメント化して設けた共通電極と、該各共
通電極に、そのラインに対応する画素電極電位のその保
持期間内の変動による輝度変化をキャンセルし得る交流
振幅変調パルスをコモン電位に重畳して供給する共通電
極駆動手段とを備えたことを特徴とするアクティブマト
リクス液晶ディスプレイ駆動装置。
(1) In a driving device for an active matrix liquid crystal display, a common electrode is provided segmented for each row, and each common electrode cancels brightness changes due to fluctuations in the pixel electrode potential corresponding to that line within its holding period. 1. An active matrix liquid crystal display driving device comprising: common electrode driving means for supplying an AC amplitude modulated pulse that can be applied in a manner superimposed on a common potential.
JP15860588A 1988-06-27 1988-06-27 Active matrix liquid crystal display driver Pending JPH027780A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15860588A JPH027780A (en) 1988-06-27 1988-06-27 Active matrix liquid crystal display driver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15860588A JPH027780A (en) 1988-06-27 1988-06-27 Active matrix liquid crystal display driver

Publications (1)

Publication Number Publication Date
JPH027780A true JPH027780A (en) 1990-01-11

Family

ID=15675353

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15860588A Pending JPH027780A (en) 1988-06-27 1988-06-27 Active matrix liquid crystal display driver

Country Status (1)

Country Link
JP (1) JPH027780A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12213766B2 (en) 2015-02-11 2025-02-04 Tc1 Llc Heart beat identification and pump speed synchronization

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12213766B2 (en) 2015-02-11 2025-02-04 Tc1 Llc Heart beat identification and pump speed synchronization

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