JPH028228U - - Google Patents

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Publication number
JPH028228U
JPH028228U JP8707088U JP8707088U JPH028228U JP H028228 U JPH028228 U JP H028228U JP 8707088 U JP8707088 U JP 8707088U JP 8707088 U JP8707088 U JP 8707088U JP H028228 U JPH028228 U JP H028228U
Authority
JP
Japan
Prior art keywords
buffering
logic
ics
signal
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8707088U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8707088U priority Critical patent/JPH028228U/ja
Publication of JPH028228U publication Critical patent/JPH028228U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、この考案の一実施例を示す論理信号
切換回路の回路図、第2図は、この考案の他の実
施例を示す論理信号切換回路の回路図、第3図は
、従来の論理信号切換回路の例を示す回路図であ
る。 N1・N2……N2n:バツフアリングIC、
R3・R4:プルアツプ抵抗、d1・d2……d
2n:ダイオード、N3:NOT素子、G1:O
R回路。
Fig. 1 is a circuit diagram of a logic signal switching circuit showing one embodiment of this invention, Fig. 2 is a circuit diagram of a logic signal switching circuit showing another embodiment of this invention, and Fig. 3 is a circuit diagram of a conventional logic signal switching circuit. FIG. 2 is a circuit diagram showing an example of a logic signal switching circuit. N1・N2 ... N2n : Buffling IC,
R3・R4 : Pull-up resistance, d1・d2 ...d
2n : diode, N 3 : NOT element, G 1 : O
R circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 各々が第1の論理状態と第2の論理状態で2値
的に変化する入力信号を個別に入力に受ける少な
くとも2個のオープンコレクタ形のバツフアリン
グICと、これらバツフアリングICの出力をプ
ルアツプする抵抗と、前記バツフアリングICの
出力端にそれぞれ接続されるダイオードと、これ
らダイオードの一方と他方に互いに論理状態の相
違する切換指令信号を入力する切換指令信号入力
回路と、前記バツフアリングICの出力端が入力
端に接続される論理和回路とからなる論理信号切
換回路。
at least two open collector type buffering ICs, each of which receives an input signal that changes binary between a first logic state and a second logic state; and a resistor that pulls up the outputs of these buffering ICs. , a switching command signal input circuit that inputs switching command signals having different logic states to one and the other of these diodes, and the output end of the buffering IC is an input terminal. A logic signal switching circuit consisting of an OR circuit connected to
JP8707088U 1988-06-30 1988-06-30 Pending JPH028228U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8707088U JPH028228U (en) 1988-06-30 1988-06-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8707088U JPH028228U (en) 1988-06-30 1988-06-30

Publications (1)

Publication Number Publication Date
JPH028228U true JPH028228U (en) 1990-01-19

Family

ID=31311704

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8707088U Pending JPH028228U (en) 1988-06-30 1988-06-30

Country Status (1)

Country Link
JP (1) JPH028228U (en)

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