JPH028458Y2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a fader circuit for video signals from a video camera used in ordinary homes, and the video signal from the video camera is recorded on a magnetic tape by a magnetic recording and reproducing device (hereinafter referred to as VTR) through this circuit. When recorded, it is possible to perform visually pleasing splicing without the need for tape editing. In general, the switching between scenes recorded using a video camera is a so-called cut switching, and the recorded scenes change instantly, so when playing back images, the breaks (seams) between each scene are not visually noticeable. This is undesirable and also has the disadvantage that noise is generated due to synchronization disturbance during switching, which is easily noticeable. For this reason, when a higher quality video recording is desired, it is best to perform tape editing, but this editing requires an expensive editing machine or special effects device.

In view of this, the present invention enables attractive continuous shooting by switching using the fader function.

Hereinafter, an embodiment of a video signal fader circuit according to the present invention will be described with reference to the drawings.

In FIG. 1, a video camera 1 has a start/stop switch 2, and a video signal transmission line 3.
a, a low frequency signal 3b and a VTR start/stop control signal (pulse) transmission line 3c.
Connected to VTR4. A video signal amplifier 6 and a low frequency signal (hereinafter referred to as audio signal) amplifier 7 shown in FIG.
, the synchronization signals (vertical and horizontal) from the input terminal 20 and the color burst signal in the case of a color camera are added, and the output of this addition is sent to the output terminal 17.
This is supplied to the VTR through cable 3a.
The output of the audio signal amplifier 7 is supplied to the input terminal 4a of the video signal of VTR 4 through the output terminal 18 and the cable 3b.
Furthermore, the output of the start/stop switch 2 of the video camera 1 is supplied through the cable 3c.
It is designed to be supplied to the start/stop control pulse input terminal 4c of the VTR 4.

In the present invention, a gain control circuit 8 is provided in the video signal transmission path, and a gain control circuit 9 is also provided in the audio signal transmission path as necessary, and these circuits 8 and 9 are connected to the fader signal generation circuit 11. It is designed to be controlled by the output of .

In the illustrated example, this fader signal generating circuit 11 is triggered by a fade start signal _S1 obtained based on the operation of the start/stop switch 2, that is, whether it is turned on or off, and generates a control signal _S2 .
A control signal generation circuit 12 including, for example, a flip-flop circuit and a gate circuit (both not shown), and a resistor 1 to which this control signal _S2 is supplied.
3 and a capacitor 14 (integrator circuit in the drawing) 15, and a DC amplifier circuit 16 that amplifies the output from this time constant circuit as necessary.
This is the case where the fader signal S ₃ from this amplifier circuit 16 (the level gradually decreases as described later)
A gradually increasing DC voltage) is supplied to the gain control terminals of the gain control circuits 8 and 9, respectively. A changeover switch 5 is provided on the input side of the control signal generation circuit 12 (this is installed so that it can be changed manually from outside the case of the video camera 1). In the switched state, the fade start signal _S1 is generated by the operation of the start/stop switch 2 to the control signal generation circuit 1.
I am trying to supply it to 2.

Further, the terminal 20 is supplied with a vertical synchronizing signal S ₀ (FIG. 3A) and a burst signal in the case of a color camera, of which the vertical synchronizing signal S ₀ and the signal S ₃ from the amplifier circuit 16 (FIG. ) to the control signal generation circuit 12
We are trying to supply it to

The operation of this configuration will be explained. The video signal obtained from the video signal amplification circuit 6 is obtained through the gain control circuit 8 and the adder circuit 10 to a terminal 17, and the audio signal obtained from the audio signal amplification circuit 7 is also obtained through the gain control circuit 9 to a terminal 18. One terminal 2
0 is applied to an adder circuit 10 and also to a control signal generation circuit 12. It is assumed that the gain control circuits 8 and 9 each have a small gain or 0 when the voltage of the signal _S3 is high, and a large gain when the voltage is low. It is also assumed that the VTR 4 repeatedly starts and stops each time the pulse _S4 is applied to the terminal 4c. It is assumed that the switch 5 is now in the position shown by the solid line, the VTR 4 is in a stopped state (tape transport is stopped), the video camera 1 is in an operating state, and the signal _S3 from the amplifier 16 is at a high level, so that the gain control is performed. It is assumed that circuits 8 and 9 each have a gain of 0. When the switch 2 of the video camera 1 is operated once (time t ₁ ) in this state, a signal S ₁ is obtained as shown in FIG. 3B, and this causes the control signal generation circuit 1
At the output side of 2, a signal S ₂ shown in FIG. 3C is obtained. In this case, the control signal generation circuit 12 generates the first vertical synchronization signal S ₀ after the signal S ₁ becomes low level.
Assume that it is triggered even at time t ₂ and becomes low level, for example, grounded. As a result, the integration circuit 1
The charge stored in the capacitor 14 of 5 is discharged through the resistor 13, so that the level of the signal _S3 obtained at the output side of the amplifier 16 gradually decreases as shown in FIG. 3D.

Furthermore, a pulse _S4 shown in FIG.
Since the signal is supplied to the terminal 4c of the VTR 4, the VTR 4 starts up and enters the recording state. This pulse S ₄ is the signal S ₃
is in a high level state and is obtained in synchronization with the first vertical synchronizing signal S ₀ after the signal S ₁ becomes a low level.

As described above, as the VTR 4 enters the recording state, the gains of the gain control circuits 8 and 9 gradually increase due to the signal _S3 , and a video signal whose level gradually increases is obtained at the terminal 17. At the same time, terminal 18
You can also obtain an audio signal whose level gradually increases. That is, it becomes a fade-in mode.

In this way, at time _t3 , when time r has elapsed from time _t2 , a complete recording state is reached, and from this point on, the signal from the amplifier 16 continues to be at a low level as shown in FIG. 3D, and the video signal amplifier 8 Then, recording continues with the gain of the audio signal amplifier 9 kept high.

In such a recording state, when the start/stop switch 2 is operated once (time t ₄ ),
As a result _, the signal S ₁ shown in FIG. 4B is obtained, and as in the fade-in mode described above, the time point (time _{t 5} ) is the output signal of the control signal generation circuit 12.
S ₂ becomes high level, and based on this, amplifier 1
6's output signal _S3 gradually rises as shown in FIG. 4D, and reaches the highest potential at time _t6 after time r, and the gains of gain control circuits 8 and 9 become zero. Furthermore, the first vertical synchronization signal S ₀ after the output signal S ₃ reaches the maximum
At time _t7 synchronized with the control signal generation circuit 12
As a result, the pulse S ₄ shown in Fig. 4E is obtained, which is
Since the signal is supplied to the terminal 4c of the VTR 4, the VTR 4 enters the stop state. That is, by once operating the start/stop switch 2 during recording, both the video and the audio enter the fade-out mode, and after the fade-out, a stop signal is sent to the VTR 4 to stop it.

Note that the time r shown in FIGS. 3 and 4 can be appropriately selected, for example, from 3 seconds to 5 seconds. Also, in each of Figures E of Figures 3 and 4, in the fade-in Figure 3, the start signal _S4 is obtained almost simultaneously with the operation of the start-stop switch 2, and in the fade-out Figure 4, the start signal S4 is obtained almost simultaneously with the operation of the start-stop switch 2. In this case, the stop signal _S4 is obtained with a delay of approximately r. However, in any case, if the stop signal _S4 is obtained when the signal _S3 is at a high level, good.

In the block diagram shown in FIG. 2, a changeover switch 5 is provided on the input side of the control signal generation circuit 12, and by switching this to the position shown by the dotted line, a conventional VTR 4 unrelated to the present invention can be switched.
This makes it possible to start and stop.

In addition, in the block diagram shown in FIG.
It can be located on either side of the VTR4.

FIG. 5 shows a so-called double-balanced differential amplifier that can be used in the gain control circuit 8.
Reference numerals 22 and 27 are differential amplifiers, respectively, which are configured with transistors 22a and 22b and 27a and 27b, respectively.
The emitters of transistors 27a and 27b are connected together and grounded through the collector emitter of transistor 30, and the collectors of transistors 22a and 27a are connected together. The collectors of transistors 22b and 27b are connected to each other and connected to the power supply terminal 24 through a resistor 29, and the bases of transistors 22b and 27a are connected to each other to connect the power supply terminal 24 and ground. It is connected to a connection point between resistors 32 and 33 connected in series between the two resistors. Note that the transistors 22a and 27
The bases of the transistors 22b and 27b are connected to each other and connected to the input terminal 21, the base of the transistor 25 is connected to the input terminal 26, the base of the transistor 30 is connected to the input terminal 31, and the collectors of the transistors 22b and 27b are connected to the output terminal 35. ing. 34 is a capacitor.

In this circuit, the output from the video signal amplifier 6 is supplied to the input terminal 31, the output signal _S3 from the DC amplifier 16 is supplied to the input terminal 21, and the input terminal 26 is supplied with a DC signal corresponding to the pedestal level of the video signal. By supplying a voltage, the above-described fade-in and fade-out operations (black after fade-out) can be performed. Further, a waveform signal is supplied to this input terminal 26, which has a level below the above-mentioned pedestal level V ₀ during the vertical and horizontal planking periods as shown in FIG. 6A, and has a level V ₁ during other periods. If you want the brightness to fade out to this level
Depending on the selection of V ₁ , it can be changed arbitrarily from black to white. Furthermore, as shown in FIG. 6B, when a color matte signal having a planking period similar to that of FIG. 6A and a level V ₂ is supplied to this input terminal 26, the phase of the color signal must be selected. Therefore, the color after fade-out can be arbitrarily selected, and the effect after fade-out can be further enhanced.

In addition to the above-mentioned fade-in and fade-out signal _S3 , a punching signal, so-called key signal, shown in FIG. It is also possible to insert characters (for example, a title) regardless of the content.

According to the present invention described above, when used in a portable video camera device in particular, when making a tape on a VTR, the spliced portions of each scene can be recorded using fade-in and fade-out functions that operate in synchronization with a vertical synchronization signal. Since the function is formed field by field, synchronization is not disturbed during playback, and the screen is more attractive than conventional cut switching.

[Brief explanation of drawings]

Fig. 1 is a system diagram showing one embodiment of a video signal fader circuit according to the present invention, Fig. 2 is a block diagram of a part thereof, Figs. 3 and 4 are waveform diagrams for explaining the same, and Fig. 5 6 is a connection diagram showing an embodiment of a gain control circuit that can be used in a video signal fader circuit according to the present invention, and FIG. 6 is an input waveform diagram thereof. 1 is a video camera, 4 is a VTR, 2 is a start/stop switch, 8 is a video signal gain control circuit,
9 is an audio signal gain control circuit, and 11 is a fader signal generation circuit.

Claims (1)

[Claims for Utility Model Registration] A gain control circuit provided in a transmission path for a video signal obtained from a video camera having a start/stop switch; an adder circuit for inserting a vertical synchronization signal into the video signal; and the start/stop switch. a fader signal generation circuit that generates a fader signal whose level changes based on a fade start signal generated in response to the operation of a stop switch and the vertical synchronization signal; a selection means for selecting a phase, the gain of the gain control circuit is varied within a predetermined range by the fader signal, the video signal is faded in synchronization with the vertical synchronization signal, and the luminance after fading out is completed. A video signal fader circuit that allows you to select the signal level or color signal phase.