JPH0284845A - Atm switching system realizing distributive connection - Google Patents

Abstract

PURPOSE:To simplify a routing processing and to realize distributive connection in which the acticity efficiency of both input highway and an output highway can be improved by providing first-order and second-order switch modules, and making both highways into groups. CONSTITUTION:A routing header representing the arbitrary number of second- order switch modules (N modules which house (n) output highways) of a distribution destination is attached on each cell at the front stage of M first-order switch modules which house (m) input highways. Next, the cells are stored simultaneously in the buffers of the distributed number of second-order switch modules by controlling a spatial switch(6ij) of 1XN by the header. Also, at each second-order switch module, the buffers less than (n) out of nM buffers or the cells less than (n) in total are taken out, and numbers 1-n are attached on them as internal headers. The distributive connection can efficiently be performed by routing the cell to the output highway of a prescribed second-order switch module autonomously by controlling a spatial switch(46p) of nMXn by the header.

Description

[Detailed description of the invention] [Table of contents] Overview Industrial field of application Prior art (Fig. 5, Fig. 6, Fig. 7, Fig. 8, Fig. 9) Problems to be solved by the invention Means for solving the problem (Fig. 1) Working examples (Fig. 2, Fig. 3, Fig. 4) Effects of the invention [Summary] Regarding an ATM switching system capable of distribution connection, it also realizes distribution of ATM cells. For the purpose of 2
It has a secondary switch module and a single link that connects the output terminal of the space switch of the primary switch module and the buffer of the secondary switch module one-to-one. Attachment of a routing header indicating the secondary switch module to which the cell is to be distributed, simultaneous accumulation in the secondary switch module buffer of the number of distributions via the 1×N spatial switch of that cell, Taking out a total of n or less cells by scanning the buffer every cell sending cycle, and adding an internal header to each cell by cycling through numbers 1-n;
It was configured to control mm×n spatial switches using an internal header.

[Industrial application field]

The present invention relates to an ATM switching system that allows distribution connections.

BACKGROUND ART Conventional telephone-based communication networks are transitioning to 15DN (Integrated Service Digital Network), which can provide various communication services to users through the same access method. In particular, A that can centrally handle audio, data, images, etc.
T M (Asynchronous Transfer
Wideband 15DN based on 3.0 (Mode) technology has come to be seen as promising. Under the ATM system, V C
I (Virtual Channel Identity
Cells with a fixed information length attached with headers such as Unlike switching systems, there is no need to exclusively use one line, and various communication media including burst data can be processed centrally.

And even under such broadband l5DN, C
ATMs, video conferences, etc. are also included in the unified handling, but in such communication media, it is also required to be able to efficiently perform distribution connections such as 1-to-N. ing.

[Conventional technology]

Early schemes for such distribution exchanges sent packets on an input link onto a desired number of output links by
Software processing is performed for each packet, storing the packet in a storage device, and storing the read packet in each buffer connected to the output link to be distributed and reading it out. Since the cumulative number of processing steps for each packet is large and the switching speed is slow, hardware-based distribution-controlled self-routing switching systems have been developed and are being put into practical use.

An example of this is shown in FIG. Packet data (hereinafter simply referred to as cells) that comes in from the input links #l to #n is assigned an input logical channel number (ILCN).
It consists of information. This cell is the call processing control unit 10
Header processing units 1001 to 1007 controlled by 1
and a routing header indicating the output link number (
RH) and its output link's unique output logical channel number (
OLCN) is added. self-routing switch 1
10 receives these cells and determines the RH that the cell has.
Select output links based on . And 4
Each cell is output from a 1-4 m output link. Note that n and m may be the same or different.

In this system, when making an l-to-N distribution connection, the header processing unit performs an additional processing sequence for the routing header (RH) and output logical channel number (OLCN) as many times as the number of distributions, as shown in Figure 6. Repeatedly, cells consisting of the self-routing control information followed by input cells are input to the self-routing switch 110.

In this self-routing exchange system, the header processing unit generates routing headers (RH) according to the number of distributions.
It is necessary to repeat the sequence of adding the output logical channel number (OL_CN) and the output logical channel number (OL_CN), which increases overhead. Furthermore, since the length of the header section changes depending on the number of distributions, self-routing becomes complicated or difficult.

As a technique for avoiding such problems, there is also a self-routing exchange system as shown in FIG.

In this scheme, cells coming in via the input link are sent to a buffer 200. 〜200. , to the header processing units 21O9 to 2107.

The information that has entered the header processing units 2101 to 2107 is returned to the buffer input as many times as necessary in the case of a distributed connection with multiple destinations. For example, as shown in FIG.
, C2 has entered, and cell C
#1 of the link that outputs the information 1 of #1. #2. Let's say you want to put it in #3.

First, the header processing unit 210I passes through the buffer 200I.
The cell C1 (ILCN is designated as a) that enters the cell C1 has a routing header RH (here #l
“1” indicating “1”) and the logical channel number (OLCN
) a 1 is added (■ in Figure 8). This input cell C1
is again fed back to the input of buffer 200+. During this time, the input cell C2 (ILCN is designated as b) passes through the buffer 200, enters the header processing unit 2101, and enters the LC
N conversion is performed, and the routing header RH (here "2'' indicating #2) and the logical channel number (O
LCN) bl is attached (■ in Figure 8).

Next, buffer 200. Cell C1, which was kept waiting at
Header processing unit 210 again. Then, LCN conversion processing is performed. That is, the routing header RH (“2°° indicating #2”) and the logical channel number (OLqN) therein.
b2 is attached to the same information l (■ in FIG. 8). After repeating this operation the required number of times (one more time in the example in the figure), the self-routing switch 220 is switched using the routing header RH, resulting in a 1-to-N
distribution connections can be made. In the example shown, information 1
can be distributed to three output links #1 to #3.

In the latter method, the disadvantages of the former method are eliminated, but the delay increases because the operation of performing LCN conversion on cells according to the input to the buffer must be repeated as many times as the number of distributions.

Distributed control type self-routing switching systems have already been proposed that eliminate these technical problems and can efficiently perform distributed connections. This method is as shown in FIG. 9. When a call processing request signal is input to the call processing control unit 330, the logical channel number (LCN) on the input link and output link to be given to the call is determined. , notify the previous or subsequent station or terminal. From now on, cell routing for this call is based on these input/output logical channel numbers (rLcN,
0LCN). For example, cell C1 entering from input link #1 has an information section and an input logical channel number (
ILCN). Routing header processing unit 300. is an input link number (I L CN) that indicates which input link the information came from.
and the output link flag (OLF) corresponding to the output optical link.
). Cell C1 with ILCN and OLF added
a enters the subsequent self-routing switch 310, and the self-routing switch 310 outputs an output flag (OLF).
The cell C1a is stored in the buffer BU of the output link corresponding to the set bit and read out.

The output logical channel number processing unit 3201 assigns a logical channel number (OLCN) on the output link corresponding to ILCN and ILN, and sets the output link (#1 here).
Send to. As a result, the output logical channel number processing unit 3
From 201, it becomes a cell C1b containing only the output logical channel number (OLCN) and information, and exits to the output link #l. In this system, both the input cell C1 and the output cell C1b consist only of information and LCN.

[Problem to be solved by the invention]

In this distributed controlled self-routing exchange system,
Since the routing basically involves outputting from one input link to one output link, routing processing must be performed for the number of corresponding links. For example, both the input link and the output link are 100
If there were 0, each cell would have to be routed to one of 1000 outputs. Therefore,
As the number of input links and output links increases, the routing process becomes extremely troublesome.

This relationship is carried over even when distributed control is performed.

The present invention was created in view of the above problems, and an object of the present invention is to provide an ATM switching system capable of distribution connection, which can perform distribution while simplifying routing.

[Means for Solving the Problems] FIG. 1 shows a diagram explaining the principle of the present invention. As shown in this figure, there are M primary switch modules accommodating m highways and N secondary switch modules accommodating n output highways.
from each input highway to A
In an ATM switch that exchanges each cell that arrives after being TM multiplexed, the number of input terminals is 1.1, which has N cross points for each of m input highways. 1×N space switch 6ij with the number of output terminals N (t = 1.2. ..., M, j =
1°2, .
(i = 1.2 for each k. ...1M1j = 1, 2
,..., m), the number of input terminals mm, and the number of output terminals n, mm×n
A space switch 46k (k=1°2,...,N) is provided, and the output terminal of the space switch 6ij of the primary switch module and the buffer of the secondary switch module are connected to 10+
Single link 8tjt for jml to 1 (t=1, 2,...
, N corresponding to the distribution destination secondary switch module), and at the stage before the primary switch module, each cell is given a routing header indicating an arbitrary number of distribution destination secondary switch modules, and this The header controls the 1×N space switch (Bit>) to simultaneously accumulate cells in the buffers of the secondary switch modules as many as the number of cells to be distributed, while each
Next, the switch module scans mm buffers and extracts a total of n or less cells one by one from the n or less buffers that have accumulated cells every cell sending cycle.
Numbers 1-n are assigned to these cells as internal headers while circulating, and this header controls an mm×n spatial switch to autonomously route the cells to the output highway of a predetermined secondary switch module. An ATM switching system that allows distribution connections.

[For production]

Cells input from the input highway 2ij=X are appended with the input highway number and routing header. For example, as shown in FIG. 1, when the output highway groups to be distributed are p and q, the added routing header is the output highway group in the routing header, that is, the corresponding bit of the corresponding secondary switch. is 1”°.

By controlling the spatial switch 6iJ by the routing header, the links (cell transfer paths) from the input highway group to the output highway groups p and q are distributed to 8tjp + 8sJq.

Cells on these links B ijgl + 8ijQ are stored with their arrival time series saved, similar to cells on cell transfer routes that transfer cells from other spatial switches to the output highway group to which these links belong.

For each output highway group, among the accumulated cells, the cells to be read within the same cell transmission cycle are
At each cell transmission cycle, the number of output highways belonging to the same output highway group is read out, and an internal header indicating the output highway is added to each cell before being transmitted.

Then, for each output highway group, under the control of the internal header of the transmitted cell, a size determined by the product of the number of input highways in the input highway group and the number of input highway groups, ie, mm, and the number n of output highway groups is determined. Self-routing space switch 14p, 1
44, etc., to output the cell to the output highway designated by the internal header of the self-routing spatial switch. The virtual channel number of the cell A output to the output corresponding to the output highway is converted into an output virtual channel number C corresponding to the input virtual number a of the input cell A and the input highway number X, and is specified in the internal header. is sent to the output highway. Cell B is also similar.

[Example] FIG. 2 shows an example of the present invention. In this figure, 2
ij (!=1.2...., MS j=1゜2,・
.', m) are each of m ATM input input ways of the same person route (corresponding to the input highway group in FIG. 1). 4 ij is ATM entrance Kabaka Highway 2j
This is a routing header adding section provided in each of the.

This routing header adding unit 4 ij outputs a routing header consisting of N bits, and adds "'l°" to the bits corresponding to the outgoing route to be distributed, and °'0°' to the bits corresponding to the other outgoing routes. give. A primary switch module 61 is composed of m distribution self-routing spatial switches 6ij. The detailed configuration is shown in FIG. 3, and the configuration shown in FIG. The following are representative examples. This space switch 61. is a D-FF circuit consisting of N D-FF circuits 2L (k=t, 2. . . , N) connected to the output of the routing header adding section 4ij.
FFFF path 2L, one input is the output of the routing header adding section 4 ij, and the other input is the corresponding D-FF circuit 2
06 and an AND circuit 22m connected to 06.

Of the distributed outputs of each primary switch module 65, distributed cells output to the cell transfer path (link) 81j belonging to the same output route k (corresponding to the output highway group in FIG. 1) are assigned to the same output route. connected to a corresponding human power buffer 10pm in the secondary switch module 10 for the This secondary switch module 12 is disclosed in the specification and drawings attached to the patent filed by the applicant on September 19, 1988, and the outline thereof is shown in FIG. 4. Explained below.

40 is a buffer read control circuit that controls the secondary switch module 12.40 every cell read cycle. Large power buffer located in 10. ．． ll, 10. □5. ...10M+m
i 10zII+, 10zzk, °°+,
l0M5;...: 10H1, 10Hz11+
..., 10M5k is scanned in a predetermined order [for example, each manual buffer is sequentially scanned, or the input buffer is divided into multiple groups, each group is scanned, and the input buffers within the group are read. At this time, the manual buffer/sending right is moved to the next input buffer in the group, and the scan order of each group is scanned in a predetermined scan order such as a cycle] to read n or less cells, Indicating the output highway in response to each cell readout;
Generate and output an internal header consisting of numbers 1 to n. 42
□5.42゜a...+42++m; 40
z+m + 4 Lz* +..., 42sz*r
;...;42 old k + 42H2k +...
, 42M□ is a buffer for cutting and absorbing, which stores a read cell and an internal header for the cell. "44.
is a space switch control circuit, and m
MXN self-routing large space switch 4611
Output 1 specified in each internal header by controlling the point
A cell corresponding to the internal header is output to 4m1 (l=1.2. . . . +, n) (compatible with ATM output highway).

Each output 14kJL to each secondary switch module 12
The VCI conversion circuit 16□ connected to the circuit converts the header of the cell that is concentrated and input there into an output VCI suitable for the ATM output highway (corresponding to the output transmission line shown in Figure 1). is ATM output highway 18b
Connected to z. This VCI conversion is used in the distributed controlled self-routing exchange system described in the ``Prior Art'' section above.

An example of the operation of the above-mentioned configuration example will be explained below in conjunction with the explanation of the operation principle diagram of the present invention explained in the [Operation] section. The input transmission line X in Figure 1 is connected to the ATM in Figure 2.
Input input highway 2□ATM input transmission line y@ATM input highway 281, ATM input input highway 2
Assuming that 11 A is distributed to the output routes p and q, and the ATM input high 42 Ml upper route B is distributed to the output routes p and r, the routing header adding section 4 II is assigned the output power and the ATM input highway. A routing header with input HW number 1 and N bits is added to the 2□ file, and the bits corresponding to the output routes p and q in the routing header are set to "1", respectively (see Figure 1). . The same applies to Kabaka Highway 2° where there is an ATM.

Routing header adding units 411 and 414. Then, the cells A and B to which the input highway (HM) number and routing header as described above have been added are input to the primary switch modules 61 and 6.4, and the D-FF circuit array 24 in each primary switch module is inputted to the primary switch modules 61 and 6.4.゜The routing headers are shifted in and the D-FF circuit arrays 24. ．． 24
．． is maintained.

D-FF circuit array 24. ．． Cell distribution occurs in each primary switch module 63, 6M as indicated by the contents of the routing header held in 24H. That is,
Cell A to which input HW number l is added is cell transfer path 8++
Secondary switch module 12. via p+8□9. ．． 1
2. Input buffer 101. ．． , 10□9. Cell B also has a secondary switch module 12. ．．
It is written to input buffers 10□2, 10□ within 12 degrees.

Its secondary switch module 12. ．． 12. .

The self-routing process in step 12 is performed in accordance with what is disclosed in the patent specification and drawings referenced above. It can be summarized as follows.

Secondary switch module 12. In the buffer read control circuit 40. 10゜p, 10119+...10+ of the human power buffers belonging to each under the control of
--;10□9,1O02,...,1Ot-;...
110M+-, 10□9. . . . Scanning of 10 Maps is performed sequentially for each cell read cycle or in group order, and sequentially within a group until the number of cells read from these manual buffers reaches n, or scanning starts. When the number of input buffers reaches mm as counted from the input buffer, the scan in the cell read cycle ends. For each read of a cell from the input buffer as described above, in response, from the buffer read circuit 40,
The internal header for the cell read into the corresponding delay absorbing buffer is sent to the delay absorbing buffer and appended to that cell.

Then, at the end of the scan, reading of all delay absorbing buffers occurs at once, and the internal headers of the read cells are used by the space switch control circuit 44, from which output 14. is specified by the internal header. , a switching signal is generated to send out Hesel, and the switching signal causes the mm×n self-routing spatial switch 46 to be activated.
．． The cell read out from the slow slope absorption buffer by switching is output to the output 148L designated by the internal header.

In such a self-routing convergence, if it is assumed that the scans to the input buffers LL+-, 10ttQ described above occur at exactly the same interval as the generation of internal headers, then the same output highway 189 as shown in FIG. ．．
Cells A and B are sent upward. Cell A in that case
, B are converted into the output VCI on the output highway corresponding to the input VCI and input HW number in the same manner as shown in FIG.

〔Effect of the invention〕

As described above, according to the present invention, by grouping input highways and output highways, it is possible to facilitate the routing process and realize distribution connections while improving the usage efficiency of both highways.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the principle configuration of the present invention. FIG. 2 is a diagram showing an embodiment of the present invention. FIG. Figure 4 is a configuration diagram of a secondary switch module, Figure 5 is a conceptual diagram showing a first example of a self-routing exchange system, Figure 6 is an explanatory diagram of a method for realizing distribution connections in the header processing section prefix method, and Figure 7 FIG. 8 is a conceptual diagram showing a second example of a self-routing exchange system, FIG. 8 is an explanatory diagram of the operation of the system shown in FIG. 2, and FIG. 9 is a conceptual diagram showing a third example of a self-routing exchange system. . In Figures 1 and 2, 2nd line j is an input transmission path, 43 is a routing header adding section, FB4.46m is a self-routing type space switch, 8
Mjk is a cell transfer path, and 18 and y are output transmission paths. Figure 1; 4, → → ＼ts + x Nb 3 Tsuji 1 River Engineering 5 Le C Ro... Ha R64 Jun Liu scolding L6 Ru exposure" R between Figure 8771M,, Box bow] Possible ■
Rotation η Medical mouth ■ Figure 8

Claims (1)

[Claims] (1) M primary switch modules accommodating m input highways and N accommodating n output highways;
An ATM that has two secondary switch modules and switches each cell that arrives ATM multiplexed from each input highway.
In the exchange, there is a 1×N space switch (6_i
＿j) (i=1, 2,..., M, j=1, 2,...
.
10_i_j_k) (for each k, i=1, 2,..., M,
j = 1, 2, ..., m), the number of input terminals mm, the number of output terminals n
mm×n space switch (46k) (k=1, 2,...
・, N), and a single link (
8_i_j_t) (t = 1, 2, ..., each corresponding to a distribution destination secondary switch module of N), and in the stage before the primary switch module, an arbitrary number of distribution destination secondary Add a routing header indicating the switch module, and use this header to connect the 1×N space switch (6_i
j) to simultaneously accumulate cells in the buffers of secondary switch modules corresponding to the number of distributed cells, while each secondary switch module scans mm buffers and accumulates cells in each cell sending period. Take out a total of n or less cells one by one from the n or less buffers that are in the buffer, and add numbers 1 to n to these cells as an internal header while cycling through them. With this header, control the mm x n space switch. ,
A distributed connectable ATM switching system characterized by autonomously routing cells to the output highway of a given secondary switch module.