JPH028501B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Description of the technical field to which the invention pertains] The present invention relates to a data interpolation method for correcting image distortion or image non-uniformity in a television camera.

[Description of prior art]

Conventionally, this type of data interpolation involves inputting digital data 2 from a digital memory 1 to two D/A converters 5 and 6, as shown in FIG. By inputting the interpolation signal 7 that determines the characteristics of interpolation such as a staircase wave from the interpolation signal generation circuit 8 to the other D/A converter 6, the output interpolation of the other D/A converter 6 is We obtain a signal that increases according to the characteristics of . At this time, by changing the address of the digital memory 1 based on the address signal 4 of the address decoder 3, the current output data T _o and T _o+1 are read out continuously, and the demultiplexer 9 controlled by the address control signal 10 divides these signals and sends them to the sample and hold amplifier 11.
and use these data to calculate the subtraction amplifier 1
2. The addition amplifier 13 performs subtraction and addition operations, respectively, to obtain an interpolated waveform output 14 that interpolates between the two data.

FIG. 2 shows waveforms of various parts corresponding to the block diagram of FIG. 1. Figure 2 a shows the output t _o obtained by sampling and holding the output of the D/A converter 5, b,
c indicates outputs α×t _o /β and α×t _o+1 /β obtained by demultiplexing and sample-holding the output of the D/A converter 6. Here, α indicates the number of stages of each data, and β indicates the total number of interpolation stages between data. Further, d indicates the output obtained by subtracting the output of c from the output of b, and e indicates the output obtained by subtracting the output of d from the output of a. However, with this method, due to differences in the linearity of the circuit system, stability of DC offset, etc., the final synthesized waveform may have steps at data change points, and may not completely match the curve of the corrected waveform. This applies not only to linear interpolation but also to non-linear interpolation.

[Description of the purpose of the invention]

The present invention provides a method of interpolating between two pieces of data by using a directly connected resistor circuit and outputting a signal through the circuit, thereby performing interpolation that perfectly matches the curve of the correction waveform.

[Structure of the invention]

In order to achieve the above object, the data interpolation method according to the present invention includes a digital memory that continuously stores output data T _o and T _o+1 as digital data, and a digital memory that stores output data T o and T _{o +1} as continuous digital data. _o+1
and an address decoder that sequentially reads out the output data T o and T o+1 read from the digital memory, and a D/D converter that converts the output data T _o and T _{o +1 read} from the digital memory into analog data.
A converter; a demultiplexer that separates the output data from the D/A converter into output data T _o and T _o+1 , respectively; and output data T _o and T _o+ that are respectively separated by the demultiplexer. ₁ and a resistor circuit configured by connecting resistors in series for the number of interpolation stages and connected between the two sample and hold circuits, The two data held in the sample hold circuit are input to both ends of the resistor circuit, and the signals at the connection points of each resistor are sequentially selected and output by switch operation, thereby interpolating between the two data. .

[Explanation of Examples]

Next, embodiments of the present invention will be described in detail with reference to the drawings. In FIG. 3, the same components as those in FIG. 1 will be described with the same reference numerals. FIG. 3 shows an example in which the present invention is applied to a system that performs linear interpolation. In FIG.
Digital data as shown in FIG. b is stored and read out as digital data 2 by an address signal 4 from an address decoder 3 which is switched alternately at times t and t+1. This digital data 2 is converted by the D/A converter 5 into analog data as shown in FIG. It is held at 17. FIG. 4b shows data at time t, and c shows data at time t+1. These two data are applied to both ends of the resistance circuit 16. The resistor circuit 16 has n resistors of the same resistance value connected in series.
(for the number of interpolation stages), and n switches S ₁ are connected to n connection points of each resistor.
~In addition to installing S _o , switch from switch S ₁
A switch control circuit SC is provided that turns on and off in the order of S _o . A switch circuit 18 consisting of switches _S1 to _S0 is turned on in the order of switches _S1 to _S0 as shown in FIG. snow,
By sequentially and selectively outputting signals at each connection point, interpolation is performed between two data according to an interpolation curve, and an interpolated waveform output 14 as shown in FIG. 4d is obtained from the switch circuit 18. The last switch S _o
After turning on, the contents of the sample hold amplifier 15 and sample hold amplifier 17 are _to , respectively.
At the same time as the contents of t _o+1 are switched to the contents of t _o+1 and t _o+2 , the first switch _S1 is turned ON, and data is switched again in the same order as before to perform interpolation.

FIG. 5 is a waveform diagram of an embodiment in which the order of operation of the switches in the switch circuit 18 of FIG. 3 is changed. In the second embodiment, as shown in FIG. 5e, the switch _S1 of the switch circuit 18 is turned on, and after the last switch _S0 is turned on, only the data of the sample and hold amplifier 15 is transferred from t0 to _{t0 +.} Convert to ₂ ,
Next, interpolation from t _o+1 to t t ₊₂ data is performed by turning the switch S _o to the switch S ₁ side, and an interpolated waveform output 14 as shown in FIG. 5f is obtained. In this case, the control of the counter 21 is up/
This is done by the down control terminal 20.
Figure 5 b, c, d are demultiplexers 9, respectively.
, the output of the sample-and-hold amplifier 15, and the output of the sample-and-hold amplifier 17. a indicates the data output before interpolation. In the latter method, when the switch _S1 or _S0 is ON, the data in the sample and hold amplifier 17 and the sample and hold amplifier 15 are exchanged, so that the continuity of the data is completely maintained.

In the embodiments described so far, linear interpolation has been described, but the same applies to non-linear interpolation. In this case, a resistor circuit is constructed by connecting resistors having different resistance values in series.

[Explanation of the effects of the invention]

As explained above, the present invention performs interpolation using a resistor circuit and a switch circuit connected in series. Therefore, due to the difference in linearity of the circuit system and the stability of the DC offset, the final composite waveform is determined at the data change point. This has the effect of being able to completely match the curve of the correction waveform without creating a step difference.

[Brief explanation of drawings]

Figure 1 is a block diagram of the conventional data interpolation method.
Fig. 2 is a signal waveform diagram of each part in the conventional circuit, Fig. 3 is a block diagram showing an embodiment of the present invention, Fig. 4 is a signal waveform diagram of each part in Fig. 3, and Fig. 5 is a diagram of the second embodiment of the present invention. FIG. 3 is a signal waveform diagram showing an example. In the figure, 1...digital memory, 2...
Digital data, 3...Address decoder, 4
...Address signal, 5...D/A converter, 6...
D/A converter, 7... Interpolation signal, 8... Interpolation signal generation circuit, 9... Demultiplexer, 10... Address control signal, 11... Sample hold amplifier, 12... Subtraction amplifier, 13... Addition amplifier , 14... Interpolated waveform output, 15... Sample hold amplifier, 16... Resistance circuit, 17... Sample hold amplifier, 18... Switch circuit,
19...clock, 20...up/down control signal, 21...counter, respectively.

Claims (1)

[Claims] 1. Output data as continuous digital data
A digital memory that stores T _o and T _o+1 , and output data T _o and T _o+1 from the digital memory.
and an address decoder that sequentially reads out the output data T o and T o+1 read from the digital memory, and a D/D converter that converts the output data T _o and T _{o +1 read} from the digital memory into analog data.
A converter; a demultiplexer that separates the output data from the D/A converter into output data T _o and T _o+1 , respectively; and output data T _o and T _o+ that are respectively separated by the demultiplexer. ₁ and a resistor circuit configured by connecting resistors in series for the number of interpolation stages and connected between the two sample and hold circuits, The two data held in the sample and hold circuits are input to both ends of the resistor circuit, and the signals at the connection points of each resistor are sequentially selected and output by switch operation, thereby interpolating between the two data. Characteristic data interpolation method.