JPH02865B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing an island-shaped semiconductor device provided on a transparent insulating substrate, for example, a semiconductor device using a silicon-on-sapphire substrate. Semiconductor devices using semiconductor films on insulating substrates, such as silicon-on-sapphire (SOS) substrates, have perfect isolation between elements, no parasitic elements, and low parasitic capacitance, making it possible to obtain excellent characteristics. In particular, it is being applied to large-scale integrated circuits. These applications are, of course, circuits that use a low voltage power supply, that is, 5 to 10V, and do not require a high voltage insulating film that exceeds, for example, 100V. By the way, silicon-on-sapphire semiconductor devices are known to be excellent as integrated circuit elements for high voltage operation for the reasons mentioned above, and integrated circuit semiconductor devices that operate at 150 to 500 V have been developed. . Such a semiconductor device naturally requires an insulating film with high breakdown voltage for elements and wiring. In order to obtain an insulating film with high withstand voltage, it is sufficient to increase the thickness of the insulating film. When a so-called bulk silicon substrate is used, a thick and high-quality insulating oxide film can be easily obtained by oxidizing the substrate silicon for a long time, but problems arise when using an SOS substrate. Figure 1 is an example.
This figure shows a cross-sectional view of a high-voltage capacitance element in which a thick oxide film is formed by directly oxidizing an SOS substrate. 1 is a sapphire substrate, 2 is a silicon thin film, and 3
is a silicon oxide film, and 4 and 5 are metal electrodes. A capacitance is formed between the silicon film 2 and the metal electrode 4 via the insulating film 3. In this case, (1) the silicon layer on the SOS substrate is generally about 0.5 to 1 μm thick, so excessive oxidation will cause the silicon layer to become too thin, resulting in sacrificial deterioration of elements such as transistors; (2) island-shaped silicon If the layer is oxidized to be thick, the shape of the interface between silicon and sapphire becomes as shown in 7 in the figure, which causes disadvantages such as deterioration of breakdown voltage. Therefore, in order to obtain a thick insulating film in an SOS type semiconductor device, it is common practice to provide an insulating film 3 (e.g., CVD-SiO ₂ film) by vapor phase growth, as shown in Fig. 2. . But for that,
In addition to conventional processes, a dedicated oxide film vapor phase growth process and resist process are required. In addition, LOCOS ( Local Oxidation in
In an SOS type semiconductor device having a silicon (Silicon) structure, as shown in FIG.
When attempting to obtain a high voltage capacitance element having a three-layer electrode structure sandwiched between metal electrode layers 5, there was a problem in that it was difficult to control oxide film etching. In other words, on an SOS board that already has a LOCOS structure,
A thick oxide film 3 is deposited by a method such as vapor phase growth,
If only the necessary portion is to be left, it is necessary to finish etching the oxide film 3 on the LOCOS structure oxide film. However, it is difficult to accurately stop the stacking of the oxide film midway through, and this often results in overetching of the LOCOS structure oxide film. SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device that solves the problems in manufacturing the conventional SOS type high voltage semiconductor device. According to the present invention, it is possible to obtain an SOS type semiconductor device with an insulator-embedded structure, and at the same time, to obtain a thick insulator layer at a desired portion on a silicon layer with fewer manufacturing steps. The present invention is, of course, fully compatible with the SOS technique commonly used in the past, and therefore can be easily applied to conventional SOS type semiconductor devices. That is, according to the present invention, in manufacturing a semiconductor device having an insulator buried layer between island-like elements on a transparent insulator substrate,
The resist layer coated on the embedding insulator layer covering the island-shaped element is uniformly exposed from the back side of the substrate and pattern exposed from the substrate surface to obtain the insulator embedding layer and at the same time, the desired pattern is applied onto the island-shaped element. A method for manufacturing a semiconductor device is obtained, which is characterized in that an insulator film having a shape of is obtained. The present invention will be explained in detail below using the drawings. FIGS. 5a, 5b, and 5c are diagrams for explaining the manufacturing process of the semiconductor device of the present invention, and show device cross sections in each main process, taking a high voltage capacitance device as an example. That is, in Figure 5a, 1, 2
are a sapphire substrate and a silicon layer (assumed to be n ⁺ doped), and 8 is another transistor element portion. In the present invention, first, a buried insulating layer 3 having approximately the same thickness as the silicon layer is deposited on the entire surface of an SOS substrate formed in an island shape by a vapor phase growth method or the like. Next, a resist 9 is applied over it. Next, uniform exposure 10 is applied to the entire substrate from the sapphire substrate side on the back side. in this case,
The resist layer above the island-shaped silicon layers 2 and 8 is not exposed to light because the silicon layer blocks light, but the resist portion 9' on the sapphire substrate is transmitted through the transparent sapphire substrate and the insulator layer 3. exposed to light. Next, a 9'' portion of the resist is exposed to light using a photomask 11 that selects a portion of the substrate surface where a thick insulating film is to be left.
Develop this resist layer, use the resist as a mask,
If the insulating layer is etched, a cross-sectional structure as shown in FIG. 5b is obtained. That is, the space between the island-like silicon layers 2, 8, etc. is filled flat with an insulating layer 3', and a thick insulating layer is formed on the silicon layer 2 for providing a high voltage capacitance element. 3 is left. Here, the resist may be exposed to light either uniformly from the back side or selectively from the front side. If a gate oxide film 13 and polysilicon layers 6 and 6' are formed on the substrate in the state shown in FIG. 5b, and a thick insulating film 14 and metal wirings 4 and 5 are further formed, a structure as shown in FIG. 5c is obtained. cross-sectional structure
The SOS type semiconductor device is completed. Here, the polysilicon layer 6 connected to the metal wiring 4 is sandwiched between the metal electrode layer 5 and the silicon layer 3 connected thereto via the upper and lower thick insulating films 14 and 3. A voltage-resistant capacitance element is constructed. Such a capacitive element having a three-layer structure is particularly advantageous in the case of a high-voltage capacitive element that has a small capacitance per unit area because it requires the use of a thick insulating film. If a very large capacitance is not required, a high breakdown voltage capacitance element as shown in FIG. 3 can be obtained by subjecting the substrate shown in FIG. 5b to a gate oxidation process and a metal wiring process. In this case, the element electrodes include the metal electrode 4 and
There are two layers: silicon layer 2. As mentioned above,
In this method of manufacturing an SOS type semiconductor device, a desired high voltage insulating film is obtained, and at the same time, the entire island-like silicon layer on the sapphire substrate is buried smoothly and on the same plane by the buried insulating layer 3'. You will be trapped. This structure has been conventionally referred to as the back-fill method, and is known as a preferable structure useful for preventing wire breakage and sidewall leakage current peculiar to SOS transistors. That is, according to the manufacturing method of the present invention, a resist for the process of forming the buried insulator layer is also used, and a part of the buried insulator layer is left as it is in the island-like silicon layer, thereby forming a thick layer. Therefore, since it is possible to obtain an insulating film with a high breakdown voltage, it can greatly contribute to the simplification of the manufacturing process. Needless to say, the high voltage insulating layer can be used not only for the capacitance element described in the embodiments but also for crossover purposes such as high voltage wiring using a polysilicon layer.

[Brief explanation of drawings]

1 and 2 are schematic cross-sectional views showing the structure of a high-voltage capacitance element manufactured by a conventional manufacturing method, and FIG.
4 are schematic cross-sectional views showing the structure of a high voltage capacitance element obtained by the manufacturing method of the present invention, and FIGS. These are cross-sectional views of the device in main steps, and in each figure, 1 is a transparent insulator substrate, 2 is a semiconductor layer,
3 is an insulator layer, 4 and 5 are metal electrode layers, 6 and 6' are other electrode layers, 7 is a constriction part, 8 is a transistor element, 9 is a photoresist layer, 9' and 9'' are resist photosensitive parts, Reference numeral 10 indicates uniform exposure on the back surface, 11 indicates a photomask, 12 indicates pattern exposure from the front surface, 13 indicates a gate oxide film, and 14 indicates another insulating layer.

Claims (1)

[Claims] 1. In manufacturing a semiconductor device having an insulator buried layer between island-like elements on a transparent insulator substrate, a resist layer coated on the embedding insulator layer covering the island-like elements is uniformly applied from the back side of the substrate. 1. A method of manufacturing a semiconductor device, comprising performing pattern exposure from the surface of a substrate to obtain the buried insulating layer and at the same time obtaining an insulating film having a desired shape on an island-like element.