JPH0287638A - circuit board - Google Patents
circuit boardInfo
- Publication number
- JPH0287638A JPH0287638A JP24041188A JP24041188A JPH0287638A JP H0287638 A JPH0287638 A JP H0287638A JP 24041188 A JP24041188 A JP 24041188A JP 24041188 A JP24041188 A JP 24041188A JP H0287638 A JPH0287638 A JP H0287638A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- circuit board
- semiconductor device
- resin
- leads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 20
- 239000011347 resin Substances 0.000 claims description 17
- 229920005989 resin Polymers 0.000 claims description 17
- 238000000465 moulding Methods 0.000 claims description 5
- 239000003795 chemical substances by application Substances 0.000 description 4
- 239000011888 foil Substances 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- 239000000758 substrate Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000007788 roughening Methods 0.000 description 2
- 239000000565 sealant Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 239000008393 encapsulating agent Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000004382 potting Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
Landscapes
- Wire Bonding (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】 ［産業上の利用分野コ 本発明は回路基板のリードの構造に関する。[Detailed description of the invention] [Industrial application fields] The present invention relates to the structure of leads of circuit boards.
［従来の技術］
従来の回路基板のリードの表面状態は、リードとして使
用している金属箔の表面状態により決まり、圧延箔を使
用した場合、第４図の様にリード２の上下面共に平滑で
あり、電解箔を使用した場合、第５図の様に片面が粗く
、一方が平滑なり−ド２の表面状態となり、この状態は
、通常のコンマ故ミクロンから数ミクロンの金属メツキ
を表面に施しても、太き（は変わらない。[Prior Art] The surface condition of the leads of a conventional circuit board is determined by the surface condition of the metal foil used as the lead. When rolled foil is used, both the top and bottom surfaces of the lead 2 are smooth as shown in Figure 4. When electrolytic foil is used, one side is rough and the other is smooth, as shown in Figure 5. Even if you apply it, the thickness (does not change).
［発明が解決しようとする課題］
しかし、前述の従来技術では、粗いリード表面の場合と
比べ、平滑なリード表面状態だと、モールド樹脂のリー
ドへの密着力が弱くなり、その部分を通して、外部の水
分や、イオン性物質等が工Ｃ表面へ容易に達するように
なる。半導体装置の耐湿性能を決定する最も大きな要因
は、外部の水分やイオン性物質の１０表面への侵入し易
さであり、前記の様に、モールド樹脂のリードへの密着
力が弱いと、モールド樹脂とリードの界面を伝って外部
の水分やイオン性物質が工Ｃ表面に達し易くなり、半導
体装置の耐湿性能が損なわれると（・５課題を有する。[Problems to be Solved by the Invention] However, in the above-mentioned conventional technology, when the lead surface is smooth compared to when the lead surface is rough, the adhesion of the molding resin to the lead is weaker, and the adhesiveness of the mold resin to the lead is weaker than when the lead surface is rough. Moisture, ionic substances, etc. can easily reach the surface of the steel. The most important factor that determines the moisture resistance performance of semiconductor devices is the ease with which external moisture and ionic substances can penetrate into the 10 surface.As mentioned above, if the adhesion of the mold resin to the leads is weak, the mold External moisture and ionic substances tend to reach the surface of the resin through the interface between the resin and the lead, impairing the moisture resistance of the semiconductor device (5 issues).
そこで本発明はこのような課題を解決するものでその目
的とするところは耐湿性能の高い半導体装置を提供する
ことである。SUMMARY OF THE INVENTION The present invention is intended to solve these problems, and an object of the present invention is to provide a semiconductor device with high moisture resistance.
口課題を解決するための手段］
本発明の回路基板は、半導体装置の外部接続部に直接接
合されるリードを有し、前記半導体装置の外部接続部と
、前記リードを接合後、樹脂モールド剤で半導体装置と
その近辺のリードが封止される回路基板において、リー
ド表面が、化学的にあるいは機械的に粗されていること
を特徴とする［実施例］
第１図は本発明の実施例を示す半導体装置のボッティン
グモールド樹脂封止後の断面図であって１は工Ｃチップ
、２はリード、３はボッティング用樹脂封止剤、４は半
導体装置あるいはリード側へ予め形成、してあったバン
プである。ここで、ポツティング用樹脂封止剤３と、リ
ード２との間の密着力は、リード２０表面が粗れている
ことにより、高まり、界面から水分やイオン性物質が工
Ｃチップ１に達するのを難しくする。したがって、この
樹脂封止後の半導体装置を含む回路基板を考えた場合、
リード２０表面を粗くしたことにより、耐湿性が向上し
たことになる。Means for Solving the Problem] The circuit board of the present invention has a lead that is directly joined to an external connection part of a semiconductor device, and after joining the external connection part of the semiconductor device and the lead, a resin molding agent is applied. [Embodiment] FIG. 1 shows an embodiment of the present invention, in which a semiconductor device and its neighboring leads are sealed on a circuit board, characterized in that the lead surface is chemically or mechanically roughened. 1 is a cross-sectional view of a semiconductor device after being sealed with a botting mold resin, 1 is an engineered C chip, 2 is a lead, 3 is a resin sealant for botting, and 4 is a resin sealing agent formed in advance on the semiconductor device or lead side. It's a bump that was there. Here, the adhesion between the potting resin encapsulant 3 and the leads 2 is increased due to the rough surface of the leads 20, which prevents moisture and ionic substances from reaching the engineering chip 1 from the interface. make it difficult. Therefore, when considering a circuit board containing a semiconductor device sealed with resin,
By roughening the surface of the lead 20, moisture resistance is improved.
第２図は本発明の他の実施例を示す、半導体装置を別の
基板にアウターリードポンディングした場合の断面図で
あって、５はＩＣチップ１がアウターリードボンディン
グされる基板、６は基板５上のパターン、７はリード２
と基板上のパターン６を接合するはんだ付部を示し、８
はリード８がばらばらにならない様に設けられている絶
縁性樹脂よりなるサスペーンダーである。この実装構造
においても前記第１図と同様、リード２０表面が粗れて
いることにより半導体装置を含む回路基板の耐湿性は向
上する。FIG. 2 is a sectional view showing another embodiment of the present invention, in which a semiconductor device is outer lead bonded to another substrate, in which 5 is a substrate to which the IC chip 1 is outer lead bonded, and 6 is a substrate. Pattern on 5, 7 is lead 2
8 shows the soldering part for joining pattern 6 on the board, and 8
is a suspender made of insulating resin that is provided to prevent the lead 8 from coming apart. Also in this mounting structure, as in FIG. 1, the moisture resistance of the circuit board including the semiconductor device is improved because the surface of the lead 20 is rough.
第６図は本発明のさらに他の実施例を示す半導体装置の
トランスファーモールド樹脂封止後の断面図であって９
はトランスファーモールド剤である。この実装構造にお
いても前記第１図と同様、リード２０表面が粗れている
ことにより、半導体装置を含む回路基板の耐湿性は向上
する。FIG. 6 is a cross-sectional view of a semiconductor device after being sealed with transfer mold resin, showing still another embodiment of the present invention;
is a transfer molding agent. Also in this mounting structure, as in FIG. 1, the surface of the lead 20 is roughened, so that the moisture resistance of the circuit board including the semiconductor device is improved.
リード表面を粗すには、金属箔表面を機械的に研摩する
ことにより粗らしてから、バターニングしてリードを形
成する方法と、特殊なマスクを使いハーフエツチングを
行い、それにより、金属箔表面を粗す方法がある。粗さ
の程度は５μｍ以上は必要で、３５μｍ厚の銅箔だと、
１０〜１５μｍｆ）″−最適な粗さであり、これ以上粗
いと、リード部の機械的強度が著しく低下する。To roughen the lead surface, the metal foil surface is roughened by mechanical polishing and then patterned to form the lead, and half etching is performed using a special mask. There are ways to roughen the surface. The degree of roughness needs to be 5 μm or more, and if the copper foil is 35 μm thick,
10 to 15 μmf)'' - optimum roughness; if it is rougher than this, the mechanical strength of the lead portion will be significantly reduced.
［発明の効果コ
半導体装置の外部接続部に直接接合されるリードを有し
、前記半導体装置の外部接続部と、前記リードを接合後
、樹脂モール４ド剤で半導体装置と、その近辺のリード
が封止される回路基板においてリード表面を化学的に、
あるいは機械的に粗したため、モールド樹脂と、リード
の密着力が向上し、半導体装置を含む回路基板の耐湿性
向上という効果が得られる。[Effects of the Invention] It has a lead that is directly bonded to an external connection part of a semiconductor device, and after bonding the external connection part of the semiconductor device and the lead, the semiconductor device and the leads in the vicinity are bonded with a resin molding agent. Chemically coat the lead surface on the circuit board to be sealed.
Alternatively, mechanical roughening improves the adhesion between the molding resin and the leads, resulting in the effect of improving the moisture resistance of the circuit board including the semiconductor device.
第１図は本発明の回路基板の一実施例を示す主要断面図
。
第２図は本発明の回路基板の他の実施例を示す主要断面
図。
第６図は本発明の回路基板のさらに他の実施例を示す主
要断面図。
第４図は従来の回路基板一実施例を示す主要断面図。
第５図は従来の回路基板の他の実施例を示す主要断面図
。
１・・・・・・ＩＣチップ
２・・・・・・リード
３・・・・・・ボッティング用樹脂封止剤４ ・・・
・・・ ）（ン プ
５・・・・・・基 板
６・・・・・・基板上のパターン
７・・・・・・はんだ付部
８・・・・・・サスペンダー
第
図
第
図
第３
図
第４
図
第９図FIG. 1 is a main sectional view showing an embodiment of the circuit board of the present invention. FIG. 2 is a main sectional view showing another embodiment of the circuit board of the present invention. FIG. 6 is a main sectional view showing still another embodiment of the circuit board of the present invention. FIG. 4 is a main sectional view showing an embodiment of a conventional circuit board. FIG. 5 is a main sectional view showing another embodiment of a conventional circuit board. 1...IC chip 2...Lead 3...Resin sealant for botting 4...
) (Pump 5... Board 6... Pattern 7 on the board... Soldering part 8... Suspender Figure Figure Figure 3 Figure 4 Figure 9
Claims (1)
、前記半導体装置の外部接続部と、前記リードを接合後
、樹脂モールド剤で半導体装置と、その近辺のリードが
封止される回路基板において、リード表面が、化学的に
、あるいは機械的に粗されていることを特徴とする回路
基板。A circuit board having a lead that is directly bonded to an external connection portion of a semiconductor device, and after bonding the external connection portion of the semiconductor device and the lead, the semiconductor device and the leads in the vicinity are sealed with a resin molding agent. A circuit board characterized in that the lead surface is chemically or mechanically roughened.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24041188A JPH0287638A (en) | 1988-09-26 | 1988-09-26 | circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24041188A JPH0287638A (en) | 1988-09-26 | 1988-09-26 | circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0287638A true JPH0287638A (en) | 1990-03-28 |
Family
ID=17059070
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24041188A Pending JPH0287638A (en) | 1988-09-26 | 1988-09-26 | circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0287638A (en) |
-
1988
- 1988-09-26 JP JP24041188A patent/JPH0287638A/en active Pending
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