JPH0295175A - Method of controlling semiconductor switching element - Google Patents

Abstract

PURPOSE:To avoid the overlapping of snubber currents, and to inhibit even surge voltage applied to a semiconductor switching element by making the pulse width of an ON signal transmitted to the semiconductor element longer than the time required for damping currents made to flow through a snubber circuit. CONSTITUTION:A pulse generating circuit 21 and an OR element 22 are installed between a PWM generating circuit 11 and a photo-coupler 12, trigger is applied to the pulse generating circuit 21 by the rise of an ON signal when the ON signal is output from the PWM generating circuit 11, and pulses having time width in which snubber currents can be damped sufficiently are generated. Consequently, even when pulses having short time width are output from the PWM generating circuit 11, all of pulses input to the photo-coupler 12 are changed into a signal having pulse width wider than a fixed value. Accordingly, the overlapping phenomenon of snubber currents is eliminated, and a maximum current value made to flow through a snubber circuit can be equalized to a maximum current value at the time of the single switching of one transistor.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a control method that can downsize a semiconductor switch element that performs power conversion and a snubber circuit attached thereto.

[Conventional technology]

FIG. 3 is a general main circuit connection diagram of a voltage source inverter configured with self-extinguishing semiconductor switching elements.

In FIG. 3, six transistors 5. U, 5. V.

The transistor inverter 3 is constructed by connecting six freewheeling diodes 6U, 6V, 6W, 6X, 6Y, and 6Z in antiparallel to each of 5W, 5X, 5Y, and 5Z, and connecting these in a three-phase bridge. , DC power from the DC power supply 2 is converted into AC power by the on/off operation of the six transistors, and the AC power is supplied to the load 4. When the transistor inverter 3 converts direct current to alternating current, pulse width modulation (hereinafter abbreviated as PWM) control is suitable for suppressing harmonic components included in the output alternating current.
It is widely used.

FIG. 4 is a block diagram showing a general example of pulse width modulation control of transistors.

As shown in FIG. 4, the PWM generation circuit 11 modulates the control signal into a signal with a pulse width corresponding to the control signal using a high frequency carrier wave, and after insulating it with a photocoupler 12, connects the control signal to a signal with a pulse width corresponding to the control signal. Transistor 5U via 13
Turn on and off.

By the way, there is a wiring inductance in the circuit between the transistor inverter 3 and the DC power supply 2, and during the switching operation of the transistor, the energy accumulated in this wiring inductance becomes a surge voltage that is applied between the collector and emitter of this transistor. applied and attempts to damage it.

Therefore, in order to suppress the surge voltage that occurs during switching, a snubber circuit (snubber capacitor 7 in the case of Fig. 3) is installed. When the circuit is configured, the current and voltage of this snubber capacitor 7 oscillate during switching.

Fig. 5 is a time chart showing changes in the current and voltage of the snubber capacitor shown in Fig. 3, in which Fig. 5 (a) shows changes in the snubber current, and Fig. 5 (b) shows changes in the snubber voltage. , each one is in a hailstorm.

In FIG. 5, if the transistor is turned on at time To, the first peak of the snubber current occurs at time T1 immediately thereafter. Since this snubber current and voltage are oscillating, a second peak of the snubber current occurs at time T2 after further time has elapsed, and this current continues to oscillate and attenuate.

[Problem to be solved by the invention]

Now, if we consider the case where a specific transistor is turned on and then turned off after a predetermined time has elapsed, if this elapsed time is the same as the time interval between the first peak and the second peak shown in FIG. The current increases from the first peak value to the second peak value.
The snubber current is a superimposed peak value.

FIG. 6 is a time chart showing the case where snubber currents are synchronously superimposed, and is at time T.

T and T2 indicate the same times as in FIG. As a result, the snubber voltage also takes a correspondingly high value.

Conventionally, therefore, the rating of the transistor used in the inverter and the design of the snubber circuit have been made in consideration of the above phenomenon. For example, when such a superimposition phenomenon occurs, the maximum value of the snubber current is approximately twice the maximum load current, and a large capacity transistor and snubber circuit must be selected to withstand this. Therefore, the transistor inverter has the disadvantage of being large and expensive.

Therefore, an object of the present invention is to suppress the maximum value of the current flowing through the snubber circuit, thereby reducing the capacitance of the transistor or the snubber circuit.

[Means to solve the problem]

In order to achieve the above object, the control method of the present invention includes:
In a method for controlling a semiconductor switching element in which a switching signal is applied to a semiconductor element attached to a snubber circuit to perform power conversion, the pulse width of an ON signal or an OFF signal applied to the semiconductor element is set as described above. The time should be longer than the time required for the current flowing through the snubber circuit to attenuate.

[Effect]

According to the present invention, when the pulse width of an on or off signal given to an element is shorter than a certain set time in a control section of an inverter,
This study focuses on the fact that the maximum current flowing through the snubber circuit can be reduced by providing a circuit that delays the falling timing of the on or off signal.By providing such a delay circuit in the control section, the transistor After turning on or turning off, the transistor can never be turned off or turned on within the set time, and as a result, the snubber current superimposition phenomenon shown in FIG. 6 is eliminated, and the maximum current flowing through the snubber circuit is reduced to one This is intended to be equal to the maximum current value when the transistor switches alone.

[Embodiment] FIG. 1 is a diagram showing an embodiment of the present invention.

PWM generation circuit 11 photocoupler 1 shown in FIG.
2. The base drive circuit 13 and the transistor 5U are the same as the conventional circuit shown in FIG. 4, but in the present invention,
A pulse generation circuit 21 and an OR element 22 are provided between the PWM generation circuit 11 and the photocoupler 12 as shown.

Now, when an ON signal is output from the PWM generation circuit 11, the pulse generation circuit 21 is triggered at the rising edge of the ON signal.
This will generate a pulse. This pulse generating circuit 21
The pulse width of the pulse outputted by the transistor is set to a time t that allows the snubber current to sufficiently attenuate when the transistor switches alone. Therefore, even if the PWM generation circuit 11 outputs a pulse with a time width shorter than t, all the pulses input to the photocoupler 12 will be signals with a pulse width of t, and the width of the output pulse of the PWM generation circuit 11 will be t. If the length is longer than , the signal as it is is
Enter 2. The logical OR element 22 is for that purpose.

FIG. 2 is a time chart showing the operation of the embodiment circuit shown in FIG. 1, in which FIG. Each of them receives the pulse signal outputted by 21.

The above explanation is for the case where the width of the pulse for turning on the transistor is short, but the present invention is of course applicable to the case where the pulse width for turning off the transistor is short.

(Effects of the Invention) According to the present invention, since the period of the oscillating current flowing through the snubber circuit matches the operation of the semiconductor switch element, it is possible to avoid superimposition of the snubber current.Therefore, the semiconductor switch element concerned Therefore, with conventional inverters, the capacitance of the snubber capacitor can be reduced without changing the expected value of the surge voltage, and the maximum value of the surge voltage can be suppressed without changing the snubber circuit. Therefore, the voltage rating of the semiconductor switching element used can be lowered.Furthermore, depending on the set value of the surge voltage, it is possible to both reduce the capacity of the snubber capacitor and lower the voltage rating of the semiconductor switching element. In any case, the effect of making the device smaller and reducing costs is obtained.

[Brief explanation of drawings]

Figure 1 is a block diagram showing an embodiment of the present invention, Figure 2 is a block diagram showing an embodiment of the present invention.
The figure is a time chart showing the operation of the embodiment circuit shown in Figure 1, Figure 3 is a general main circuit connection diagram of a voltage source inverter configured with self-extinguishing semiconductor switching elements, and Figure 4 is a A block diagram showing a general example of pulse width modulation control of transistors. Figure 5 is a time chart showing changes in the current and voltage of the snubber capacitor shown in Figure 3. Figure 6 is a diagram showing the snubber currents synchronously superimposed. This is a time chart that shows the situation. 2...DC power supply, 3...Transistor inverter,
4... Load, 5U to 5Z... Transistor as semiconductor switch element, 6U to 6Z... Free wheel diode, 7... Snubber capacitor, 11... PWM generation circuit, 12... Photocoupler, 13 . . . base drive circuit, 21 . . . pulse generation circuit, 22 . . . OR element. Figure 1 Figure 2

Claims (1)

[Claims] 1) In a method of controlling a semiconductor switching element in which a switching signal is applied to a semiconductor element attached to a snubber circuit to perform power conversion, the pulse width of an ON signal or an OFF signal applied to the semiconductor element is controlled. . A method for controlling a semiconductor switching element, comprising making the time longer than the time required for the current flowing through the snubber circuit to attenuate.