JPH0295236U - - Google Patents
Info
- Publication number
- JPH0295236U JPH0295236U JP341789U JP341789U JPH0295236U JP H0295236 U JPH0295236 U JP H0295236U JP 341789 U JP341789 U JP 341789U JP 341789 U JP341789 U JP 341789U JP H0295236 U JPH0295236 U JP H0295236U
- Authority
- JP
- Japan
- Prior art keywords
- wiring pattern
- insulating film
- semiconductor device
- recess
- sectional
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
第１図イ，ロはそれぞれこの考案の一実施例の
半導体装置を示す部分断面図及びそのＡ―Ａ線断
面図、第２図イ，ロ、第３図イ，ロはそれぞれ、
第１図イ，ロの半導体装置の製造工程別の部分断
面図及びそのＡ―Ａ線断面図である。第４図イ，
ロはそれぞれ従来の半導体装置を示す部分断面図
及びそのＡ―Ａ線断面図、第５図イ，ロ、第６図
イ，ロはそれぞれ第４図イ，ロの半導体装置の製
造工程別の部分断面図及びそのＡ―Ａ線断面図で
ある。
１…半導体基板、２…絶縁膜、３…配線パター
ン、４…凹用絶縁膜、５…パツシベーシヨン用絶
縁膜、７…窓孔、８…配線パターン段差、９…凹
所。
FIGS. 1A and 1B are a partial cross-sectional view and a sectional view taken along line A--A of the semiconductor device according to an embodiment of this invention, FIGS.
1A and 1B are partial cross-sectional views of each manufacturing process of the semiconductor device of FIGS. Figure 4 A,
B is a partial cross-sectional view and a cross-sectional view taken along the line A-A of the conventional semiconductor device, respectively; FIGS. 5A and B, and FIGS. FIG. 2 is a partial cross-sectional view and a cross-sectional view taken along line AA of the same. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Insulating film, 3... Wiring pattern, 4... Insulating film for recess, 5... Insulating film for passivation, 7... Window hole, 8... Wiring pattern step, 9... Recess.
Claims (1)
された半導体装置において、 前記絶縁膜に配線パターンと同一パターンで凹
所を形成し、この凹所に配線パターンを埋め込ま
せたことを特徴とする半導体装置。[Claims for Utility Model Registration] In a semiconductor device in which a wiring pattern is formed on an insulating film on a semiconductor substrate, a recess is formed in the insulating film in the same pattern as the wiring pattern, and the wiring pattern is embedded in the recess. A semiconductor device characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP341789U JPH0295236U (en) | 1989-01-13 | 1989-01-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP341789U JPH0295236U (en) | 1989-01-13 | 1989-01-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0295236U true JPH0295236U (en) | 1990-07-30 |
Family
ID=31205035
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP341789U Pending JPH0295236U (en) | 1989-01-13 | 1989-01-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0295236U (en) |
-
1989
- 1989-01-13 JP JP341789U patent/JPH0295236U/ja active Pending