JPH0298193A - Manufacture of insulating layer for ceramic multilayer board - Google Patents
Manufacture of insulating layer for ceramic multilayer boardInfo
- Publication number
- JPH0298193A JPH0298193A JP25133388A JP25133388A JPH0298193A JP H0298193 A JPH0298193 A JP H0298193A JP 25133388 A JP25133388 A JP 25133388A JP 25133388 A JP25133388 A JP 25133388A JP H0298193 A JPH0298193 A JP H0298193A
- Authority
- JP
- Japan
- Prior art keywords
- resist film
- insulating layer
- paste
- film
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000919 ceramic Substances 0.000 title claims abstract description 26
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 229910052751 metal Inorganic materials 0.000 claims abstract description 15
- 239000002184 metal Substances 0.000 claims abstract description 15
- 238000007650 screen-printing Methods 0.000 claims abstract description 9
- 239000000758 substrate Substances 0.000 claims description 16
- 238000010304 firing Methods 0.000 claims description 3
- 238000001035 drying Methods 0.000 claims description 2
- 238000009413 insulation Methods 0.000 abstract description 4
- 230000007547 defect Effects 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 9
- YMWUJEATGCHHMB-UHFFFAOYSA-N Dichloromethane Chemical compound ClCCl YMWUJEATGCHHMB-UHFFFAOYSA-N 0.000 description 3
- 239000011230 binding agent Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 description 1
- 229910052753 mercury Inorganic materials 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はセラミック多層基板絶縁層製造方法に関し、特
に、セラミック基板上に絶縁層で互いに絶縁された複数
の配線層の製造に適用しうるセラミック多層基板絶縁層
製造方法に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing an insulating layer of a ceramic multilayer board, and in particular, a ceramic multilayer board that can be applied to manufacturing a plurality of wiring layers on a ceramic substrate that are insulated from each other by an insulating layer. The present invention relates to a method for manufacturing an insulating layer of a multilayer substrate.
従来のセラミック多層基板絶縁層製造方法は、メタル配
線層の上に絶縁ペーストをスクリーン印刷で塗布し、塗
布した絶縁ペーストを焼成するという方法をとっていた
。A conventional method for manufacturing an insulating layer of a ceramic multilayer board involves applying an insulating paste onto a metal wiring layer by screen printing, and then firing the applied insulating paste.
第2図が従来のセラミック多層基板絶縁層製造方法にお
ける絶縁ペーストを塗布するスクリーン印刷工程を示す
断面図で、メタル配線層2を形成したセラミック基板1
0表面に絶縁ペースト6をゴムスキージ9でスクリーン
10へ押しつけて塗布する様子を示している。FIG. 2 is a cross-sectional view showing the screen printing process of applying an insulating paste in a conventional ceramic multilayer substrate insulating layer manufacturing method, and shows the ceramic substrate 1 on which the metal wiring layer 2 is formed.
2 shows how the insulating paste 6 is applied to the surface of the screen 10 by pressing it against the screen 10 with a rubber squeegee 9.
第3図(a)は、第2図で絶縁ペースト6を塗布した後
の状態を示す断面図で、塗布した絶縁ペースト6の粘度
が低い場合で、エツジ部7に塗布後の表面張力による変
形でだれ人を生じている。FIG. 3(a) is a cross-sectional view showing the state after the insulation paste 6 is applied in FIG. So many people are born.
第3図(b)は、絶縁ペースト6の粘度が高い場合の塗
布後の状態を示す断面図で、塗布した絶縁ペースト6は
前端と終端のエツジ部7で、それぞれ過剰に塗布される
ためにふくらみBを生じている。FIG. 3(b) is a cross-sectional view showing the state after application when the insulating paste 6 has a high viscosity. A bulge B has occurred.
上述のように形成された絶縁層8の上部に、次の工程で
他の配線層(図示せず)を形成し多層配線層を製造する
。ところが、絶縁層8のエツジ部7にだれAやふくらみ
Bがあると、その上に形成される配線層(図示せず)に
断線等の欠陥が発生するという問題があった。In the next step, another wiring layer (not shown) is formed on top of the insulating layer 8 formed as described above to produce a multilayer wiring layer. However, if there is a droop A or a bulge B in the edge portion 7 of the insulating layer 8, there is a problem in that defects such as disconnection occur in the wiring layer (not shown) formed thereon.
上述した従来のセラミック多層基板絶縁層製造方法は、
絶縁ペーストをスクリーン印刷によって塗布する工程に
おいて、絶縁層のエツジ部分に塗布された絶縁ペースト
が粘度の低い場合は流動してだれを発生し、粘度の高い
場合は過剰な塗布によシふくらみを発生して均一な絶縁
膜厚が得られないという欠点があった。The conventional ceramic multilayer board insulation layer manufacturing method described above is as follows:
In the process of applying insulating paste by screen printing, if the insulating paste applied to the edges of the insulating layer has a low viscosity, it will flow and sag, and if it has a high viscosity, excessive application will cause bulges. However, there was a drawback that a uniform insulating film thickness could not be obtained.
〔課題を解決するための手段〕
本発明のセラミック多層基板絶縁層製造方法はメタル配
線層を形成したセラミック基板の表面にレジストフィル
ムを貼シ付ける第1の工程と、前記レジストフィルムを
露光現像して前記セラミック基板の外周部であって前記
メタル配線層と微小位を離隔して前記レジストフィルム
を残し他の前記レジストフィルムを取り除く第2の工程
と、残された前記レジストフィルムに凹まれた前記セラ
ミック基板の表面に絶縁ペーストをスクリーン印刷する
第3の工程と、前記絶縁ペーストを乾燥する第4の工程
と、残された前記レジストフィルムを剥離する第5の工
程と、前記絶縁ペーストを焼成して絶縁層を形成する第
6の工程を含んで構成される。[Means for Solving the Problems] The method for manufacturing an insulating layer of a ceramic multilayer board of the present invention includes a first step of pasting a resist film on the surface of a ceramic substrate on which a metal wiring layer has been formed, and exposing and developing the resist film. a second step of removing the resist film from the outer periphery of the ceramic substrate and leaving the resist film at a minute distance from the metal wiring layer; a third step of screen printing an insulating paste on the surface of the ceramic substrate; a fourth step of drying the insulating paste; a fifth step of peeling off the remaining resist film; and a step of baking the insulating paste. The method includes a sixth step of forming an insulating layer.
次に、本発明の実施例について、図面を参照して詳細に
説明する。Next, embodiments of the present invention will be described in detail with reference to the drawings.
第1図(a)〜(e)は本発明のセラミック多層基板絶
縁層製造方法による製造工程を示す断面図である。FIGS. 1(a) to 1(e) are cross-sectional views showing the manufacturing process according to the method for manufacturing an insulating layer of a ceramic multilayer board according to the present invention.
第1図(a)は、セラミック基板1の表面に形成された
メタル配線層2の上に、一定厚のレジストフィルム3を
貼シ付ける第1の工程を示した断面図である。第2の工
程は第1図(blに示すごとく、セラミック基板1の外
周部であってメタル配線層2と微小位を離隔したレジス
トフィルム4を残し、その他のレジストフィルム3を露
光現像によシ取シ除いてレジストフィルム4とメタル配
線層2との間に隙間Cを形成する工程である。この工程
は、例エバレジストフィルム3にデュポン社のLIST
ONT−1020等の紫外線硬化タイプを用いた際は露
光は波長465mmの水銀ランプ光を用い、セラミック
基板1の外周部であってメタル配線層2と微小位を離隔
したレジストフィルム4に光を照射し、現像は現像液と
してクロロセ/を用いてスプレー現像機などで行う、第
3の工程は、第1図(C)の断面図に示すごとく、前述
の第2の工程で形成されたレジストフィルム4によシ囲
まれメタル配線層2を形成したセラミック基板10表面
にアルミナ粉体と結晶化ガラス粉体と有機物バインダと
を含む絶縁ペースト6をスクリーン印刷で塗布する。FIG. 1(a) is a cross-sectional view showing a first step of pasting a resist film 3 of a constant thickness onto a metal wiring layer 2 formed on the surface of a ceramic substrate 1. FIG. In the second step, as shown in FIG. 1 (bl), a resist film 4 is left on the outer periphery of the ceramic substrate 1 and is slightly separated from the metal wiring layer 2, and the other resist film 3 is exposed and developed. This is a process of forming a gap C between the resist film 4 and the metal wiring layer 2 by removing the film.
When using an ultraviolet curing type such as ONT-1020, exposure uses mercury lamp light with a wavelength of 465 mm, and irradiates the resist film 4 on the outer periphery of the ceramic substrate 1 with a minute distance from the metal wiring layer 2. The third step is to develop the resist film formed in the second step as shown in the cross-sectional view of FIG. 1(C). An insulating paste 6 containing alumina powder, crystallized glass powder, and an organic binder is applied by screen printing to the surface of the ceramic substrate 10 surrounded by 4 and on which the metal wiring layer 2 is formed.
このとき、絶縁ペースト6はレジストフィルム4に密着
して隙間Cに充満するので、だれやふくらみが無くて均
一に塗布される。第4の工程は、第1図(d)の断面図
に示すごとく、前述の第3の工程で塗布した絶縁ペース
ト6中の有機バインダに含まれる溶剤を乾燥させる。第
5の工程ではレジストフィルム4を剥離するが、例えば
前述のデーボン社LISTONを用いた際には剥離溶剤
としてメチレンクロライドを使用するか、あるいは30
0℃〜400℃の温度をかけて燃焼させて剥離する。以
上の工程で得られた厚さを均一に塗布した絶縁ペースト
6を第6の工程である焼成工程によって結晶化し、第1
図(e)の断面図中に示すだれやふくらみの無い均一な
絶縁層8を得る。At this time, the insulating paste 6 adheres closely to the resist film 4 and fills the gap C, so that it is uniformly applied without dripping or bulging. In the fourth step, as shown in the cross-sectional view of FIG. 1(d), the solvent contained in the organic binder in the insulating paste 6 applied in the third step is dried. In the fifth step, the resist film 4 is peeled off. For example, when the above-mentioned Devon LISTON is used, methylene chloride is used as a peeling solvent, or
It is burned and peeled off at a temperature of 0°C to 400°C. The insulating paste 6 coated with a uniform thickness obtained in the above steps is crystallized in the sixth step, which is the firing step, and the first
A uniform insulating layer 8 without sag or bulges as shown in the cross-sectional view of Figure (e) is obtained.
〔発明の効果〕
本発明のセラミック多層配線基板絶縁層製造方法は、レ
ジストフィルムを貼シ付ける工程を追加することによシ
、メタル配線層を形成したセラミック基板の表面の外周
部であってメタル配線層と微小位を離隔したレジストフ
ィルムを形成でき、このレジストフィルムとメタル配線
層との隙間に絶縁ペーストが均一に充満するので、エツ
ジ部のだれやふくらみの発生を除去できて均一な絶縁層
を得ることができるという効果がある。[Effects of the Invention] The method for producing an insulating layer of a ceramic multilayer wiring board according to the present invention adds a step of pasting a resist film to the outer periphery of the surface of a ceramic substrate on which a metal wiring layer is formed. A resist film can be formed with a minute distance from the wiring layer, and the gap between the resist film and the metal wiring layer is uniformly filled with insulating paste, eliminating droop and bulges at the edges and creating a uniform insulation layer. It has the effect of being able to obtain
第1図(,1)〜(e)は本発明の一実施例による製造
工程を示す断面図、第2図は従来例によるスクリーン印
刷工程を示す断面図、第3図(a) 、 (b)は第2
図に示す従来の方法で製造した絶縁層を示す断面図であ
る。
1・・・セラミック基板、2・・・メタル配線層、3゜
4・・・レジストフィルム、6・・・絶縁ペースト、7
・・・エツジ部、8・・・絶縁層、9・・・ゴムスキー
ジ、10・・・スクリーン、
A・・・だれ、B・・・ふくらみ、C・・・隙間。
代理人 弁理士 内 原 晋
第1図Figures 1 (, 1) to (e) are cross-sectional views showing the manufacturing process according to an embodiment of the present invention, Figure 2 is a cross-sectional view showing the screen printing process according to a conventional example, and Figures 3 (a) and (b). ) is the second
FIG. 2 is a cross-sectional view showing an insulating layer manufactured by the conventional method shown in the figure. DESCRIPTION OF SYMBOLS 1...Ceramic board, 2...Metal wiring layer, 3゜4...Resist film, 6...Insulating paste, 7
...Edge portion, 8...Insulating layer, 9...Rubber squeegee, 10...Screen, A...Drop, B...Bulge, C...Gap. Agent: Susumu Uchihara, patent attorney Figure 1
Claims (1)
ストフィルムを貼り付ける第1の工程と、前記レジスト
フィルムを露光現像して前記セラミック基板の外周部で
あって前記メタル配線層と微小位を離隔して前記レジス
トフィルムを残し他の前記レジストフィルムを取り除く
第2の工程と、残された前記レジストフィルムに囲まれ
た前記セラミック基板の表面に絶縁ペーストをスクリー
ン印刷する第3の工程と、前記絶縁ペーストを乾燥する
第4の工程と、残された前記レジストフィルムを剥離す
る第5の工程と、前記絶縁ペーストを焼成して絶縁層を
形成する第6の工程とを含むことを特徴とするセラミッ
ク多層基板絶縁層製造方法。A first step of pasting a resist film on the surface of the ceramic substrate on which the metal wiring layer has been formed, and exposing and developing the resist film to separate the metal wiring layer from the outer periphery of the ceramic substrate by a minute distance. a second step of removing the other resist film while leaving the resist film; a third step of screen printing an insulating paste on the surface of the ceramic substrate surrounded by the remaining resist film; and a third step of screen printing the insulating paste. A ceramic multilayer substrate comprising a fourth step of drying, a fifth step of peeling off the remaining resist film, and a sixth step of firing the insulating paste to form an insulating layer. Insulating layer manufacturing method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25133388A JP2600335B2 (en) | 1988-10-04 | 1988-10-04 | Method for manufacturing insulating layer of ceramic multilayer substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25133388A JP2600335B2 (en) | 1988-10-04 | 1988-10-04 | Method for manufacturing insulating layer of ceramic multilayer substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0298193A true JPH0298193A (en) | 1990-04-10 |
| JP2600335B2 JP2600335B2 (en) | 1997-04-16 |
Family
ID=17221261
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25133388A Expired - Lifetime JP2600335B2 (en) | 1988-10-04 | 1988-10-04 | Method for manufacturing insulating layer of ceramic multilayer substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2600335B2 (en) |
-
1988
- 1988-10-04 JP JP25133388A patent/JP2600335B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JP2600335B2 (en) | 1997-04-16 |
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