JPH03112332A - System for coping with power interruption or recovery in power feeder - Google Patents

Abstract

PURPOSE:To cope quickly with power interruption or recovery by a method wherein a system is provided with an external memory medium, receiving the address and data of a processing program, to collect the condition data of the service interruption and/or recovery of service of a plurality of power supplying lines periodically and carry out the process to cope with the condition upon the service interruption and/or recovery of service, in the processing of the service interruption and/or recovery of the service, which is effected by a CPU. CONSTITUTION:A plurality of power supplying lines (a)-(B) are provided with detectors 1a-1d for service interruption and/or recovery of service respectively while a CPU 10 is provided with an external memory medium 20. The external memory medium 20 is provided with a data table, recording the conditions of the service interruption and/or recovery of service of the power supplying lines periodically, and the address of a processing program upon the service interruption and/or recovery of the service. The CPU 10 starts the processing program, accommodated in an internal memory 11, when the service interruption and/or the recovery of service is caused. Further, the memory 11 prepared various programs previously whereby the change of processing may be effected by simply correcting the data level of the external memory medium 20 without correcting any program when there is a change in the processing contents upon the service interruption and/or recovery of service.

Description

[Detailed Description of the Invention] [Summary] Individual power failure and recovery of multiple power supply lines is detected and the CPU T
:Regarding a response method that recognizes the situation and takes action in response to a specific power failure/recovery state using a processing program prepared in the internal memory, even if there is a change in the content of the response process at the time of power failure/return, the CPU Rather than modifying the program in the internal memory of
The purpose is to enable quick response by changing the processing only by modifying the data bits. The recording medium periodically collects power failure/recovery status data of individual lines from multiple power supply lines, always holds the status data of the previous and current two times in a table of fixed values, and stores each line and data. The bits are matched and captured as one word of data. For example, when a power outage occurs, the changes in the collected data from the previous time and this time are compared with the table data on the external storage medium to determine which line out of the entire line is in a power outage state. The system is configured to recognize each state and perform processing corresponding to each state.

[Industrial application field]

The present invention provides c
This relates to a correspondence method using PU control.

[Conventional technology]

As shown in FIG. 3, the conventional method for dealing with power failures and restorations of power supply lines is to use detectors 18 to 1d, such as relays, to detect power failure and restoration of multiple power supply lines a=d to buildings, for example. For example, in the case of a power outage, one line a out of all lines, two lines a,
The CPU 10 of the information management device recognizes whether there is a power outage in the room b or all lines a to d, and in response, a certain algorithm program prepared in the internal memory 11 is used to, for example, Measures were taken to respond to specific power outages, such as turning off lights and starting in-house power generation. In the case of power restoration, CPII similarly determines whether power has been restored to one line a out of all the lines, whether power has been restored to two lines a and b, etc.
10, and took measures corresponding to the specific power restoration using the corresponding program.

[Problem to be solved by the invention]

Therefore, in the conventional system, there was a problem in that every time there was a change in the corresponding processing algorithm prepared in the internal memory of the CPIJ 10, the system of the CPU 10 had to be stopped and the corresponding processing program had to be rewritten. The present invention allows the CPU to
Rather than modifying the program in the internal memory of the computer, the problem is to create a system for responding to power outages and restorations of power supply lines that allows for quick response and allows processing to be changed only by modifying the data level.

(Means for Solving the Problem) This problem consists of an external recording medium 20 that stores addresses and data for running the processing program in the internal memo of the CPU 10, as shown in FIG. , the external recording medium 20 periodically collects power failure/recovery status data of individual lines from a plurality of power supply lines a to d, and always stores the status data of the previous and current times in order to know the changes. Fixed value (e.g. hexadecimal number) IEX 0.1, 2.3--F
) table. Here, each line a=d is associated with a data bit. (For example, as 16 bits corresponding to 16 lines, set line a to 15, line 8 to 14, line C to 13, line d to 12, etc., and import it as word 716-bit data.) When a power outage occurs, the data collected last time and this time are compared with the table data on the external storage medium 20 to recognize which line out of the entire line is in a power outage state, and to perform processing corresponding to each state. This problem is solved by the present invention.

In the principle diagram of FIG. 1 showing the basic configuration of the system for responding to power failure and recovery of power supply lines of the present invention, 1a to 1d detect individual power failure and recovery states of a plurality of power supply lines a to d. It is a detector that

lO is each power supply line a of each output of the detectors 18 to 1d.
-CPU that processes power failure/recovery status signals of d, recognizes various power failure/recovery statuses, and controls external equipment in response to each status.
It is.

Reference numeral 11 denotes an internal memory containing a program for controlling the CPt 110.

Reference numeral 20 denotes an external storage medium that stores data for starting the built-in program in the internal memo January 1 as a table, and stores power failure/recovery status data of individual lines from a plurality of power supply lines a to d. To collect information regularly and to know about changes,
The state data for two times, the previous time and the current time, is always held in a table of constant values. Here, data bits are associated with each line a to d and taken in as one word of data.

For example, when a power outage occurs, the CPt 110 compares the collected data from the previous time and this time with the table data on the external storage medium 20, recognizes which lines among the total lines are in a power outage state, and adjusts the status to each one. Configure to perform corresponding processing.

[Effect]

The external storage medium 20 of the present invention includes a plurality of power supply lines ax
d, we regularly collect the status data of each individual line's power outage and recovery, and in order to know the changes, we always record the status data of the previous and current two times as a fixed value (for example, hexadecimal) 0.
1, 2.3...Keep in table F. Here, data bits are associated with each line a to d, for example, 16 bits correspond to 16 lines, line a corresponds to 15, line 5 corresponds to 14, line C corresponds to 13, line d corresponds to 12, etc. For example, one word of 716 bits of data is taken in, and a program stored in the internal memory 11 of the CPU 10 is started.

Therefore, the method of dealing with power supply line failure and recovery according to the present invention is as follows:
Even if there is a change in the content of the response process when power is restored, the CPU
Instead of modifying the program in the internal memory 11 of the power supply system 10, processing can be changed simply by modifying the data level of the external storage medium 20. The problem can be solved because it can be dealt with.

〔Example〕

The principle diagram of FIG. 1 directly shows the configuration of the system for responding to power failure and recovery of the power supply line according to the present invention, and has already been described in detail. FIG. 2 is an example of a data table of an external storage medium for explaining the operation of the embodiment of the present invention, and FIG.
-d and data bits, the number of data bits corresponding to 16 lines is 16 bits, and line a
15 corresponds to 3 lines to 14, line C corresponds to 13, line d corresponds to 12, etc., and the processing data of the program is as shown in Figure 2. 4 bits are grouped into hexadecimal HEX, ■word/16 bit. Read with HEX (7) O is X' 0
000', i is X'0001', F is X' 0O
It is retained and collected as a value OF'. In the example of FIG. 1, since 4 lines a=d, it corresponds to 15 to 12 bits, but the data is designed to correspond to 16 lines. For example, if there are 5 lines and all lines are blacked out, then X' 0OIF
' becomes. Figure (b) shows a matrix of 8 correspondences between the current/previous collected data and the address numbers of the executed processes, and shows multiple power supply lines a=d.
We regularly collect status data of power failure and recovery for each individual line, and in order to know the changes, we always collect the status data of the previous and current two times in hexadecimal HEX 0°1, 2-, -F. The collected data is maintained in a table with constant values of 0, 1.2,
・The correspondence between -F and the address number NO■■-00■[phase] of the execution process is shown. Then, if the address number of the execution process is No■■-■@■■-, then <,C
This corresponds to the number of the processing program in the internal memory 11 of the PU 10. And a series of data like this is shown in the same figure (
d)(d)4. (d)-2 and (d)-3, and relate them as shown by the arrows (link addresses), and (d)-3's activation pro number NO data is stored in 1 word/16 bit I(). It takes in data as 0, 1, 2-i of EX, and starts a processing program built in the internal memory 11 of CP[I 10.

As described above, the method for responding to power failure and recovery of the power supply line according to the present invention shown in FIG. 1 uses the matrix shown in FIG. 2(b) and the table ( d)1,
If various processing programs are prepared in advance as shown in (d)-3 based on the link address in (d)-2, even if the processing contents change, the internal memory 11 of the CPU 10
Processing can be changed by modifying the contents of table (d)-3 in the external storage medium 20 at the data level, rather than by modifying the processing program stored in the external storage medium 20.

Therefore, in response to the various demands of power supply system users,
There is no problem as we can respond quickly.

〔Effect of the invention〕

As explained above, according to the present invention, even if there is a change in the content of the response process when the power supply line is stopped and restored, the process can be changed by modifying the data level of the table in the external storage medium. Since it is possible to quickly respond to various requests from users of the power supply system, it is possible to reduce costs and man-hours associated with modification.

[Brief explanation of drawings]

Fig. 1 is a principle diagram showing the basic configuration of the system for responding to a power failure and recovery in a power supply line according to the present invention, and Figure 2 is a diagram showing a system for responding to a power failure and recovery in a power supply line according to an embodiment of the present invention. FIG. 3 is a block diagram of a conventional system for responding to a power failure/recovery of a power supply line. In the figure, 1a to 1d are detectors, 10 is a CPU, 11 is an internal memory, and 20 is an external storage medium. 1-1 Food HEX F → (α) Hyakko Izumi and Tee 16 hipato) (X'0001''n (X'000F') Tavit's pairing diagram

Claims (1)

[Claims] Detection of individual power failure and recovery of a plurality of power supply lines (a to d) (1
a to 1d), which is recognized by the CPU (10) and a corresponding processing program prepared in the internal memory (11) is used to take measures corresponding to a specific power failure/recovery state for the external equipment of the power load. The system comprises an external recording medium (20) that stores an address and data for activating a processing program in the internal memory (11) of the CPU, and the external recording medium is configured such that the detectors (1a to 1d) The status data of power outage and restoration is collected individually from multiple power supply lines (a to d) on a regular basis, and the status data for the previous and current two times is maintained in a table of fixed numbers, and each line (a to d) is ) and data bits, and capture it as one word of data.When a power outage occurs, the changes in the collected data from the previous time and this time are compared with the table data on the external recording medium to determine what is happening in the entire line. A method for responding to power supply line failures and restorations, characterized by recognizing whether the line is in a power failure/recovery state and performing processing corresponding to each state.