JPH03117945U

JPH03117945U -

Info

Publication number: JPH03117945U
Application number: JP2697190U
Authority: JP
Priority date: 1990-03-16
Filing date: 1990-03-16
Publication date: 1991-12-05

Description

[Brief explanation of drawings]

第１図は本考案のデイジタル位相同期ループの
全体構成の一実施例を示すブロツク図、第２図は
第１図の位相比較回路２の回路図、第３図は第１
図および第２図の実施例における主要信号の波形
図である。１……位相比較回路、２……ループフイルタ、
３……電圧制御発振器、４……基準入力信号、５
，６，７……出力、２１……デユーテイ比可変回
路、２２……インバータ、２３……第１のパルス
発振器、２４……第２のパルス発生器、２５……
ＲＳ型フリツプフロツプ。 FIG. 1 is a block diagram showing one embodiment of the overall configuration of the digital phase-locked loop of the present invention, FIG. 2 is a circuit diagram of the phase comparison circuit 2 shown in FIG. 1, and FIG.
FIG. 3 is a waveform diagram of main signals in the embodiment shown in FIG. 3 and FIG. 2; 1... Phase comparator circuit, 2... Loop filter,
3... Voltage controlled oscillator, 4... Reference input signal, 5
, 6, 7...output, 21...variable duty ratio circuit, 22...inverter, 23...first pulse oscillator, 24...second pulse generator, 25...
RS type flip-flop.

Claims

[Scope of utility model registration request]

In a digital phase-locked loop consisting of a phase comparison circuit that performs a phase comparison between a reference input signal and an output signal, a loop filter, and a voltage-controlled oscillator, the digital phase-locked loop that the voltage-controlled oscillator outputs is connected to the phase comparison circuit. a one-shot multivibrator type variable duty ratio circuit that receives the output of the digital synchronization loop and makes the duty ratio variable; a first pulse generator that generates a short pulse, and a second pulse generator that receives a signal whose polarity is inverted from the output of the variable duty circuit and generates a predetermined short pulse at the timing of the rise of the high level; , an RS type flip-flop which receives the outputs of the first pulse generator and the second pulse generator as input, generates a phase comparison output, and sends it to the loop filter.