JPH03121734U - - Google Patents
Info
- Publication number
- JPH03121734U JPH03121734U JP3121190U JP3121190U JPH03121734U JP H03121734 U JPH03121734 U JP H03121734U JP 3121190 U JP3121190 U JP 3121190U JP 3121190 U JP3121190 U JP 3121190U JP H03121734 U JPH03121734 U JP H03121734U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- output
- audio signal
- error
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012935 Averaging Methods 0.000 claims description 3
- 230000005236 sound signal Effects 0.000 claims 5
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Television Receiver Circuits (AREA)
- Circuits Of Receivers In General (AREA)
Description
第１図は本考案の第１の実施例のブロツク図、
第２図は本考案の第２の実施例のブロツク図、第
３図は本考案による誤り出力の平均値と音声出力
の関係の特性図、第４図は従来の誤り出力の平均
値と音声出力の関係の特性図である。
１……５．７２７２ＭＨｚの４相位相変調の復
調回路、２……ＰＣＭ信号処理回路、３……誤り
出力平均化回路、４……Ｄ／Ａコンバータ、５…
…ＶＣＡ、６……ＰＣＭデイジタル信号の誤りが
発生した期間のみに出力される出力信号、７……
デイジタル音声出力信号、８……電圧可変減衰器
。
FIG. 1 is a block diagram of the first embodiment of the present invention;
Figure 2 is a block diagram of the second embodiment of the present invention, Figure 3 is a characteristic diagram of the relationship between the average error output and audio output according to the invention, and Figure 4 is the conventional average error output and audio output. FIG. 3 is a characteristic diagram of the relationship between outputs. 1... 5.7272 MHz four-phase phase modulation demodulation circuit, 2... PCM signal processing circuit, 3... Error output averaging circuit, 4... D/A converter, 5...
...VCA, 6... Output signal that is output only during the period in which an error occurs in the PCM digital signal, 7...
Digital audio output signal, 8...Voltage variable attenuator.
Claims (1)
と、この復調回路の出力からデイジタル音声信号
を出力すると共にＰＣＭデイジタル信号に誤りを
発生した期間のみ誤り出力信号を出力するＰＣＭ
信号処理回路と、前記デイジタル音声信号をアナ
ログ音声信号に変換するＤ／Ａコンバータと、前
記誤り出力信号を平均化する誤り出力平均化回路
と、この誤り出力平均化回路の出力電圧により前
記アナログ音声信号の出力レベルを制御する電圧
可変制御回路とを備え、前記誤り出力信号のレベ
ルに対応して出力レベルが順次制御されるように
したことを特徴とする衛星放送受信機。 A demodulation circuit that demodulates the received four-phase phase modulation signal, and a PCM that outputs a digital audio signal from the output of this demodulation circuit and outputs an error output signal only during a period when an error occurs in the PCM digital signal.
a signal processing circuit, a D/A converter that converts the digital audio signal into an analog audio signal, an error output averaging circuit that averages the error output signal, and an output voltage of the error output averaging circuit that converts the analog audio signal into an analog audio signal. 1. A satellite broadcasting receiver comprising: a voltage variable control circuit for controlling a signal output level; and the output level is sequentially controlled in accordance with the level of the error output signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3121190U JPH03121734U (en) | 1990-03-27 | 1990-03-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3121190U JPH03121734U (en) | 1990-03-27 | 1990-03-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03121734U true JPH03121734U (en) | 1991-12-12 |
Family
ID=31533953
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3121190U Pending JPH03121734U (en) | 1990-03-27 | 1990-03-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03121734U (en) |
-
1990
- 1990-03-27 JP JP3121190U patent/JPH03121734U/ja active Pending