JPH03127946U - - Google Patents
Info
- Publication number
- JPH03127946U JPH03127946U JP3779190U JP3779190U JPH03127946U JP H03127946 U JPH03127946 U JP H03127946U JP 3779190 U JP3779190 U JP 3779190U JP 3779190 U JP3779190 U JP 3779190U JP H03127946 U JPH03127946 U JP H03127946U
- Authority
- JP
- Japan
- Prior art keywords
- input
- control device
- output control
- address
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Description
第１図はこの考案の一実施例である入出力制御
装置を示すブロツク構成図、第２図は従来の入出
力制御装置を示すブロツク構成図である。
図において、１…主記憶装置、２…中央処理装
置、３…メモリ・バス、４，５，６，１３…入出
力制御装置、７，８，９…独自の入出力制御装置
アドレスの格納部、１０，１１，１２…入出力装
置、１４，１５，１６…入出力制御装置が実装さ
れる物理的な位置で一義的に決まる入出力制御装
置アドレス格納部、１７…入出力制御装置アドレ
スを切り換えるためのテスト信号である。なお、
図中、同一符号は同一または相当部分を示す。
FIG. 1 is a block diagram showing an input/output control device which is an embodiment of this invention, and FIG. 2 is a block diagram showing a conventional input/output control device. In the figure, 1...main storage device, 2...central processing unit, 3...memory bus, 4, 5, 6, 13...input/output control device, 7, 8, 9...storage unit for unique input/output control device address. , 10, 11, 12...I/O device, 14, 15, 16...I/O control device address storage unit uniquely determined by the physical location where the I/O control device is mounted, 17...I/O control device address This is a test signal for switching. In addition,
In the drawings, the same reference numerals indicate the same or corresponding parts.
Claims (1)
装置アドレスにより、主記憶装置との間でデータ
の受け渡しを行なう入出力装置を選択する入出力
制御装置において、入出力制御装置が独自に有す
る入出力制御装置アドレスと、上記入出力制御装
置が実装されている物理的位置で決定される入出
力制御装置アドレスとを具備し、上記２種の入出
力制御装置アドレスのうち、いずれか一方を選択
する信号により入出力制御装置アドレスが決まる
ことを特徴とする入出力制御装置。 In an input/output control device that selects an input/output device that exchanges data with the main storage device based on an input/output control device address unique to the input/output control device, the input/output control device has a unique address. An input/output control device address, and an input/output control device address determined by the physical location where the input/output control device is installed, and one of the above two types of input/output control device addresses. An input/output control device characterized in that an input/output control device address is determined by a signal to be selected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3779190U JPH03127946U (en) | 1990-04-09 | 1990-04-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3779190U JPH03127946U (en) | 1990-04-09 | 1990-04-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03127946U true JPH03127946U (en) | 1991-12-24 |
Family
ID=31545222
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3779190U Pending JPH03127946U (en) | 1990-04-09 | 1990-04-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03127946U (en) |
-
1990
- 1990-04-09 JP JP3779190U patent/JPH03127946U/ja active Pending