JPH031497U - - Google Patents
Info
- Publication number
- JPH031497U JPH031497U JP5893789U JP5893789U JPH031497U JP H031497 U JPH031497 U JP H031497U JP 5893789 U JP5893789 U JP 5893789U JP 5893789 U JP5893789 U JP 5893789U JP H031497 U JPH031497 U JP H031497U
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- line
- coated
- layer
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims 3
- 239000011248 coating agent Substances 0.000 claims 2
- 238000000576 coating method Methods 0.000 claims 2
- 238000009413 insulation Methods 0.000 claims 1
- 230000005855 radiation Effects 0.000 claims 1
- 230000001629 suppression Effects 0.000 claims 1
Landscapes
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Structure Of Printed Boards (AREA)
Description
第１図は本考案の断面図である。
１……電源のマイナスライン、２……導電性ペ
ースト、３……電源のプラスライン、４……アン
ダーコートレジスト（絶縁層）、５……オーバー
コートレジスト、６……信号ライン。
FIG. 1 is a sectional view of the present invention. 1... Minus line of power supply, 2... Conductive paste, 3... Plus line of power supply, 4... Undercoat resist (insulating layer), 5... Overcoat resist, 6... Signal line.
Claims (1)
なり、信号パターンにより外部に不要な電磁波が
放射されるのを防止するシールド層を設けた基板
において、信号パターンにアンダーコートレジス
ト（絶縁層）をコーテイングし、この時部品実装
のランド部分と片面については電源のマイナスラ
イン１はそのままにし、また片面についてはラン
ド部分と電源のプラスライン３には絶縁層４をコ
ーテイングせず、片面については電源のマイナス
ライン１と同電位になるように導電性ペースト２
を電源のマイナスライン１から電源のマイナスラ
イン１まで信号層を覆うようにコーテイングし、
また片面については、電源のプラスライン３から
電源のプラスライン３まで信号層を覆うようにコ
ーテイングしたことを特徴とする放射ノイズ抑圧
塗布基板である。 The substrate is made of a conductive layer with signal patterns on both sides, and the signal pattern is coated with an undercoat resist (insulating layer) on the substrate with a shield layer that prevents unnecessary electromagnetic waves from being emitted to the outside. However, at this time, the negative line 1 of the power supply is left as is for the land part where the component is mounted and one side, and the insulation layer 4 is not coated on the land part and the positive line 3 of the power supply for one side, and the negative line 1 of the power supply is left as is for the one side. Conductive paste 2 so that it has the same potential as line 1.
Coating the signal layer from the negative line 1 of the power supply to the negative line 1 of the power supply,
Further, one side of the substrate is coated with a radiation noise suppression coating, which is coated so as to cover the signal layer from the positive line 3 of the power source to the positive line 3 of the power source.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5893789U JPH031497U (en) | 1989-05-22 | 1989-05-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5893789U JPH031497U (en) | 1989-05-22 | 1989-05-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH031497U true JPH031497U (en) | 1991-01-09 |
Family
ID=31584991
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5893789U Pending JPH031497U (en) | 1989-05-22 | 1989-05-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH031497U (en) |
-
1989
- 1989-05-22 JP JP5893789U patent/JPH031497U/ja active Pending
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