JPH0315439B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a step motor drive control system for a small electronic calculator equipped with an analog clock whose hands are driven by a step motor.

In analog watches that use step motors to drive hands, it is necessary to accurately generate motor drive signals that have a constant pulse width at a constant cycle due to the accuracy required of the watch. For this reason, even when an analog clock is incorporated into a small electronic calculator, a drive signal generation circuit for driving the step motor of the analog clock must be provided separately from other circuits, which increases costs and There was a problem that made miniaturization difficult.

The present invention has been made in view of the above points, and when an analog clock is incorporated into a small electronic calculator,
It is an object of the present invention to provide a step motor drive control system that can accurately drive a step motor without providing a drive signal generation circuit for independently driving the step motor, and that can reduce costs.

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a front view of the exterior, and numeral 1 indicates a key input section. This key input unit 1 includes a numeric keypad, a function key, and calculation mode C.
Mode switch 2 for switching between time set mode S and time display mode T, and time adjustment switch 3
a and 3b are provided. The time adjustment switch 3a is used to advance the time by one minute, and the switch 3b is used to delay the time by one minute. Further, 4 is an analog time display section, and 5 is a digital display section. This digital display section 5
displays calculation data or time data depending on the mode specification.

Next, the configuration of the internal circuit will be explained with reference to FIG. In FIG. 2, 11 is a pulse oscillator that generates a reference signal for timekeeping, and its output pulse is divided by a frequency dividing circuit 12 into a signal with a period of, for example, 1 second.
ROM (read-only memory) address section 1
Sent to 3. This ROM address section 13 specifies the address of the ROM 14 according to input data. Various microprograms are stored in the ROM 14, and address data AD for the RAM (random access memory) 15 is sent from output line a, numerical code CO is sent from output line b, and output line c is specified by addressing in the ROM address section 13. instruction IN, outputs its own next address NA from output line d. This next address NA is input to the ROM address section 13. Further, the numerical code CO output from the output line b of the ROM 14 is input to the input terminal b of the arithmetic circuit 16, and the instruction INS output from the output line c is input to the instruction decoder 17. This instruction decoder 17 decodes the input instruction INS, provides a read/write command R/W to the RAM 15, and gives an addition/subtraction command to the arithmetic circuit 16. As shown in FIG. 3, the RAM 15 includes various registers such as X, Y, and Z calculation registers, a C register for counting, and a T register for measuring the current time. The data read from the RAM 15 is then input to the input terminal a of the arithmetic circuit 16. Further, input data from the key input section 1 is given to this input terminal a. The calculation output of the calculation circuit 16 is sent to the RAM 15 and stored therein, and is also input to the decoder 18. Further, the arithmetic circuit 16 includes an internal judgment circuit for the result of the arithmetic operation.
It determines the presence or absence of data, the presence or absence of a carry signal, and inputs the determination results to the ROM address section 13. The decoder 18 decodes input data of, for example, "0" to "10", and its decoded output is input to AND circuits 19 ₀ to 19 ₁₀ . These AND circuits 19 ₀ to 19 ₁₀ are
Control signal from instruction decoder 17
Gated by GC. The outputs of the AND circuits 19 ₀ to 19 ₆ are inputted as sampling signals to the key input section 1 via the buffer 20. Moreover, the outputs of the AND circuits 19 ₇ to 19 ₁₀ are:
Step motor drive circuit 2 via buffer 21
2, and the step motor drive circuit 22 drives the analog clock step motor section 23. This step motor section 23 is, for example,
60 poles, 1 phase excitation type, analog time display section 4
The pointers 4a and 4b are driven.

Next, the operation of the above embodiment will be explained according to the flowchart shown in FIG. FIG. 4 shows the flow of key sampling and timekeeping processing. First, as shown in step _S1 , it is determined whether the contents of the _X0 digit of the X register in the RAM 15 is "0". The above X register is a numeric register that stores numeric data in the X ₁ to X ₁₅ digits and also stores the numeric data in the X ₀
The number flag is stored in the digit. This arbiter flag sets X ₀ when the arbiter operation is performed.
This is written in the digit, and it is determined in step _S1 whether or not a digit operation has been performed. If it is determined in step _S1 that the content of the _X0 digit is not "0", the process returns to step _S1 through the calculation flow shown in step _S2 . By going through the above calculation flow, the contents of the _X0 digit, that is, the arbiter flag is cleared. If it is determined in step _S1 that the content of the _X0 digit is "0", the process proceeds to step _S3 , where the _C0 digit of the C register in the RAM 15 is incremented by "+1". Then, in step _S4 , it is determined whether the content of the _C0 digit has reached "7" or not. If it has reached "7", the content of the _C0 digit is cleared in step _S5 and the process proceeds to step _S6 . , if it is less than "7", proceed directly to step _S6 . In step _S6 , the contents of the _C0 digit are read from the RAM 15 to the arithmetic circuit 16, and
It is given to the decoder 18 as it is. Also, at this time, the instruction decoder 17 outputs a gate control signal GC, which is applied to the AND circuits 19 ₀ to 19 ₁₀ . The decoder 18 decodes the C ₀ digit contents "0" to "6" supplied via the arithmetic circuit 16 and outputs the decoded contents to the buffer 20 via AND circuits 19 ₀ to 19 ₆ . The buffer 20 holds the input data and supplies it to the key input section 1 as a key sampling signal. At this time, if a key operation is performed on the key input section 1, the key input data is sent to the arithmetic circuit 16 in accordance with the key sampling signal and written into the X register of the RAM 15. Then, when the process of step _S6 above is finished, step S6 is completed.
Proceeding to _S7 , it is determined whether a 1 second signal is being output from the frequency dividing circuit 12. If the 1 second signal is not output at this time, the process returns to step _S1 , but
If the 1 second signal is output, proceed to step _S8 ,
"+1" is added to the _T0 digit of the timekeeping T register in the RAM 15, that is, the seconds information storage digit. When the content of T ₀ digit reaches "10" due to this "+1" operation,
Add "+1" to the T ₁ digit, that is, the upper digit for second memory (10 seconds unit digit), and clear the T ₀ digit. Next, the process proceeds to step _S9 , where it is determined whether or not the content of _{the 1-} digit T has reached "6". If it has not reached "6", that is, if there is no change in the minute unit time information, the time processing step S9 is performed. Proceeding to _{step 10} , if the time display mode is designated, display processing for the digital time, that is, the contents of the T register is sent to the digital display unit 5 to display the digital display time plus 1 second. Also, T ₁ in step S ₉ above
T ₂ if the content of the digit is determined to be "6"
The digit, that is, the minute information storage digit is incremented by "+1" to clear the _T1 digit and the process proceeds to step _S11 . In addition, T
In the register, carry processing for minute unit information, hour unit information, etc. is performed in the same manner as in the above case. However, in step _S11 above,
The contents of the C ₁ digit of the C register are read from the RAM 15 and input to the decoder 18 via the arithmetic circuit 16. Furthermore, in step _S12 , add "+1" to the contents of the C ₁ digit, and then proceed to step _S13 , where C1 is added _.
Determine whether the content of the digit has reached "11".
C If the content of ₁ digit reaches "11", go to step S ₁₄
After writing "7" into _{the first} digit of C, the process proceeds to time processing step _S10 , and if it is less than "11", the process directly proceeds to step _S10 . Step S ₁₃ or Step S ₁₄
When proceeding to time processing step _S10 , the gate control signal is sent from the instruction decoder 17.
Output GC and give it to AND circuits 19 ₀ to 19 ₁₀ ,
C The output of the decoder 18 for the content of _one digit is input to the buffer 21 via AND circuits 19 ₇ to 19 ₁₀ to drive the step motor drive circuit 22 .
In other words, when the content of C ₁ digit reaches "11", it is initialized to "7" in step _S14 , so "7" to
It is sent to the decoder 18 in the range of "10".
Therefore, the output of the decoder 18 is output from the AND circuit 19 ₇ ~
19 to ₁₀ , and its output is sent to the step motor drive circuit 22 via the buffer 21. This step motor drive circuit 22 drives the hands 4a and 4b of the analog time display section 4 to advance the displayed time by one minute.

Through the above processing, as shown in _FIG . This becomes the sampling signal for In addition, every time the timer T register measures one minute, the contents of the C ₁ digit of the C register are counted up in the range of "7" to "10", and the contents are decoded by the decoder 18 to be used in the step motor drive circuit. Sent to 22. and,
The step motor section 23 is driven by this step motor drive circuit 22, and the analog display time is set to 1.
You can proceed minute by minute.

Further, when the mode switch 2 is switched to the set mode S and the time adjustment switch 3a is operated, the contents of the T register are incremented by "+1 minute" and the analog display time is incremented by "+1 minute". Further, when the time adjustment switch 3b is operated, the contents of the T register are set to "-1 minute" and the analog display time is set to "-1 minute".

In the above embodiment, the time adjustment switch 3
By operating switches 3a and 3b, the digital display time and analog display time are adjusted one minute at a time, but if switches 3a and 3b are operated continuously, high-speed time adjustment is possible using clock pulses. It is also possible to do this.

As described above, according to the present invention, the key sampling signal generation circuit of the key input section of the small electronic calculator is used to obtain the drive signal for driving the step motor of the analog clock.
A step motor can be driven accurately with a simple circuit.
Moreover, it is possible to reduce costs.

[Brief explanation of drawings]

The drawings show one embodiment of the present invention, and Fig. 1 is an external front view, Fig. 2 is a circuit configuration diagram, Fig. 3 is a diagram showing the register configuration of the RAM in Fig. 2, and Fig. 4 is an operation diagram. FIG. 5 is a flowchart showing the contents and shows the generation states of sampling pulses and step motor drive signals. 1...Key input section, 2...Mode switch, 3
a, 3b... Time adjustment switch, 4... Analog time display section, 5... Digital display section, 11...
Pulse oscillator, 14...ROM (read only memory), 15...RAM (random access memory), 18...decoder, 20, 21...
...Buffer, 22...Step motor drive circuit.

Claims (1)

[Scope of Claims] 1. A step motor drive control method for a small electronic calculator equipped with an analog clock that drives a pointer with a step motor, which calculates a signal of a constant period and sequentially obtains different numerical data, It includes a data generation circuit that sequentially outputs this numerical data, and a decoder that decodes the numerical data output from this data generation circuit to generate a plurality of timing signals. A predetermined number of the timing signals are supplied as key sampling signals to the key input section of the small electronic calculator, and timing signals other than the predetermined number of timing signals among the plurality of timing signals are supplied to the step motor as drive signals. Step motor drive control system.