JPH03158954A - microcomputer system - Google Patents

Abstract

PURPOSE:To shorten time required for a DMA transfer between different boards by adding a command converter and an address converter to a system buffer of a computer board. CONSTITUTION:To a system buffer II 2B in a microcomputer board 10, a command converter 21 and an address converter 22 are added. Accordingly, at the time of executing a transfer from a memory 7 in the computer board 10 to a memory board 11 or in its reverse direction, a transfer destination address or a transfer origin address to the memory board 11 is generated by using the address converter 22, and by the command converter 21, data is written in the memory board 11 or the memory 7 in the computer board. In such a way, the time required for the DMA transfer between different boards can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microcomputer system, and particularly to a microcomputer system that performs DMA (direct memory access) transfer between boards.

[Prior Art] FIG. 3 shows the configuration of a microcomputer system that performs conventional inter-board DMA transfer.

This microcomputer system includes a microcomputer board 200. Memory board 210, controller board 220. It consists of a system bus 230. Of these, the microcomputer board 200 includes a system bus arbiter 201, a system bus buffer 202. Local bus arbiter 203. Microprocessor (MPU)
)204. Direct Memory Access Controller (DMAC)
)205. Local bus 206, memory 207. I10
The main component is device 208.

The local bus arbiter 203 communicates with the MPU 204 and the DMA
Performs bus arbitration between C205. Further, the system bus arbiter 201 performs bus arbitration between the microcomputer board 200 and the controller board 220.

In the above system, when data is transferred between boards, for example, when data is transferred from the memory board 210 to the computer board memory 207, the following procedure is used.

(8) The DMAC 205 connects the memory board 210 to the system bus 230. Batsuhua 202. local bus 206
1 word (8
(or 16 bits is common) data D1 is read (FIG. 4(A)).

(B) Next, the DMAC 205 writes the data in the register inside the DMAC 205 to the memory 207 via the local bus 206 (FIG. 4(B)).

This operation is performed for the address range specified in the register inside the DMAC 205. A time chart of this repetitive operation is shown in FIG.

[Problems to be Solved by the Invention] However, in the above-described conventional technology, no consideration is given to direct memory access (DMA) transfer between different boards.

That is, even when performing DMA transfer between different memories, the direct memory access controller DMAC must read data from the transfer source memory once, and then the DMAC must write this data to the transfer destination memory, which reduces the time required for DMA transfer. The problem was that it was long.

The purpose of the present invention is to solve the problems of the prior art described above,
To provide a microphone 17 computer system in which the time required for DMA transfer between different boards is short.

[Means for Solving the Problems 1] A microcomputer system of the present invention includes a memory board and a computer board, and in a microcomputer system in which these are connected by a system bus, the computer board includes a microprocessor MPU, a memory, and a direct memory. The access controller is composed of an access controller DMAC, a system bus buffer ■, a system bus buffer II, and a local bus buffer. In addition to the data buffer, the System Bus Buffer II includes a command converter that has the function of controlling continuous writing to memory based on commands from the DMAC, and a command converter that has the function of controlling continuous writing to the memory based on commands from the DMAC, and a command converter that has the function of controlling continuous writing to the memory based on commands from the DMAC. When performing a transfer from the memory on the computer board to the memory board, the MPU has an address converter with a function that can be changed. generates an address to the memory board using the address converter, writes data from the memory on the computer board to the memory board using the command converter, and also transfers data from the memory board to the memory on the computer board. At this time, the MPU gives an instruction to the DMAC to transfer data from a fictitious input/output device to the memory on the computer board, generates an address to the memory board using the address converter, and transfers the data from the memory board using the command converter. The configuration is such that data is written to the memory inside the computer board.

[Function] The system bus buffer on the microcomputer board is equipped with a command converter and an address converter, so that when transferring data from the computer board's internal memory to the memory board or vice versa, the memory A destination or source address to the board is generated using an address converter, and a command converter writes data to the memory board or to memory within the computer board. Therefore, the time required for DMA transfer between different boards can be significantly reduced.

Examples] An embodiment of the present invention will be described below with reference to FIG.

Similar to the prior art, the components of this microcomputer system include a microcomputer board 10, a memory board 11 . Controller board 12, system bus 13
It is. However, the microcomputer board 10
System bus arbiter 1, two system bus buffers 2A, 2B (system bus buffers I, II), local bus arbiter 3. It consists of a microprocessor (MPU) 4°, a direct memory access controller (DMAC) 5°, two local buses 6A and 6B (local buses I and ■), a memory 7, and an I10 device 8.

System bus buffer 2B (system bus buffer■)
is the command converter 21. Address converter 22
including. The command converter 21 and address converter 22 have the following functions in order to perform high-speed DMA transfer between memories.

That is, when the command from the DMAC 5 is "transfer between memory and I10 device" and the command from the MPU 4 is "high-speed DMA transfer between memories," the command converter 21 transfers data to the system bus 13. On the other hand, D
It has a function of inverting and outputting the signal (reading, writing) outputted by the MAC 5 to the memory 7. That is, if the memory 7 is a "read", a "write" is output to the system bus 13, and if the memory 7 is a "write", a "read" is output to the system bus 13.

Further, the address converter 22 has the following functions.

(^) The first is the function of setting an initial address for the memory board 11. That is, when data is transferred from the memory board 11 to the computer board memory 7, the initial address of the transfer source (memory board 11) is set. Further, in the case of the reverse direction, that is, when data is transferred from the computer board internal memory 7 to the memory board 11/\, the address of the transfer destination (memory board 11) is set. Address converter 72 where these are set
The internal register No. 2 is called the "initial address register."

(B) The second function is to output an initial address to the memory board 11. That is, if the command from the DMAC is "transfer between memory and I10 device" and the state is "inter-board high-speed DMA transfer", the memory board 11 previously set in the "initial address register"
Using the initial address for each transfer, the initial address is output to the memory board 11 as a "transfer source address" or "transfer destination address" according to each transfer direction described in (A) above.

Next, an example of high-speed DMA transfer of data from the memory board 11 to the computer board internal memory 7 will be shown.

0 (^) MPU 4 sends high-speed DM to command converter 21
Instruct to do A.

(B) The MPU 4 instructs the address converter 22 the initial address of the memory board 11 that is the transfer source (transfer source initial address).

(C) The MPU 4 instructs the DMAC 5 about the initial address (transfer destination address) of the memory 7 on the computer board, which is the transfer destination, and the number of words to be transferred, and also performs DMA transfer from the fictitious I10 device to the memory 7 on the computer board. instruct something.

(D) The MPU 4 outputs an instruction to start DMA to the DMAC 5.

(E) DMAC5 “writes” to local bus 6B
Outputs the signal and "forwarding address". This "write" signal is converted into a "read" signal by the command converter 21, as shown in (F) and (E) in FIG. 2, and the "transfer destination address" is converted to the "transfer source address" by the address converter 22. and output to the memory board 11 via the system bus 13, respectively. This causes the data D1 to be output to the memory board 111.

(At this time, the DMAC 5 outputs the write J signal and the transfer destination address J to the memory 7, so the data D1 output from the memory board 11 is shown in FIG. 2 (F).
As shown in (E), the data is written to the computer board memory 7 via the system bus buffer 2B.

(G) The operations of (F), (E), and (F) above are repeated for the number of words to be transferred. Note that the address converter 22 starts from a preset start address (initial address), and
The address changes for each transfer.

In this way, high-speed DMA transfer can be performed from the memory board 11 to the computer board internal memory 7 without reading or writing from the DMAC itself.

[Effects of the Invention] As described above, according to the present invention, during direct memory access (DMA) transfer between different boards,
This eliminates the need to directly import data into the memory access controller DMAC, as was the case in the past.
This makes it possible to operate at twice the speed compared to conventional methods.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a microcomputer system according to the present invention, FIG. 2 is a time chart diagram of inter-board DMA according to the present invention, FIG. 3 is a diagram showing a microcomputer system according to the prior art, and FIG. 4 is a diagram according to the prior art. FIG. 4 is a time chart diagram of inter-board DMA. In the figure, 1 is the system bus buffer, 2A is the system bus buffer I, 2B is the system bus buffer II, 3 is the local arbiter, 4 is the microprocessor MPU, 5 is the direct memory access controller DMAC16A is the local bus I, 6B is the local bus Bus II, 7 is the memory inside the computer board, 8 is the I10 device, 9 is the local bus buffer, 10 is the microcomputer board, 11 is the memory board, 12 is the controller board, 13 is the system bus, 21 is the command converter, 22 is the address Converter shown. 3 (F) (F) 475-

Claims (1)

[Claims] 1. In a microcomputer system including a memory board and a computer board, which are connected by a system bus, the computer board includes a microprocessor MPU, a memory, and a direct memory access controller D.
It is composed of MAC, system bus buffer I, system bus buffer II, and local bus buffer, and has a bus configuration in which the MPU accesses the memory board through the system bus buffer I, and the DMA AC accesses the memory board through the system bus buffer II. In addition to the data buffer, the system bus buffer II includes a command converter that has the function of controlling reading and writing to memory based on commands from the DMAC.
It includes an address converter that has a function of starting from a preset initial address and changing the address for each DMA transfer, and when performing a transfer from the memory on the computer board to the memory board, the MPU An instruction is given to the computer board to transfer data from the computer board's internal memory to a fictitious input/output device, the memory board generates an address using the address converter, and the command converter transfers data from the computer board's internal memory to the memory board. Also, when performing a transfer from the memory board to the memory on the computer board, the MPU instructs the DMAC to transfer from a fictitious input/output device to the memory on the computer board, and then sends the address converter to the memory board. 1. A microcomputer system characterized in that the command converter generates an address using the command converter and writes data from the memory board to a memory within the computer board.