JPH0316184A - Optical semiconductor device - Google Patents

Abstract

PURPOSE:To avoid a drop in a photocurrent and to reduce a dark current by a method wherein an amorphous semiconductor layer which is not doped with boron is formed between an electron capture electrode and an amorphous intrinsic semiconductor layer. CONSTITUTION:This device is formed by containing the following: an insulating substrate 11; a lower-part electrode 12; an undoped amorphous Si layer 13; an amorphous Si layer 14 doped with boron; and an upper-part electrode 15. A bias voltage is applied between the lower-part electrode 12 and the upper-part electrode 15. When light 16 is irradiated, an electron-hole pair is generated in the B-doped amorphous Si layer 14; electrons are collected in the lower-part electrode 12; on the other hand, holes are collected in the upper-part electrode 15; a photocurrent flows between both electrodes. Thereby, it is possible to obtain an amorphous photodiode which avoids a drop in the photocurrent and which reduces a dark current.

Description

[Detailed Description of the Invention] [Summary] Regarding an optical semiconductor device that generates electron/hole pairs in a semiconductor layer by incident light, more specifically, the semiconductor layer is made of an amorphous semiconductor (particularly silicon). With regard to amorphous photodiodes, the purpose is to avoid a drop in photocurrent and provide an amorphous photodiode with reduced dark current. An amorphous intrinsic semiconductor layer that generates pairs, and two electrodes sandwiching the semiconductor layer, an electrode that captures electrons and an electrode that captures holes, to which a bias voltage is applied to take out the generated charge. In the optical semiconductor device, an amorphous semiconductor layer not doped with boron is formed between the electron supplementary electrode and the amorphous intrinsic semiconductor layer.

[Industrial application field]

The present invention relates to an optical semiconductor device in which electron/hole pairs are generated in a semiconductor layer by incident light, and more particularly to an amorphous photodiode in which the semiconductor layer is made of an amorphous semiconductor (particularly silicon).

Amorphous photodiodes are used in video cameras.
It is used in CD image sensors, one-dimensional image sensors for facsimile and OCR, optical sensors, etc.

[Conventional technology]

An amorphous photodiode has a transparent electrode/amorphous silicon layer/metal electrode structure, and a bias voltage is applied to both electrodes to detect a charge signal of an electron/hole pair generated by an optical signal.

Since a bias voltage is applied to an amorphous photodiode during use, a dark current is generated even when no optical signal is input due to the injection of electrons or holes and the generation of electron/hole pairs due to thermal energy. Since the dark current causes noise to the light-receiving signal, it is required to reduce it as much as possible.

However, the amorphous Si layer of an amorphous photodiode is usually deposited by plasma CVD, but even if it is deposited without adding impurities, it exhibits n-type conductivity, so it is not necessary to bias it. When a voltage is applied, electrons are injected and a dark current is generated. In order to reduce the dark current due to this cause, it is necessary to compensate for the n-type conductivity by some method and make amorphous SiN an intrinsic semiconductor.

FIG. 7 is a schematic cross-sectional view showing the structure of a known amorphous photodiode. A lower electrode (electron trapping electrode) 2 of Aj2 is provided on the substrate 1, and an amorphous 3i layer 3 is deposited and formed thereon. The upper electrode (hole trapping electrode) 4 is a transparent electrode in order to transmit incident light, and an oxide of In and Sn (ITO) is commonly used. A p-type amorphous SiC layer 5 is provided between the upper electrode 4 and the amorphous Sl layer 3 to prevent these mutual reactions and to serve as a heterojunction barrier (for example, S,
KANEKO, et al: “Amorphous
Si : H Hetero) uncttoPhoto
diode and its Ap- plicati
on to a CompactScanner”,
Mat. Res, Sac, Symp. Proc. Vo1
, 49. 1985, pp. 423-428).

This amorphous SiC layer 5 has a low specific resistance, is transparent, and has a thin thickness (15 to 40 nm), and can be considered as a part of the upper electrode.

In order to suppress the dark current that occurs because the amorphous Si layer is n-type, p-type impurities are introduced to compensate for this.
The simplest treatment is to make it permanent. In accordance with this idea, when forming amorphous Si using the CVD method, impurities such as diborane are added to the source gas to make the deposited amorphous Sl layer 3 doped with boron (B) (for example, R, Miyagawa, et.
a1, ``8 New, Pre-Discharge
Baron Doping Method・、7
4-IEDM88, IBB Snake. pp. 74-77,
reference) .

[Problem to be solved by the invention]

When dealing with quantum physical properties, it is easy to understand amorphous semiconductors by considering the energy band model as in the case of single crystal semiconductors, but as the amount of B doped in amorphous Si increases, it becomes localized within the forbidden band. A unit is generated and acts as a recombination center for electron/hole pairs. Electronic/
Since the progress of recombination of hole pairs reduces the photocurrent, the generation of such localized levels (trap levels) is not preferable.

B doping to make amorphous Si intrinsic is usually carried out at a concentration of about 0.1 to 1 ppm, but this B concentration has both positive and negative effects: a decrease in dark current due to the conversion to intrinsic, and a decrease in photocurrent due to an increase in the generation of recombination centers. They were set with consideration to effectiveness, and in many cases they are unsatisfactory in all respects.

In general, when impurities are doped in a relatively large amount, they tend to pile up at the interface between different materials, and even in an amorphous photodiode, the B particles doped into the amorphous Si layer pile up at the interface with the electrode material, etc. When the B concentration profile of the amorphous photodiode was actually measured, a pile-up of B was observed in the region in contact with the lower electrode 2, as shown in FIG. Note that the boron concentration at the lower electrode 2 is approximately 1
It becomes constant at xlQ1atoms/cII1, but this part is the lower limit of the measuring device and does not actually contain boron. The reason why B pile-up occurs near the lower electrode is because the deposition rate of both S1 and B is unstable at the beginning of amorphous S1 deposition by CVD, and the deposition rate of B is relatively higher than that in a steady state. It is presumed that this is due to the fact that

If the B concentration increases above the set value, it goes without saying that the photocurrent will decrease due to recombination of electron/hole pairs.
It is thought that the dark current may even increase due to the occurrence of defects such as an increase in the number of terminal bonds, and the pile-up of B is greatly involved in the deterioration of device characteristics. Further, when the amorphous Si layer is doped with B, the film structure deteriorates, and the adhesion with the underlying layer decreases, which may deteriorate the photodiode characteristics. B doping in amorphous photodiodes thus remains an unresolved problem, and is basically
In a photodiode having a structure as shown in the figure, factors that degrade the photodiode characteristics are concentrated near the lower electrode.

An object of the present invention is to provide a structure that improves adhesion without increasing the number of recombination centers in an amorphous photodiode formed of amorphous S1 made intrinsic by B doping. The object of the present invention is to provide an amorphous photodiode with superior characteristics.

Another object of the present invention is to provide an amorphous photodiode with reduced dark current, avoiding a drop in photocurrent.

[Means for Solving the Problem] The above object is to provide an amorphous intrinsic semiconductor layer that generates electron/hole pairs by light doped with boron in an amount that makes it intrinsic, and two semiconductor layers sandwiching the semiconductor layer. In an optical semiconductor device comprising an electrode (a lower electrode and an upper electrode) to which a bias voltage is applied to take out the generated charge, an electron-trapping electrode and a hole-trapping electrode, an electron-trapping electrode ( This is achieved by an optical semiconductor device characterized in that an amorphous semiconductor layer not doped with boron is formed between a lower electrode) and an amorphous intrinsic semiconductor layer.

[For production]

In the amorphous photodiode having the above structure, the amorphous Sl layer that generates electron/hole pairs is made intrinsic by B doping, so that the dark current is reduced as in the conventional B-doped amorphous photodiode.

In addition, in conventional amorphous photodiodes, an amorphous Si layer that is not doped with B is additionally formed in the region where B is likely to pile up, so there is no problem caused by B pile-up. There is also no problem of adhesion between the amorphous 31 layer and the underlying layer due to doping.

In the present invention, when setting the B dove amount, there is no need to consider pile-up and adhesion problems, so the optimum value can be selected more freely.

〔Example〕

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in more detail by way of embodiments with reference to the accompanying drawings.

FIG. 1 is a schematic cross-sectional view of a basic amorphous photodiode according to the present invention, which includes an insulating substrate base layer 11, a lower electrode 12, a non-doped amorphous Si layer 13, and a boron-doped (Intrinsic) Amorphous Si
It includes a layer 14 and an upper electrode 15.

A bias voltage is applied between the lower electrode 12 and the upper electrode 15 (in this case, -V is applied to the upper electrode 15 to serve as a hole capturing electrode, and the lower electrode 12 is grounded to capture electrons). (supplementary electrode). When the light 16 is irradiated, electron/hole pairs are generated in the B-doped amorphous Si layer 14, and the electrons are collected in the lower electrode 12,
On the other hand, holes are collected at the upper electrode 15, and a photocurrent (signal) flows between the two electrodes.

A non-doped amorphous Si layer 13 and a B-doped amorphous Si layer 14 are successively deposited using a plasma CVD apparatus, and are made of diborane (a dopant material).
B. H6) Gas is not added when forming the non-doped layer 13, but is added when forming the B-doped layer 14. The thickness of the non-doped amorphous 81 layer 13 is 50 to 500 nm,
In particular, 200 to 400 nm is preferable.

Further, it is preferable that the total thickness of the non-doped amorphous Si layer and the B-doped amorphous layer is 1 to 3 μm; if it is thinner than this, the withstand voltage will be insufficient, while if it is too thick, the amorphous Si
The layers tend to peel off. Note that electron/hole pairs are also generated in the non-doped amorphous layer 13 by light irradiation.

Example 1 As shown in FIG. 2, an amorphous photodiode according to a first embodiment of the present invention includes a silicon (S1) single crystal substrate 21;
2 insulating layer 22; aluminum lower electrode 23 having a predetermined pattern shape; T formed on the surface of the lower electrode 23;
iN barrier layer 24; PSG insulating layer 25 insulating each of the lower electrodes 23; non-doped amorphous Sl layer 26 formed on the entire surface; B-doped intrinsic amorphous Si layer 27; p-type amorphous SiC layer 28; and The upper electrode is a transparent electrode? 29.

This amorphous photodiode is manufactured as follows.

First, the S1 single crystal substrate 21 is thermally oxidized to have a thickness of approximately 1 μm.
An iO2 layer 22 is formed. Instead of this Sl02 layer, C
The SiN layer or PSG layer may be formed by a VD method. Next, an aluminum layer (thickness: 200 nm) 23 is formed on the entire surface of the SI02 layer 22 by vacuum evaporation,
A TiN layer (thickness: 200 nn+) 24 is formed thereon by reactive sputtering. TiN layer 24
prevents the reaction between aluminum and amorphous silicon, and may be made of WSi, WN, W, etc.

Applying a resist (not shown) on the 'l'iN layer 24,
A resist pattern mask is formed by exposure and development, and the portion of the TiN layer not covered by the resist mask is etched away, and the portion of the aluminum layer underneath is also etched away. In this way, the predetermined pattern of the aluminum layer 23 and TiN layer 24 is formed as shown in FIG.
It is formed on the SiO2 layer 22.

A PSG layer 25 is formed over the entire surface by a CVD method, and an opening exposing the TiN layer 24 is provided in the PSG layer 23 by a known photolithography method. The opening at this time (
That is, the electrode surface area) is set to a size of, for example, 1 mm x 1 mm. In addition, in the case of a CCD image sensor, the size of the lower electrode (vixel electrode) is approximately 10J. ax
It is 10-.

Next, a non-doped amorphous Si layer 26 (thickness: 5
0, 100, 200, 400, 600 and 1
000r++n) is formed (deposited) on the entire surface using a plasma CVD apparatus.

For example, the CVD conditions are as follows.

Raw material gas: SiH+ (IOOSCCM) Pressure: I
Torr applied high frequency: 13. 56M}lz Applied power = 20W Substrate heating temperature: 280°C In the same CVD apparatus, amorphous Si was further deposited under the above conditions while adding diborane (82H6: 5ppm) gas diluted with hydrogen carrier gas to IOSCCM. Doped amorphous Sl layer 27 (thickness:
1000, 950, 900, 800, 600 and 400 nm). In this case,
Let the total thickness of the amorphous Si layers 26 and 27 be l, -
I have to. The boron content of the B-doped amorphous Si layer 27 is 3×10" atoms/cII1, making the amorphous S1 an intrinsic semiconductor. Note that in the case where there is no non-doped amorphous Si layer or when all the non-doped amorphous Si layers are In the case where there is no B-doped amorphous Si layer, the above-mentioned C
Amorphous Si is deposited under VD conditions.

Non-doped amorphous Si layer (thickness: 200 nm
) and on it a B-doped amorphous Si layer (thickness: 8
00 nm) was formed on the lower electrode, the boron concentration (content) distribution profile was as shown in FIG. 5, and no pile-up of boron concentration occurred. In addition, in Figure 3, the lower electrode is made of 1xlQ'' boron atoms.
/cut indicates that boron is contained, but this value is the lower limit of the measuring device and does not actually contain boron.

After forming the B-doped amorphous Si layer 27, the same C
Into the VD device, CH, gas (203 CCM) and 82 H. (1%) containing H2 gas (20SCCU) was added to form SiH4 (IOSCCM). CH4, B2H8
A p-type amorphous SiC layer 28 (thickness:
3Qnm) is continuously formed.

This SiC layer 28 forms a heterojunction barrier with the amorphous Si layer 27 to prevent injection of electrons from the IT○ transparent electrode layer 29, which will be described later, and improves the characteristics of the photodiode. Preventing reaction with layer 27. Since it is undesirable for SiC layer 28 to absorb light, its thickness is relatively thin.

Next, the IT○ transparent electrode layer 29 (thickness: 150 nm) is formed into a p-type amorphous SiC layer 2 by sputtering.
8. Shape all over the top. It is assumed that the SiC layer 28 and the transparent electrode 29 constitute an upper electrode. In this way, the amorphous ● photodiode shown in FIG. 2 is obtained.

A bias voltage was applied to the resulting amorphous photodiode (-5V applied to the ITO electrode 29 and the aluminum electrode 23 was grounded), the dark current was measured, and the fourth
The results shown in the figure were obtained. Also, 1 for the photodiode.
The photocurrent due to the generated electron/hole pairs was measured by irradiating green light of 50 lux, and the results shown in FIG. 4 were obtained.

As is clear from FIG. 4, the dark current becomes small when the thickness of the non-doped amorphous Si layer is in the range of 50 to 500 nm, and it is particularly preferable that the thickness is in the range of 200 to 400 nm. When the thickness of the non-doped amorphous Sl layer is 5Q nm or less, the photocurrent is small, and when it is 500 nm or more, the dark current increases.

Among the amorphous photodiodes obtained, (A
) All non-doped amorphous Si layer photodiode [Al in FIG. 4, (B) All B-doped amorphous Si layer photodiode [B in FIG. 4], and (C) Non-doped photodiode according to the present invention. For a photodiode [C in Figure 4] having an amorphous Si layer (thickness: 200 nm) and a B-doped amorphous Si layer (thickness: 800 nm) thereon, what is the bias applied voltage as a parameter? measure the dark current and photocurrent, and
The results shown in the figure were obtained.

As is clear from FIG. 5, the dark current is reduced by boron doping, and the dark current of the photodiode C of the present invention is the minimum. On the other hand, regarding the photocurrent characteristics, photodiode B, which is entirely doped with boron, has a low photocurrent;
The smaller the bias voltage is, the more it is reduced. In the photodiode of the present invention to which a non-doped amorphous Si layer is added, the photocurrent is the same as that of the non-doped photodiode A, and the addition of the non-doped Si layer eliminates the effect of boron on the deterioration of photocurrent characteristics.

Example 2 As shown in FIG. 6, an amorphous photodiode according to the second embodiment of the present invention can be used in a CCD image sensor (imaging device).

The basic structure of the CCD image sensor is a known one, and includes a p-type silicon single crystal substrate 31, a thick oxide (Si
n■) layer 32, thin oxide (Sl02) layer 33, vertical?
CD n-region 34, storage diode n-region 35,
The first polysilicon layer 36, the second polysilicon layer 37, the insulator (Sin or PSG) layer 38, the wiring layer (Af
layer) 39, an insulating planarization layer 40 and an amorphous photodiode. This photodiode is A
A lower electrode (pixel electrode) 42 consisting of an f layer and a TiN barrier layer, an undoped amorphous Si layer 43, a B-doped amorphous intrinsic Sl layer 44, and a p-type amorphous S
It consists of an iC layer 45 and a transparent upper electrode (ITO electrode) 46.

In this CCD image sensor, when light is irradiated, it is absorbed by the B-doped amorphous layer 44 and electron/hole pairs are generated. Since the ITO electrode 46 is set to the ground potential and +V is applied to the lower electrode 42, the holes are transferred to the IT
Electrons are collected at the O electrode 46, while electrons are collected at the lower electrode 42 and stored in the storage diode through the wiring layer 39. Then, signal charges (electrons) are transferred to the vertical CCD. By employing the amorphous photodiode according to the present invention, it is possible to reduce dark current, reduce noise, and obtain sufficient photocurrent, thereby improving the characteristics of an image sensor.

In the above explanation, the doping amount of the boron-doped amorphous Si layer is almost constant throughout its thickness, but the boron concentration profile is changed by gradually increasing the amount of B2H8 gas added to a predetermined value when forming the amorphous Si layer. may be tilted.

[Brief explanation of drawings]

FIG. 1 is a schematic cross-sectional view of a principle amorphous photodiode according to the present invention, FIG. 2 is a schematic cross-sectional view of an amorphous photodiode according to an embodiment of the present invention, and FIG. is non-doped amorphous S
4 is a graph showing the boron concentration distribution profile of an amorphous photodiode having an i-layer and a doped amorphous Si layer. FIG. FIG. 5 is a graph showing the relationship between the present invention and the conventional amorphous ? 6 is a graph showing the relationship between bias applied voltage and current characteristics of a photodiode, FIG. 6 is a schematic cross-sectional view of a CCD image sensor having an amorphous photodiode according to the present invention, and FIG. 7 is a graph showing a conventional amorphous photodiode. - A schematic cross-sectional view of a photodiode, and FIG. 8 is a graph showing the boron concentration distribution profile of a conventional amorphous photodiode with a doped amorphous Si layer. 11... Substrate, 12... Lower electrode, 1
3... Non-doped amorphous Sl layer, 14...
Boron-doped amorphous Sl layer, 15... Upper electrode, 16... Light, 21... 81 substrate,
22...SiO■ layer, 23...Al electrode, 24
... barrier layer, 26 ... non-doped amorphous Si layer, 27 ... boron-doped amorphous Sl layer,
28...p-type amorphous SiCFif, 29...
IT○Transparent electrode. Fig. 1 Schematic cross-sectional view of the amorphous photodiode of the present invention Fig. 2 0.5 1.0 1.5 Depth of amorphous S1 layer surface (PLm) C: Invention 15 14-3-2 -1 0 Bias applied voltage (V) Amorphous photodiode: Figure 5 showing the current characteristics of the main board Figure 4 Thickness of non-doped amorphous Si layer (μm) Figure 4 Cross-sectional view of solid-state sensor Figure 6

Claims (1)

[Scope of Claims] 1. An amorphous intrinsic semiconductor layer that generates electron/hole pairs by light doped with an amount of boron to make it intrinsic, and two electrodes sandwiching the semiconductor layer, In an optical semiconductor device comprising an electron-trapping electrode and a hole-trapping electrode to which a bias voltage is applied to take out the accumulated charge, boron is added between the electron-trapping electrode and the amorphous intrinsic semiconductor layer. An optical semiconductor device characterized in that an amorphous semiconductor layer not doped with is formed. 2. The electron supplementary electrode is a lower electrode formed on an insulating layer, and the hole supplementary electrode is an upper electrode formed on the amorphous intrinsic semiconductor layer. 1. The optical semiconductor device according to 1. 3. Claim 2, wherein the upper electrode is a transparent electrode layer, and further includes a thin p-type amorphous SiC layer between the transparent electrode and the amorphous intrinsic semiconductor layer. optical semiconductor devices. 4. The optical semiconductor device according to claim 1, wherein the non-doped amorphous semiconductor layer is amorphous silicon. 5. The non-doped amorphous semiconductor layer has a thickness of 50 to 5
5. The optical semiconductor device according to claim 4, wherein the optical semiconductor device has a thickness of 00 nm. 6. The amorphous intrinsic semiconductor layer has a boron content of 0.0.
2. The optical semiconductor device according to claim 1, wherein the optical semiconductor device is made of amorphous silicon with a concentration of 5 to 5 ppm.