JPH031682A - Picture recorder - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image recording device that records still images on an external recording device.

[Prior Art] An example of an image recording device is, for example, a digital still camera. Such still cameras generally use a memory element with a relatively slow writing speed as an external recording medium, and in order to increase the continuous shooting speed, multiple frame φ memories are installed in the camera body, and one While writing the stored image in the frame memory to an external recording medium,
A configuration in which photographed images are written in a separate frame memory has been proposed (for example, Patent Application Publication No. 6 of 1988).
No. 4485).

[Problem to be solved by the invention] However, in the above conventional example, in order to increase the continuous shooting speed, it is necessary to increase the number of frame memories in the camera body, which leads to an increase in the size of the circuit and cost information. Furthermore, as the total memory increases, power consumption also increases.

Therefore, it is an object of the present invention to provide an image recording device that eliminates such drawbacks.

[Means for Solving the Problems] An image recording device according to the present invention is an image recording device that records image information in an external recording device, and the external recording device is provided with compression means that can freely select a signal compression rate. A special feature characterized in that the set continuous recording speed information is sent to the compression means and the compression ratio of the compression means is controlled according to the recording speed. Even if the speed is increased, the writing speed of the external recording device to the recording medium can be kept low according to the compression ratio. This results in
A special large-capacity memory for continuous recording becomes unnecessary.

[Example] Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a block diagram of an embodiment of the present invention. In FIG. 1, 10 is the camera body, 12 is the camera body 1
This is an external memory pack that can be attached or detached from 0. External memory pack 12 is comprised of, for example, solid-state memory elements such as battery-backed SRAM, large-capacity DRAM with a slow write speed to reduce power consumption, and EEPROM that does not require battery backup but has a slow write speed. The write speed of each memory pack is 200 nsec/byte with battery-backed SRAM.
2μsec with low power consumption DRAM with battery backup
/byte, 31 μsec/byte in EEPROM
It is byte.

Furthermore, assuming that one screen consists of 512 x 480 pixels, the time required to write all the signals of one screen to the external memory pack 12 is 49m5ec with battery-backed SRAM, and with battery-backed low power consumption DR.
490m5ec in AM, 7 in EEPROM. ．．
It is 61 seconds.

In the camera body 10, 14 is a photographic lens, 15 is a diaphragm, and 16 is a shutter, which constitute a photographic optical system. 17 is a solid-state image sensor that converts an optical image produced by a photographing optical system into an electrical signal; 18 is an amplifier; 20 is an A/D converter that digitizes an analog signal; 22 is a timing control circuit; and 24 is a reference for the timing control circuit 22. This is an oscillation circuit that generates signals. 26 is a frame memory for temporarily storing photographed image signals, 28 is a memory control circuit for controlling the frame memory 26, and 30 is a frame memory 26.
A write address generation circuit 32 generates a write address signal, and a buffer 32 switches between writing and reading.

34 is a system control circuit that controls the entire illustrated device;
6 is a shutter switch that is linked to shutter button operation, 38.40 is a continuous shooting mode selection switch, 42 is a switch interface circuit, and 43 is a circuit for a write address signal of the write address generation circuit 30 and an external memory.
This is a switch that changes over the read address signal from the pack 12. 44 is a power supply circuit for the camera body 10.

Also, in the external memory pack 12, 46 is the address
Bus and lead signal switch, 48, camera body 10
from the power supply voltage supplied from the external memory pack 12
50 is a BCD-binary decoder for converting BCD data into binary data; 52 is for switching the direction of the data bus between shooting and play pack. A data buffer 54 is a compressor with a compression rate at (1/2 in this example), 55 is a compressor with a compression rate a2 (1/4 in this example), and 56 is a compressor with a compression rate a3 (1/2 in this example). 1/6), and 57 is a non-compressor that does not perform compression (ie, a compressor with a compression rate of zero). 58 is a switch for switching addresses, data, and write signals from the compressor 54, 55, 56 and non-compressor 57; 60 is a switch for SRAM, DRAM, and E;
This is a memory element such as an EPROM.

Next, the operation shown in FIG. 1 will be explained. When the shutter switch 36 is closed by pressing the shutter button, the system control circuit 34 controls the diaphragm 15 so that the optimum amount of light is incident on the image sensor 17, and uses a shutter speed setting device (not shown) to The shutter 16 is opened only for the set shutter time. The image sensor 17 converts an optical image produced by a photographing optical system into an electrical signal. This electrical signal is sequentially read out in synchronization with the timing signal from the timing control circuit 22, amplified by the 7-amplifier 18, and converted into, for example, an 8-bit digital signal by the A/D converter 20. The timing control circuit 22 appropriately frequency-divides the clock from the oscillator 24 to generate timing signals for each operation of the image sensor 17, A/D converter 20, and memory control circuit 28.

Simultaneously with closing shutter 16, system control circuit 40 drives signal EN low, activating buffer 32 and directing the output of A/D converter 20 to frame memory 26. The switch 43 is connected to the output side of the write address generation circuit 30 by the signal EN, and the frame memory 26 receives the address according to the write address signal of the write address generation circuit 30 in synchronization with the write signal W of the memory control circuit 28. The data from buffer 32 is written to. When a series of readings from the image sensor 17 is completed, the memory control circuit 28 sends a capture end signal to the system control circuit 34, notifying the frame memory 26 that the image has been captured. Note that when the capture of one screen into the frame memory 26 is completed, the write address generation circuit 30 stops its activity to reduce power consumption.

Next, the system control circuit 34 via the switch interface circuit 42 selects a snapshot mode selection switch 38.4.
It reads the state of 0 and generates control signals 5EL1.5EL2. With these control signals 5ELL and 5EL2, Table 1
The switches 46 and 58 are controlled as shown in FIG. It is assumed that the quick shooting speed can be selected from three types as shown in Table 1.

Explain the stop-motion mode. At this time, switch 38.
40 are both on. In the time-lapse mode, the shutter 16 opens and closes every time the shutter button is pressed, and the image signal from the image sensor 17 is temporarily stored in the frame memory 26 in the above-described procedure. After the loading into the frame memory 26 is completed, the system control circuit 34 sets the signal ■ to high, activates the switch 46.58, and outputs the control signals 5ELI (=1) and 5EL2 (=1). So, Table 1
The non-compressor 57 is selected as shown in FIG. That is, the address signal and read signal output from the non-compressor 57 are sent from the switch 46 to the camera body 10 side, so that the address bus and data bus of the frame memory 26 are connected to the non-compressor 57. , the address, data, and write signal on the data output side of the non-compressor 57 are connected to the storage element 60 via the switch 58. As a result, the image information stored in frame memory 26 is transferred to storage element 60 without compression. For example, when Daisha ffiDRAM is used as the storage element 60, memory packs with a capacity of about 2 Mbytes have been prototyped using current technology, and when uncompressed,
This memory pack can store eight images of 520 x 480 pixels.

The case of quick shooting will be explained. When switches 38 and 40 are both off, 4 frames per second, when switch 38 is on, switch 4
When 0 is off, the speed is 8 frames/second, and when the switch 38 is off and the switch 40 is on, the speed is 12 frames/second. The allowable time to store one image in an external memory pack is 250m5ec, and the external memory pack made of DRAM
A writing speed approximately twice as high as the writing speed of the pack 12, which is 490 m5ec, is required. Therefore, in this case, the compressor 54 reduces the amount of recorded information by half, shortening the writing time for each pixel into the external memory pack 12. Similarly, in the case of 8 frames/sec, the amount of written information is compressed to 1/4 by the compressor 55, and in the case of 12 frames/sec, the amount of written information is compressed to 1/6 by the compressor 56.

Table 1 During quick copying, it is sufficient to keep one of the compressors 54, 55, 56 active, so from the perspective of reducing power consumption, power is turned off to the unused compressors 54, 55, 56 and non-compressor 57. It is preferable to keep it shut off.

For example, the compressors 54, 55, and 56 are as follows. That is, the compressor 54
The compressor 55 performs 1/2 compression using a 4-bit subsampling table, the compressor 55 performs subsampling and 1/4 compression using a 4-bit DPCMffi subsampling table, and the compressor 56 converts the representative value of every 3 pixels into a 4-bit DPCM quantization table. Compress to 1/6.

When reading image information recorded in the external memory pack 12, the external memory pack 12 is removed from the camera body 10 and connected to a dedicated reading device. When connected to a reader, the acquisition signal goes high and the BCD-
The binary decoder 50 and switch 58 are turned off, and the data bus, address bus, and read signals of the storage element 60 are connected to the external connector portion of the external memory pack 12 to determine the addressing and read timing of the dedicated reader. Accordingly, data in the storage element 60 is read out.

In the read image information, information such as compression method, shutter speed, continuous shooting speed, etc. is always stored at a predetermined position at the beginning of the image information.

Furthermore, the configuration of the external recording device is also a major feature of this embodiment.

In the above embodiment, different compression processes are performed by selectively using a non-compressor and a plurality of compressors. The image compression rate (
Including uncompressed. ) may be switched. Further, as the storage element 60 of the external memory pack, other recording media such as a magnetic bubble memory, a magnetic disk, an optical disk, etc. can be used in addition to the above. Furthermore, although the case of DPCM has been described as a compression method, other methods such as vector quantization, block coding, and discrete cosine transform may be used.

Although the present invention has been described using an electronic still camera as an example, the present invention is not limited to this and can of course be applied to other image recording devices.

[Effects of the Invention] As can be easily understood from the above explanation, according to the present invention, continuous images can be recorded on a relatively low-speed external image recording medium without increasing memory capacity. Became.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention. 10: Camera body 12: External memory pack 14: Photographic lens 15: Aperture 16: Shutter 17: Solid-state image sensor 18: Amplifier 22/Timing control circuit 26
: Frame memory 28 Memory control circuit 30: Write address generation circuit 32: Buffer 34 System control circuit 36: Shutter switch 38, 40: Continuous shooting mode selection switch 46: Address bus/read signal switch 49: BCD-Binary Decoder 5
4, 55, 56: Compressor 57: Non-compressor 58; Storage element write address switcher 60: Storage element

Claims (1)

[Claims] An image recording device that records image information on an external recording device, wherein the external recording device is provided with a compression means that can freely select a signal compression rate, and the set continuous recording speed information is sent to the compression means, and the recording speed is An image recording apparatus characterized in that the compression ratio of the compression means is controlled according to the compression ratio.