JPH03171402A - Filter circuit - Google Patents

Abstract

PURPOSE:To select plural filter characteristics by selecting and controlling plural current generating means according to desired filter characteristics. CONSTITUTION:A filter circuit 5 has filter characteristics determined by time constants omega1, omega2...omegan and the current generating means 7A and 7B set time constants omegaA1, omegaA2...omegaAn or omegaB1, omegaB2...omegaBn of integrators GA1, GA2...GAn according to 1st or 2nd filter characteristics generated by the current generating means 7A or 7B. Namely, a selecting means 6 select currents IA1, IA2...IAn or IB1, IB2...IBn according to a control signal CNT and supplies them to the integrators GA1, GA2...GAn. Consequently, the 1st or 2nd filter characteristics can be selected.

Description

[Detailed description of the invention] The present invention will be explained in the following order.

A: Industrial field of application B: Outline of the invention C: Conventional technology D: The problem the invention aims to solve (Figure 4) E: Means for solving the problem (Figure 1) F: Effect (Figure 1) G Embodiment (Gl) Overall structure of DAT (Figure 3) (G2) Filter circuit of embodiment (Figures 1 and 2) (G3) Other embodiments H Effects of the invention A Industrial application FIELD The present invention relates to a filter circuit, and is suitable for application, for example, to a waveform equalization circuit for a reproduced signal obtained from a rotary head of a rotary head type digital audio tape recorder.

B Summary of the Invention The present invention provides a filter circuit that combines a plurality of integrators whose time constant changes depending on the supplied current.
By selecting the currents generated by the plurality of current generation means by the selection means and supplying them to the plurality of integrators, it is possible to selectively control the plurality of filter characteristics as a whole.

C. Prior Art Conventionally, a rotary head type digital audio tape recorder (hereinafter referred to as DAT) has been used as a magnetic recording/reproducing device capable of recording audio signals at high density.

In this DAT, human-powered audio data is recorded on a magnetic tape wrapped at a predetermined winding angle around the drum using a rotating head placed on a drum, or recorded audio data recorded on a magnetic tape is rotated. It is designed to be played using a head.

D Problems to be Solved by the Invention Generally, when reproducing digital data recorded on a magnetic tape such as DAT, 4j is used to correct the frequency characteristics of the reproduced signal read from the magnetic head. It is necessary to perform waveform equalization.

This waveform equalization circuit is made up of a filter circuit, and normally its waveform equalization characteristics, that is, the filter characteristics, are fixed. However, when a different type of magnetic tape is used such as DAT, or when When performing so-called reverse reproduction in which the signal is scanned and reproduced in the opposite direction, or when the readout rate of the reproduced signal is different, the frequency characteristics of the reproduced signal waveform are different, so multiple filter characteristics are set accordingly. It becomes necessary.

By the way, if filter circuits having a plurality of characteristics can be constructed on one integrated circuit, the usefulness of the DAT can be further improved, so it is conceivable to provide a plurality of filter circuits having the necessary characteristics.

That is, as shown in FIG. 4, for example, an amplified reproduction signal Sp obtained through a reproduction signal amplification circuit in an integrated circuit.
nlo is manually applied to three filter circuits IA, IB, and IC, resulting in the respective filter circuits 1A, 1B, and I
The equalized reproduced signal SPEI+ filtered by C is
The equalized reproduction signal SPRI+ is input to the first, second, and third input terminals a, b, and C of the internal changeover switch circuit 2, and is passed through the output terminal d and filtered by the necessary filter circuits IA, IB, and 1C. is sent.

In addition, each filter circuit IA, IB, IC has n semi-fixed resistors externally connected VRAI, ■RA2,...
..., VRA. ,VR,,,VRl,. ,...
..., VRo,,, VRo1, ■RC2, ...
By arbitrarily adjusting , VRc, , desired filter characteristics can be set.

However, in an integrated circuit having such a structure, filter circuits IA, 1B, and 1C are required as many as the number of required filter characteristics, and it is possible to avoid an increase in the size and complexity of the circuit as the number of required filter characteristics increases. However, it was still insufficient for practical use.

The present invention has been made in consideration of the above points, and aims to propose a filter circuit that can select and obtain a plurality of arbitrarily set filter characteristics with a simple structure.

? Means for Solving the Problems In order to solve the problems, in the present invention, time constants ω1, ω2, . . . depending on the supplied current II I2, . ·, a plurality of integrators GA. whose ω■ changes. , GA2 , ......, GA, and the time constant ω,, ω2, ...... as a whole.
In the filter circuit 5 having filter characteristics determined by , ω, a plurality of integrators GA, , C. A2...
..., GA,, time constants ωA1, ωA2, ...
・, ω Tsumugi or ω■1, ω6■, ..., ω,. The current rat is set separately according to the desired filter characteristics.
, IA2, ..., ■, ■ or TEI, ■6■,
......, multiple current sources that generate 18A, ISA2, ......, ISA,l or
ISBI, ISB■, ..., Is. , and a selection means 6 that selects and controls the plurality of current generation means 7A or 7B according to desired filter characteristics.

? A plurality of integrators GAGAz, .
..., GA,, each time constant ωA1, ω7■, ...
..., ω^7 or ωIl1, ωB2, ......, ω
Current IAI for setting B, l, 162,...
IAn or I. ,1112,...,TRn,
The first or second filter characteristic is selected by selecting the selection means 6 according to the control signal CNT and supplying it to the plurality of integrators GA, , GA2, . . . , GA, . It is possible.

G example An embodiment of the present invention will be described in detail below with reference to the drawings.

(Gl) Overall structure of DAT In FIG. 3, 10 indicates the overall structure of a rotating head type digital audio tape recorder (DAT), and the desired audio signal Ar)tit, ADOL
I7 is a rotary head 12A provided on the rotary tram 11.
．． 12B, it is possible to record and/or reproduce data on a magnetic tape 12 that is wound around the rotating tram 11 at predetermined angular intervals.

In this DATIO, first, during recording, the human audio signal AD. ll is input to the audio signal conversion channel 14.

The audio signal conversion circuit 14 has a low-pass filter and an analog-to-digital conversion circuit as a recording processing system, converts the input audio signal ADIN into digital data, and outputs the input digital data DTIN to the digital signal processing circuit 15. Send to recording processing system.

The recording processing system of the digital signal processing circuit I5 temporarily processes the input digital data DT, N as input audio data DTAD.
cess memory) is written to the memory circuit 16 of the structure.

The recording processing system of the daily signal processing circuit 15 includes an error correction code circuit, an interleave processing circuit, and 8-10.
It includes a modulation circuit, etc., and first the memory circuit 1.
The error correction code generation circuit reads out the input audio data DTAD written in the input audio data DTAD 6, generates an error correction parity, and then writes the error correction parity into the memory circuit 16.

For writing and reading processing to and from the memory circuit 16, addresses corresponding to data interleaving generated in the interleaving processing circuit are selected, and in this way, the input audio data DT, . 8-10 modulation circuit reads out.

8-]O modulation circuit receives manual audio data DT.8-bit data. ．． is converted into 10-bit data suitable for magnetic recording by the rotary heads 12A and 12B, as well as a synchronization signal, an address signal, a subcode signal, A.T.
F (automatic track follow
ing) signals etc. are added.

The recording processing system of the digital signal processing circuit 15 converts the recorded data thus obtained into a recording signal SRFooC made of serial data in an internal serial-to-parallel conversion circuit, and outputs the recorded data to the recording/reproducing amplifier circuit 1.
7 is sent to the recording processing system.

The recording processing system of the recording/reproduction amplification circuit 17 is composed of a recording signal amplification circuit, a rotary lance, etc., and amplifies the manually inputted recording signal SRECO, and transfers the resulting amplified recording signal SRPCI to the rotary transformer. 2 A, 12
B and thus a given record I of the magnetic tape 13
- The input audio signal ADIN can be recorded on the rack.

Here, this DAT]Oa is the operation data D input from the human power/display circuit 1 to the system control circuit 19 having a microcomputer configuration. , R, the recording operation or the reproduction operation is selectively controlled.

This human power/display circuit 18 includes, for example, a microcomputer having a keypad as an operator input means,
The display panel is equipped with a display panel having a liquid crystal display element as a display means, and is operated in response to the user's operations on the 10 operators. 1.1,
Display data D input from one system control circuit. ．． , is displayed on the display panel.

The system control circuit 19 also receives system information set in advance during recording and operation data D input from the input/display circuit 18 . PR 4 bases, mechanical control data I:
h+c {A processing control take DCQIIT and surho processing control data D, l1 are generated and sent to the mechanical control circuit 20, the statistical signal processing circuit 15, and the servo processing circuit 21 respectively.

Actually, when recording the servo processing circuit 21, the system ■) Old 1
■Ichiho processing control deck 1], 8 that is manually powered from one flower
Based on the drum motor 22, capstan motor 2
3. A dome acclimatization signal C to each reel motor 24.

Cab scan drive signal C, 1. , reel drive signal CR
M is sent out, the rotary tram 11 is driven to rotate at a predetermined number of rotations, and the magnetic tape 13 is run at a predetermined speed.

Also, at this time, from the drum motor 22, capstan motor 23 and reel motor 24,
j P G+1 l+, ]・UM frequency signal FC, I.
．． Capstan frequency signal FG c p and reel frequency signal qFc. Mka, zo / 1, zo power Lee 1 Ko N:
i? r'. 'ICl is fitted, thereby creating a velocity and/or phase servo, respectively.

In addition, ri-7I Kodokoro 11 riTl H? H2+
L: Niha, Tei i; Yu/L/j,': No. processing concave road 1
From 5 to the internal group at the time of the bell! 111 signal I) R1, . is supplied, and the internal reference signal D. , F, execute speed servo processing and/or phase servo processing based on 1
The concave rotary heads 12A, 12 are controlled based on the Ram phase signal J) Go++ and the j.Ram FM1 wave number signal FGDR6.
Send the switching reference signal s w p of B to the statistical signal processing circuit A circuit 15.

The mechanical control circuit 20 also controls the loading mechanism of the cassette 1 of the DAT 1 and the tape loading mechanism of the magnetic tape 13 based on mechanical control data DM input from the system 1 and the control circuit 9. etc., and based on the sensor information f [as+c input from the mechanical mechanism part, the mechanical emotion B part ■
),,. , and sends it to one system control path.

Here, in this DATIO, when playing, first
-Is the processing circuit 1 21 the system control circuit 19? , human power, processing system 11l1 theta Ds++ 7 gate rotation number and digital signal processing four commands 15 r. {
In the phase synchronized with the internal reference signal D R1F during playback, the tiger 1 and the moke 22 are driven IjiJψ and 7 to form a velocity −IJ−H and a phase servo.

In this state, the reproduction signal sp. obtained from the rotary heads 128, 12B. o is a rotary lance, a reproduction signal amplification circuit, a waveform equalization circuit, and a reproduction processing system of a recording and reproduction amplifier circuit 17 including a rotary lance, a reproduction signal amplification circuit, a waveform equalization circuit, and a recording and reproduction amplification circuit 17. Cape system and I ~ racking control path 256 {J (supplied).

In the case of this nA′Fl(), 1・ragging control same name 2
For example, 5 is designed to carry out the ATF method, 6 trades, and 1 racking system.

Zut1' We, 1. Racking control record 2 5 Dj
, has a waveform equalization concave path for synchronizing signal detection, and detects the same jtJl signal contained in the input reproduced signal SPRI7, and as a result, the same jtJl signal is obtained. A T + = "Sign 7; Otsu, 2 k, then A'1", which is obtained based on the timing of the LII signal, is generated, and this is generated as Saho Juri Doro 21 Send to.

As a result, the Leeho processing concave path 21 receives the ▲TF control signal%
E, C. 1, corresponding to 7, -1-Yapstantheta 2
3 to control egg movement, and thus 7, rI1 rotation = TS L"l
2 A, 12B are 6B tape] Recording rack of 3
ATF to be able to race 2 to i'Flifl1
A surf loop is formed.

In this way, when the recording track of the magnetic tape 113 is reproduced accurately, the repopulation processing system of the digital signal processing and reproducing unit 15 receives the manually input reproduction signal Sr+z6 and starts reproduction processing.

The reproduction processing system of this digital signal processing circuit 15 is P
l. ．． L (phase locked loop)
Clock recovery circuit, 10-8 demodulation circuit, error detection and correction circuit, deinterleave processing circuit, interpolation rl8'l
First, the clock regeneration circuit ↓ detects the regenerated clock included in the raw signal SPll.

In the In-8 demodulation circuit, the reproduced signal Sl'Rl Nakaotoko same 1! When the J1 signal is detected, the regenerated signal S PRI is generated based on the clock regeneration circuit detected by the clock regeneration circuit.
O) ] (1 hit 1 minute is demodulated by 1.0-8, and the resulting 8 hit l data is reproduced as audio data DTA
．． As such, it is written to the 1116th memory ll1'81G.

In this way, the data is written into the memory path 16 and the data is written into the memory path 16.
゛,, ll4;J: , , ;ri error detection and correction IF same path C is read out, detects the presence or absence of data curse, and performs error correction processing using error correction parity for data errors. The error-corrected data and the correction results are written to the memory circuit 16.

For all write and read processing to and from this memory circuit 166, addresses corresponding to theta deinterleave generated by the deinterleave processing circuit are selected, and the reproduced audio data DTA after error detection and correction processing is performed.
The interpolation circuit reads out the data that could not be error-corrected in the interpolation circuit, performs a compensation operation by calculating the average value of the previous and subsequent data, etc., and uses this as the reproduced digital. The data I) is sent to the reproduction processing system of the audio signal conversion circuit l4 as data I)To, .

The reproduction processing system of the audio signal conversion circuit I4 includes a digital-to-analog conversion circuit and a low-pass filter, converts the reproduced digital data I')T''our into an analog signal, and converts this into an analog signal as the reproduced audio signal ADOUT. Send.

Thus, the recording 1/rack on the magnetic table 13 is read out by the rotating heads 12A, 1213 on the rotating tram 1,
The recorded data recorded on the magnetic tape 13 is reproduced to obtain a reproduced audio signal ADoIIT.

(G2) Filter circuit of the embodiment In FIG. 1, numeral 5 designates a filter circuit constituting a waveform equalization circuit included in the recording/reproduction amplification circuit 17, which manually inputs the amplified reproduction signal SPBI. Equalized reproduction by filtering the waveform with predetermined filter characteristics? No. S, ■. Output 11.

Note that this amplified reproduction signal SrRI. is the rotating head 12
A and 12B are used to input the reproduction signal SPllo read from the magnetic tape 13 to the reproduction processing system of the recording and reproduction amplification circuit 17, and the reproduction signal SPllo is amplified through the reproduction signal amplification circuit.

This filter circuit 5 is arranged as a whole in one integrated circuit, and is a so-called Gilhart amplifier (U.S. Pat. No. 3,676
, 789). G A 2
, ..., GA, is depicted as a state variable circuit consisting of a combination of n pieces, and each {lr divider GA
+, GA2, . . . , GAゎ, each of the six integrators GA. ,G
A2,..., GA7 time constant ω,, ω2,...
..., ω. is set arbitrarily, thereby obtaining desired filter characteristics as a whole.

In addition, each integrator GAGA2 of this filter circuit 5,
..., GA, selects 17 from the first or second current generation stage 7A or 7B through the selection stage 6? Generally, the first or second current IAI, IA2, . . .
・IA,, or l+++, 1, l2, ..., ll
]2, is supplied.

This lth current generation stage 7▲ is composed of n semi-fixed current sources I
It is composed of SAI, lsA2, ..., ■SAゎ, and the first current sent from each + AI, I
A2, ..., IA. , is each integrator GA. , GΔ,
, . . . , GA, are set to current values determined by predetermined time constants ωAl, ωI12, .

Similarly, the second current generating means 7B also generates n semi-fixed currents 6+s. ,,Is. ■, ..., Is. A second current I. , IB2, . . . IB, , each integrator GA, GA2, . ,ω■2,・・・・・・
, ωBn are set to the selected current values.

Note that the i'A Sawasen stages 6 are each integrator GAGA2.
,..., input terminals a1 and a2 connected to GAn
,...,, for l7, the semi-fixed current of each of the first and second current generating means 7A and 7B -18/FAISA1, ISA2,..., ISA+1
and IS. ,S1,,... Is. . The first output connected to 31, +: J1ib, , b2, -==・
,■),, and the second output terminal cl, cl,...
, c, , and the first
Or the second output terminal b1, b2,..., bゎ or c
1, c2, . . . , c, .

As a result, in the case of this filter circuit 5, if the selection means 6 is switched and controlled by the control signal C N T from outside the integrated circuit, the first filter characteristic of the filter circuit 5 is set.
or the first determined by the second current generating means 7A or 7B.
Alternatively, the second filter characteristic can be set.

Here, in the case of this embodiment, the selection means 6, the first and second
The current generating stages 7A and 7B have an integrated circuit configuration, and as shown in FIG. It is composed of

That is, in the first current source circuit section 8A, the control signal CNT input to the l-th control terminal CA is applied to the switching NPN type 1-transistor Q. whose collector is connected to the power supply V, C. A, is applied to the head of A.

This 1. Rannsuk Q. A. The "nimeter" is composed of n{capacitor current generating PNP type transistors Q, 1, QA7, .
. . . is connected in common to the bases of QA, , and the collector is connected to the power supply VCC. (
For voltage generation to which quasi-voltage VREFA is applied N I) N
It is connected to the vines of Type 1 Runcistors Q and A2, and is further connected to the ground GND through a constant current aIA.

These current generating transistors QA1, QA2,...
...The emitters of Q,,, have electric current 'ti. n semi-fixed resistors VRA. ,■RA7,
. . .VRA,, are connected to each other, and the collectors of the transistors QA1, QA2, . . . . is connected to the collector of Q1.

In addition, each 1 Runcistor Q1, Q2,...
Q. ? , NPN type transistor Q, 2, Q22,...
. . Ql12, the first and second 1-run transistors Q. and Q,■,Q21 and Q22
, . . . , the collectors of Q0 and Q,,2 are commonly connected to the earth GND.

As a result, the first 1-transistor Q. ,Q2l,...
..., the collector current of Q0 is turned back, and the resulting second transistor Q, ■, Q2■, ...
The collector current of Q02 is the output current 11,■,,...
. . 1, respectively, the corresponding integrator GAl. of the filter circuit 5. ．． GA2, ..., are supplied to GAn.

Further, the second current source circuit section 8B is also the same as the first current source circuit section 8A.
The inverted control signal ICNT obtained by inverting the control signal CNT is transmitted through the second control terminal CB to a switching NPN whose collector is connected to the power supply VCC.
type transistor QsB.

21? 1. The emitter of transistor Q,
, and the collector is connected to the power supply Vc.
NPN type 1 Landisk Q562 for voltage generation with which C4 is connected and a predetermined reference voltage V REFH is applied to the heath.
It is further connected to the ground GND through a constant current source IB.

This current generating transistor Q. 1,Qll2,...
...QBn's plant ivy has electric power tAV c
n semi-fixed resistors VR+++ externally connected through c,
VRB ■, ..., VR. , are connected, and each transistor QI]l1QB,,...,QE
, , are the NPN of the current output circuit section 9, respectively.
Type I transistors QQ21, . . . are connected to the collectors of Q1.

In the above structure, for example, the control signal CNT input to the first control terminal CA has a logic "I1" level, and the second control signal CNT has a logic "I1" level.
When the inverted control signal ICNT input to the control terminal CB of the circuit 6 is supplied to the control terminal CB, the switching transistor Q is first inputted to the first current source circuit section 8A. 1
turns off, resulting in voltage generation ff4 + - Funjistor Q5A2 - -
power source, and a transistor Q for current generation. ,, Q,2
, . . . each emitter potential of QAo becomes approximately the same potential.

As a result of this, the occurrence of ``Kawa I. Rannosta c = A.''
The collector of Qo, , QA, has the following formula? The expressed collector currents IA1, IA■, ...
IAn is generated, which passes through the current output circuit section 9,
Assuming that the output currents I1, I2, . . . , 1ゎ, the corresponding integrators GA. , GA2 ,...
...CA. is supplied to

? = On the other hand, at this time, in the second Denryu #same road section 8B6, Switzchink River I, Lansosta Q, . works on,
1. Lancista Q, II l's ``Recta electric sacrilege'' is played.

Therefore, 1-Ransisk Qo, 1 emink? a: {p
and one run source QRl. for current generation. Qll■,...
..., QIl,, is brought to the same potential as the power supply VC, and as a result, the transistor QH1 for generating the current σf
, Q, 2, ......The emitter potential of QRo is also the power supply V.
Current generation transistors Q, 1, and Q6 should be at the same potential as CC. ,..., Q o. -1 shi・
Kuku'l'. ．． ．． Flow 11, IB ■, ... IBn
is kept in a state where it does not flow.

In this way, in the case of this embodiment, the control signal CNT having the logic "H" level is inputted to the first control terminal CA, and the counter control signal CNT having the logic rLJ level is input to the second control terminal CA. By shifting the input to CI3, the voltage value of the reference lightning pressure VREFA and the semi-fixed resistance ■RA are determined based on equation (1).
l, VRA2,..., VRAo's Gigoku, respectively n, determined'1 {style IAI, 1, 2,...
- lAn to the corresponding integrator G? of the filter circuit 5? ．． ,
GA2. ．．・・・・・・You can make an offering to GA.

Here, the semi-fixed resistances VR, , VRA■, ...
...vpA, 0)F [the resistance value is for each integrator CAl. GA2
,..., GAゎ is set to a predetermined time constant ω. corresponding to the first filter characteristic. ,, ωA2, ......, the current value set for ωAn is selected to be a value that can be transmitted, and thus the filter circuit 5 can be controlled to have the first filter characteristic by the control signal CNT. Can be done.

In response to this, the first control terminal C/l is input;
1 ri {. ;'i';3 C N 'F is logic 1'
The inverted control signal I CNT input to the second control terminal CB6 has a logic r H J l/
When the switching transistor Q, 8 . is turned off, and as a result, voltage generation circuits 1 to LANSISTOR Q. iRZ's potential and current source '-1-: transistor Q.
, QH2, . . . , Q■ are approximately at the same potential.

, and two for current generation 1/Runsistor Q. ,QI12
, . ,+112,...
..., IBn is generated, which passes through the current output circuit section 9 and outputs currents l1, I2, ......T, as
The corresponding integrators GA, , GA . ,
...GA,, will be jointly provided.

On the other hand, at this time, in the first current source circuit section 8A, the switching transistors Q, . A. turns on, transistor QSA. A current flows through the current.

Hence transistor Q5. , and the emitter potential of 26 ? Flow generation I/Runcistor QA,, QA■,...
, Qaゎ base potential is the power supply V. As a result, the current generating transistors Q, 1 and Qt. ■,
Q. By setting the emitter potential to the same potential as the power supply VCC, the current generation transistors QA1, QB,
......, QA,, collector currents 141, 111
2,...I,. is kept in a state where it does not flow.

Thus, in this embodiment, U7 has logic 1-L.
A system consisting of 1 level'4ffll{. Input Y ENT to the first control terminal CA (., logic "}]"
, the inverted control signal ICN'P consisting of
36 By manually adjusting the voltage value of the reference voltage VREF[1 and the semi-fixed resistance VRHI, V
The currents 1■, I, l■, ......, IB are determined by the resistance values of RB■, ..., VRH,, respectively.
n to the corresponding integrators GA1, GA2, of the filter circuit 5,
. . . can be supplied to GA.

Here, the semi-fixed resistances V R B l, V R R
2,...VRB. The resistance value of each integrator GA,
, GA2, ..., GA, as a predetermined value corresponding to the second filter characteristics. Time constant ωBl, ω8■, ..., ωR
The value is selected to be able to send out the current value set to n,
Thus, the control signal CN. T and inverted control signal ICNT
4, it is possible to control the filter circuit 5 to have the second filter characteristic.

According to the above structure, the supply current 1. I. ,...
, I,, the time constants ω1, ω2,...
ω． A plurality of integrators GA. ．． G.A. ,...
..., GA, are combined to create a filter with the same path 5.
In this case, a plurality of integrators GA, , GA2, . Each time constant of GA, ω,1, ωA2, ..., ωAゎ or ω1,
ω82, ..., ω. Set the current 'AI'lA
2,..., Ding An or l1, 182,...
. . , 1l+,, is selected by the selection means 6 according to the control signal CN'F to select a plurality of integrators GA, , GA2, .
By supplying the power to ..., GA,,
A filter circuit 5 that selects and operates the first or second filter characteristic according to the control signal CNT can be realized with a simple configuration that can be placed in one integrated circuit.

(G3) Other embodiments fl) In the above embodiment, a case was described in which the selection means selects the current sent out from two current generation means and supplies it to a plurality of integrators. The number is not limited to this, and three or more may be provided depending on the number of filter characteristics to be selectively controlled l1, and one of these may be selected and supplied to a plurality of integrators.

(2) In the above-described embodiment, the present invention was applied to a rotary head type digital audio tape recorder. However, the present invention is not limited to this, and the present invention is not limited to this. It can be widely applied to equalization isomorphism, and ISR can be applied to six waveform equalization circuits.
However, it is suitable for wide application to various filter circuits.

1-1 Effects of the Invention According to the present invention, as mentioned above, is there a current that can be supplied? 9 In a filter circuit configured by combining a plurality of integrators whose time constants change according to By selecting the current by the selection means and supplying the selected current to the plurality of integrators, it is possible to realize a filter circuit that can selectively control a plurality of filter characteristics as a whole with a simple structure.

[Brief Description of the Drawings] Fig. 1 is a block diagram showing an embodiment of the filter circuit according to the present invention, Fig. 2 is a connection diagram showing connections on the integrated circuit, and Fig. 3 is a rotary head type digital audio tape. FIG. 4 is a block diagram showing the overall structure of the recorder, and FIG. 4 is a block diagram showing a conventional filter circuit. 5... Filter circuit, 6... Selection means, 7A, 7B... Current generating means,
8A, 8B...Current source circuit section, 9...
Current output circuit section, 10......Rotating type digitizer audio recorder, 30 1 7... Recording/reproducing amplifier circuit. 3 1 Rice field rotation 4 times 921

Claims (1)

[Claims] A filter circuit that combines a plurality of integrators whose time constants change depending on the supplied current and has filter characteristics as a whole determined by the time constants, wherein the time constants of the plurality of integrators are A plurality of current generating means each consisting of a plurality of current sources each generating the above-mentioned current which is set individually according to the desired above-mentioned filter characteristics, and a selection control of the plurality of current generating means according to the desired above-mentioned filter characteristics. A filter circuit comprising: means.