JPH0317239B2 - - Google Patents
Info
- Publication number
- JPH0317239B2 JPH0317239B2 JP59088956A JP8895684A JPH0317239B2 JP H0317239 B2 JPH0317239 B2 JP H0317239B2 JP 59088956 A JP59088956 A JP 59088956A JP 8895684 A JP8895684 A JP 8895684A JP H0317239 B2 JPH0317239 B2 JP H0317239B2
- Authority
- JP
- Japan
- Prior art keywords
- plating
- insulating substrate
- thermosetting resin
- layer
- catalyst
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
(産業上の利用分野)
本発明はアデイテイブ法による印刷配線板の製
造方法に関するものである。
(従来の技術)
従来、CC−4法等のようなアデイテイブ法に
より無電解めつきして回路を形成し印刷配線板を
製造する場合、絶縁基板の表面に予め、めつき触
媒入りの接着剤層を設けている。この場合、絶縁
基板にスルーホール用の孔が設けられているもの
にあつては、孔を設けた後、無電解めつき処理を
する前に、めつき触媒を孔に付着する処理を行な
つている。
(発明が解決しようとする課題)
ところで、通常、接着剤層と、無電解めつき処
理により形成されためつきの回路との接着力を向
上するために、孔にめつき触媒を付着した後に、
接着剤層を粗化している。接着剤層の粗化は、絶
縁基板を硼弗化水素酸溶液や無水クロム酸硫酸系
溶液等の粗化液に浸漬することにより行なつてい
るが、この浸漬処理により孔に付着しためつき触
媒がほとんど洗い流されてしまう。従つて、後に
無電解めつき処理を行なつても孔の箇所に、めつ
きが析出するのに時間が掛かり、析出しためつき
膜は薄く剥離強度が小さい。そのため、半田デイ
ツプ法によりランドに半田めつきをしたりさらに
電子部品を接続する場合等に絶縁基板内のガスが
孔壁のめつき膜を剥離して放出され孔内に充満
し、半田が孔内部から押し出されて入口の表面の
みを被う状態(以下ブローホールという)にな
る。このような状態になると、電子部品の接続不
良が発生し易くなり、また、接着力も低下し易く
なる欠点があつた。
このような欠点を改善するために、接着剤層を
粗化した後にめつき触媒を付着し、さらにめつき
レジスト層を形成する工程を施すこともあるが、
接着剤層とめつきレジスト層との間にめつき触媒
が残るために絶縁抵抗が減少する欠点があつた。
また、めつきレジスト層を形成後に、接着剤層
を粗化し、その後めつき触媒を付着する方法もあ
るが、めつき触媒がめつきレジスト層の表面にも
付着し、このために、無電解めつき処理をすると
めつきレジスト層表面にめつきが析出し短絡不良
が発生し易くなる欠点があつた。
(目的)
本発明は、以上の欠点を改良し、スルーホール
用の孔内のめつき析出を容易にし製造時間を短縮
しうるとともにブローホールを防止して、絶縁特
性の良好な信頼性の高い印刷配線板の製造方法の
提供を目的とするものである。
(問題点を解決するための手段)
本発明は、上記の目的を達成するために、絶縁
基板の表面にめつき触媒入り接着剤を塗布し、そ
の後スルーホール用の孔を形成し、無電解めつき
法により所定の回路を形成しうる印刷配線板の製
造方法において、孔の壁面に低粘度のエマルジヨ
ンタイプの熱硬化性樹脂を塗布して熱硬化性樹脂
層を形成する工程と、該工程後にめつき触媒を付
着する工程と、該工程後に接着剤を粗化する工程
と、該工程後にめつきレジスト層を設ける工程と
を施すことを特徴とする印刷配線板の製造方法を
提供するものである。
(作用)
すなわち、本発明は、絶縁基板に設けられたス
ルーホール用の孔の壁面に予め熱硬化性樹脂層を
設け、これにめつき触媒を付着しているために、
めつき触媒の付着力が強く、特に熱硬化性樹脂層
が未硬化を状態でめつき触媒を付着した場合にそ
の効果が著しい。それ故、その後に、絶縁基板を
粗化液に浸漬しても、熱硬化性樹脂層に付着した
めつき触媒はほとんど剥離しない。従つて、無電
解めつき処理を施すことにより孔壁に充分な厚さ
のめつきが短時間に析出してめつき層が形成され
る。しかも、絶縁基板内のガスが孔壁を通して放
出されるのを熱硬化性樹脂層により防止できるた
めに、半田めつき処理等をした場合のブローホー
ルの欠点が防止される。また、接着剤表面に付着
しためつき触媒は粗化工程により除去されるため
に、めつきレジスト層を設けても、絶縁抵抗は十
分に高い値に維持される。
(実施例)
先ず、第1図に示す通り、紙−フエノール樹脂
基材や紙−エポキシ樹脂基材からなる絶縁基板1
にパラジウム等のめつき触媒入りの接着剤を塗布
して接着剤層2を形成する。次に、第2図に示す
通り、この接着剤層2が形成された絶縁基板1を
パンチして所定のスルーホール用の孔3を形成す
る。孔3形成後、絶縁基板1の表面を整面し、高
圧水洗をしてパンチによる基板カスを除去する。
この水洗後の絶縁基板1を特に熱硬化性樹脂のエ
マルジヨン中に浸漬して、第3図に示す通り、孔
3の内周面に厚さ2〜10μ程度の熱硬化性の樹脂
層4を設ける。熱硬化性樹脂としては、エポキシ
樹脂やウレタン樹脂、ポリエステル樹脂等を用い
るが、絶縁基板1がフエノール樹脂系あるいはエ
ポキシ樹脂系のものの場合には、エポキシ樹脂が
基板との密着性がよく好ましい。また、硬化剤と
しては、アミン系のものが安定したエマルジヨン
が得られるので好ましく、その濃度としては0.3
〜5wt%の範囲のものが特に好ましい。すなわ
ち、0.3wt%未満の濃度では硬化剤としての硬化
が低くなつて樹脂が硬化し難くなり、また5wt%
より多いと孔3を塞ぐように樹脂が被覆されるこ
とがあり、除去作業が必要となり作業上好ましく
ない。絶縁基板1をエマルジヨン中に浸漬した
後、絞りローラにより表面のエマルジヨンを除去
し、さらに高温雰囲気中に通して乾燥し孔3の内
周面に設けられた熱硬化性樹脂層を半硬化状態に
する。孔3壁に熱硬化性樹脂層4を設けた後、絶
縁基板1をめつき触媒溶液中に浸漬して、第4図
に示す通り、めつき触媒5を付着し、取り出して
熱硬化性樹脂層4を加熱して硬化させる。熱硬化
性樹脂層4を硬化後、硼弗化水素酸溶液や無水ク
ロム酸硫酸系溶液からなる粗化液に絶縁基板1を
浸漬して、第5図に示す通り、接着剤層2を粗化
する。接着剤層2を粗化した後、接着剤層2表面
にめつきレジストインクを所定のパターンに塗
布・乾燥して、第6図に示す通り、めつきレジス
ト層6を設ける。めつきレジスト層6形成後、絶
縁基板1を無電解銅めつき溶液中に浸漬し所定の
パターンにめつきを析出して、第7図に示す通
り、回路7を形成する。回路7を形成後、通常の
方法で絶縁基板1を処理し、印刷配線板を製造す
る。
次に、本発明と従来例とについて、スルーホー
ル用の孔内のめつき付着性、ブローホール発生
率、吸湿絶縁性及びめつきレジスト層表面のめつ
き析出を測定したところ表の通りの結果が得られ
た。
(Industrial Application Field) The present invention relates to a method for manufacturing a printed wiring board by an additive method. (Prior art) Conventionally, when manufacturing a printed wiring board by forming a circuit by electroless plating using an additive method such as the CC-4 method, an adhesive containing a plating catalyst is applied to the surface of an insulating substrate in advance. There are layers. In this case, if the insulating substrate has holes for through holes, after the holes are formed and before electroless plating, a plating catalyst is applied to the holes. ing. (Problems to be Solved by the Invention) By the way, in order to improve the adhesion between the adhesive layer and the plating circuit formed by electroless plating, after a plating catalyst is attached to the holes,
The adhesive layer is roughened. The adhesive layer is roughened by dipping the insulating substrate in a roughening solution such as a borofluoric acid solution or an anhydrous chromic acid/sulfuric acid solution. Most of the catalyst is washed away. Therefore, even if electroless plating is performed later, it takes time for the plating to precipitate at the hole locations, and the deposited plating film is thin and has low peel strength. Therefore, when applying solder to lands or connecting electronic components using the solder dip method, gas in the insulating substrate peels off the plating film on the hole wall and is released, filling the hole and causing solder to fill the hole. It is pushed out from inside and covers only the surface of the entrance (hereinafter referred to as a blowhole). In such a state, there are disadvantages in that connection failures of electronic components are likely to occur and adhesive strength is also likely to decrease. In order to improve such drawbacks, a step of applying a plating catalyst after roughening the adhesive layer and further forming a plating resist layer is sometimes performed.
There was a drawback that the insulation resistance decreased because the plating catalyst remained between the adhesive layer and the plating resist layer. Another method is to roughen the adhesive layer after forming the plating resist layer and then attach a plating catalyst. However, the plating catalyst also adheres to the surface of the plating resist layer, which causes electroless When the plating treatment is performed, plating precipitates on the surface of the plating resist layer, resulting in a drawback that short-circuiting defects are likely to occur. (Objective) The present invention improves the above-mentioned drawbacks, facilitates plating deposition in through-hole holes, shortens manufacturing time, prevents blowholes, and provides high reliability with good insulation properties. The object of the present invention is to provide a method for manufacturing a printed wiring board. (Means for Solving the Problems) In order to achieve the above object, the present invention applies a plating catalyst-containing adhesive to the surface of an insulating substrate, then forms holes for through holes, and electrolessly A method for manufacturing a printed wiring board on which a predetermined circuit can be formed by a plating method includes a step of applying a low-viscosity emulsion-type thermosetting resin to the wall surface of the hole to form a thermosetting resin layer; Provided is a method for manufacturing a printed wiring board, which comprises: applying a plating catalyst after the process; roughening the adhesive after the process; and providing a plating resist layer after the process. It is something. (Function) That is, in the present invention, a thermosetting resin layer is provided in advance on the wall surface of a through hole provided in an insulating substrate, and a plating catalyst is attached to this.
The adhesion of the plating catalyst is strong, and its effect is particularly remarkable when the plating catalyst is attached to the thermosetting resin layer in an uncured state. Therefore, even if the insulating substrate is subsequently immersed in a roughening liquid, the hardening catalyst attached to the thermosetting resin layer is hardly peeled off. Therefore, by performing the electroless plating process, a sufficient thickness of plating is deposited on the hole wall in a short time to form a plating layer. Moreover, since the thermosetting resin layer can prevent the gas in the insulating substrate from being released through the hole walls, the drawbacks of blow holes caused by solder plating or the like can be prevented. Further, since the plating catalyst adhering to the adhesive surface is removed by the roughening process, the insulation resistance is maintained at a sufficiently high value even if a plating resist layer is provided. (Example) First, as shown in FIG. 1, an insulating substrate 1 made of a paper-phenol resin base material or a paper-epoxy resin base material is prepared.
An adhesive containing a plating catalyst such as palladium is applied to the adhesive layer 2 to form an adhesive layer 2. Next, as shown in FIG. 2, holes 3 for predetermined through holes are formed by punching the insulating substrate 1 on which the adhesive layer 2 is formed. After forming the holes 3, the surface of the insulating substrate 1 is leveled and washed with high-pressure water to remove substrate debris caused by punching.
The insulating substrate 1 after washing with water is immersed in a thermosetting resin emulsion to form a thermosetting resin layer 4 with a thickness of about 2 to 10 μm on the inner peripheral surface of the hole 3, as shown in FIG. establish. As the thermosetting resin, epoxy resin, urethane resin, polyester resin, etc. are used, but when the insulating substrate 1 is made of phenol resin or epoxy resin, epoxy resin is preferred because of its good adhesion to the substrate. In addition, as the curing agent, an amine type curing agent is preferable because a stable emulsion can be obtained, and its concentration is 0.3
Particularly preferred is a range of ~5wt%. In other words, if the concentration is less than 0.3wt%, the curing effect as a curing agent will be low and the resin will be difficult to cure, and if the concentration is less than 5wt%
If the amount is larger than this, the resin may cover the hole 3 so as to block it, which requires removal work, which is not preferable in terms of work. After the insulating substrate 1 is immersed in the emulsion, the emulsion on the surface is removed by a squeezing roller, and then dried in a high-temperature atmosphere to semi-cure the thermosetting resin layer provided on the inner peripheral surface of the hole 3. do. After providing a thermosetting resin layer 4 on the wall of the hole 3, the insulating substrate 1 is immersed in a plating catalyst solution to adhere a plating catalyst 5 as shown in FIG. Layer 4 is heated and cured. After curing the thermosetting resin layer 4, the insulating substrate 1 is immersed in a roughening solution consisting of a borofluoric acid solution or an anhydrous chromic acid/sulfuric acid solution to roughen the adhesive layer 2, as shown in FIG. become After roughening the adhesive layer 2, a plating resist ink is applied to the surface of the adhesive layer 2 in a predetermined pattern and dried to form a plating resist layer 6 as shown in FIG. After forming the plating resist layer 6, the insulating substrate 1 is immersed in an electroless copper plating solution to deposit plating in a predetermined pattern to form a circuit 7 as shown in FIG. After forming the circuit 7, the insulating substrate 1 is processed in a conventional manner to produce a printed wiring board. Next, regarding the present invention and the conventional example, we measured the plating adhesion inside the through-hole, the blowhole occurrence rate, the moisture absorption insulation property, and the plating precipitation on the surface of the plating resist layer, and the results are shown in the table. was gotten.
【表】
スルーホール用の孔内のめつき付着性は孔内壁
全面にめつきが析出するまでの時間、ブローホー
ル発生率は半田あげ条件を240℃、5秒とし、吸
湿絶縁性は40℃、90%RHの雰囲気中に7日放置
後の絶縁抵抗とし、めつきレジスト層表面のめつ
き析出は目視とした。
なお、製造条件は下記の通りである。
本発明実施例は、
(a) 絶縁基板:エポキシ樹脂積層板にめつき触媒
入り接着剤(日立化成工業社製HA−04)を塗
布硬化したもの。
(b) 熱硬化性樹脂層形成工程:エポキシ樹脂エマ
ルジヨン(カネボウNSC社製エポルジヨンEA
−1の固形分100重量部に対し硬化剤EB−1を
80重量部添加して濃度1%に稀釈したもの)中
に浸漬し、バフで接着剤層表面のエマルジヨン
を除去し、100℃の温度で10秒間加熱する。
(c) めつき触媒付着工程:めつき触媒(日立化成
工業社製HS−101B)を塗布し、150℃の温度
で30分間加熱する。
(d) 粗化工程:硼弗化水素酸系粗化液により接着
剤層表面を粗化し、洗浄して乾燥する。
(e) めつきレジスト工程:めつきレジストインク
(日立化成工業社製HGM−02BK−1)をスク
リーン印刷し、160℃の温度で30分間加熱して
硬化する。
(f) 無電解めつき工程:通常の無電解めつき処理
(CC−4めつき処理)により、厚さ30μの銅層
を形成する。
従来例(1)は、本発明実施例において、(b)の熱硬
化性米樹脂形成工程を省略し、
従来例(2)は、従来例(1)において、(b)の粗化程度
を(c)のめつき触媒付着工程の前に行ない、従来例
(3)は、従来例(1)において、(b)の粗化工程を(e)のめ
つきレジスト工程の後に行なつた。
すなわち、本発明によれば、従来例に比べてめ
つき付着性は1/2以下となりめつき析出速度が2
倍以上となり、ブローホール発生率は40%以下と
なり、また、吸湿絶縁性も十分に実用化可能な値
が得られ、めつきレジスト層表面にはほとんどめ
つきが析出せず短絡不良が防止される。
(効果)
以上の通り、本発明の製造方法によれば、スル
ーホール用の孔の壁面にめつきを早く析出でき製
造時間を短縮できるとともにブローホールの発生
率が低く、絶縁抵抗が高く、信頼性の高い印刷配
線板が得られる。
また、本発明の製造方法によれば、めつき触媒
を付着する工程をめつきレジスト層を設ける工程
の前に行なつているため、無電解めつき処理の際
にめつきレジスト層の表面にめつきが析出するの
は、めつきレジスト層に導電性のゴミが付着して
それが核となる場合だけであり、従つて、ほとん
どめつきレジスト層にはめつきが析出することな
く、短絡不良を防止しうる印刷配線板が得られ
る。
さらに、本発明の製造方法によれば、孔の壁面
に低粘度のエマルジヨンタイプの熱硬化性樹脂を
塗布して熱硬化性樹脂を形成しているため、通常
の接着剤と比べて、塗布時につまることがなく、
所定の厚さの熱硬化性樹脂層を形成でき、ブロー
ホールの発生を防止し易く、製造の容易な印刷配
線板が得られる。[Table] The adhesion of plating inside the hole for through-holes is determined by the time it takes for plating to deposit on the entire surface of the inner wall of the hole, the blowhole occurrence rate is determined by the soldering conditions at 240℃ for 5 seconds, and the moisture absorption insulation at 40℃. The insulation resistance was measured after being left in an atmosphere of 90% RH for 7 days, and the plating precipitation on the surface of the plating resist layer was visually observed. The manufacturing conditions are as follows. Examples of the present invention are as follows: (a) Insulating substrate: An epoxy resin laminate plate coated with a plating catalyst-containing adhesive (HA-04 manufactured by Hitachi Chemical Co., Ltd.) and cured. (b) Thermosetting resin layer forming process: Epoxy resin emulsion (Epolsion EA manufactured by Kanebo NSC)
Add hardening agent EB-1 to 100 parts by weight of solid content of -1.
The adhesive layer was diluted to a concentration of 1% by adding 80 parts by weight), the emulsion on the surface of the adhesive layer was removed with a buff, and the adhesive layer was heated for 10 seconds at a temperature of 100°C. (c) Plating catalyst deposition step: A plating catalyst (HS-101B manufactured by Hitachi Chemical Co., Ltd.) is applied and heated at a temperature of 150°C for 30 minutes. (d) Roughening step: The surface of the adhesive layer is roughened using a borofluoric acid-based roughening solution, washed, and dried. (e) Plating resist step: Plating resist ink (HGM-02BK-1 manufactured by Hitachi Chemical Co., Ltd.) is screen printed and cured by heating at a temperature of 160° C. for 30 minutes. (f) Electroless plating process: A 30μ thick copper layer is formed by normal electroless plating process (CC-4 plating process). In the conventional example (1), the thermosetting resin forming step (b) is omitted in the embodiment of the present invention, and in the conventional example (2), the degree of roughening in (b) is reduced in the conventional example (1). (c) Prior to the plating catalyst adhesion process, the conventional example
In (3), in conventional example (1), the roughening step (b) was performed after the plating resist step (e). In other words, according to the present invention, the plating adhesion is less than half that of the conventional example, and the plating deposition rate is 2 times lower.
The blowhole generation rate was more than double that, the blowhole occurrence rate was less than 40%, and the moisture absorption and insulation properties were sufficiently high for practical use, and almost no plating was deposited on the surface of the plating resist layer, preventing short circuit failures. Ru. (Effects) As described above, according to the manufacturing method of the present invention, plating can be quickly deposited on the wall surface of a through-hole, reducing manufacturing time, reducing the incidence of blowholes, providing high insulation resistance, and providing reliability. A printed wiring board with high properties can be obtained. Furthermore, according to the manufacturing method of the present invention, since the step of attaching the plating catalyst is performed before the step of providing the plating resist layer, the surface of the plating resist layer is coated during the electroless plating process. Plating only occurs when conductive dust adheres to the plating resist layer and becomes a nucleus. Therefore, plating does not precipitate on the plating resist layer and short circuit failures occur. A printed wiring board that can prevent this can be obtained. Furthermore, according to the manufacturing method of the present invention, a low viscosity emulsion type thermosetting resin is applied to the wall surface of the hole to form a thermosetting resin, so compared to ordinary adhesives, the Never get bored,
A printed wiring board that can form a thermosetting resin layer of a predetermined thickness, easily prevents blowholes, and is easy to manufacture can be obtained.
第1図〜第7図は本発明の製造工程を示し、第
1図は接着剤層を設けた絶縁基板の断面図、第2
図は孔を形成した絶縁基板の断面図、第3図は熱
硬化性樹脂層を設けた絶縁基板の断面図、第4図
はめつき触媒を付着した絶縁基板の断面図、第5
図は接着剤層を粗化した絶縁基板の断面図、第6
図はめつきレジスト層を設けた絶縁基板の断面
図、第7図は回路を形成した絶縁基板の断面図を
示す。
1……絶縁基板、2……接着剤層、3……孔、
4……熱硬化性樹脂層、5……めつき触媒、6…
…めつきレジスト層、7……回路。
1 to 7 show the manufacturing process of the present invention, and FIG. 1 is a cross-sectional view of an insulating substrate provided with an adhesive layer, and FIG.
Figure 3 is a sectional view of an insulating substrate with holes formed therein, Figure 3 is a sectional view of an insulating substrate provided with a thermosetting resin layer, Figure 4 is a sectional view of an insulating substrate with a plating catalyst attached, and Figure 5 is a sectional view of an insulating substrate with a plating catalyst attached.
The figure is a cross-sectional view of an insulating substrate with a roughened adhesive layer.
The figure shows a sectional view of an insulating substrate provided with a plating resist layer, and FIG. 7 shows a sectional view of an insulating substrate on which a circuit is formed. 1... Insulating substrate, 2... Adhesive layer, 3... Hole,
4...Thermosetting resin layer, 5...Plating catalyst, 6...
...Plated resist layer, 7...Circuit.
Claims (1)
布し、その後スルーホール用の孔を形成し、無電
解めつき法により所定の回路を形成しうる印刷配
線板の製造方法において、孔の壁面に低粘度のエ
マルジヨンタイプの熱硬化性樹脂を塗布して熱硬
化性樹脂層を形成する工程と、該工程後にめつき
触媒を付着する工程と、該工程後に接着剤を粗化
する工程と、該工程後にめつきレジスト層を設け
る工程とを施すことを特徴とする印刷配線板の製
造方法。 2 熱硬化性樹脂層が未硬化の状態でめつき触媒
を付着することを特徴とする特許請求の範囲第1
項記載の印刷配線板の製造方法。[Claims] 1. Manufacture of a printed wiring board in which a plating catalyst-containing adhesive is applied to the surface of an insulating substrate, holes for through holes are then formed, and a predetermined circuit can be formed by electroless plating. The method includes a step of applying a low-viscosity emulsion-type thermosetting resin to the wall surface of the hole to form a thermosetting resin layer, a step of attaching a plating catalyst after this step, and a step of applying an adhesive after this step. 1. A method for manufacturing a printed wiring board, comprising: a step of roughening the substrate; and a step of providing a plating resist layer after the step. 2. Claim 1, characterized in that the plating catalyst is attached to the thermosetting resin layer in an uncured state.
A method for manufacturing a printed wiring board as described in Section 1.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8895684A JPS60233886A (en) | 1984-05-02 | 1984-05-02 | Method of producing printed circuit board |
| US06/701,533 US4585502A (en) | 1984-04-27 | 1985-02-14 | Process for producing printed circuit board |
| DE19853505579 DE3505579A1 (en) | 1984-04-27 | 1985-02-18 | METHOD FOR PRODUCING A PRINTED CIRCUIT BOARD |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8895684A JPS60233886A (en) | 1984-05-02 | 1984-05-02 | Method of producing printed circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60233886A JPS60233886A (en) | 1985-11-20 |
| JPH0317239B2 true JPH0317239B2 (en) | 1991-03-07 |
Family
ID=13957299
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8895684A Granted JPS60233886A (en) | 1984-04-27 | 1984-05-02 | Method of producing printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60233886A (en) |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4914977A (en) * | 1972-05-22 | 1974-02-08 | ||
| JPS5534585B2 (en) * | 1973-05-30 | 1980-09-08 | ||
| JPS50153272A (en) * | 1974-05-31 | 1975-12-10 | ||
| JPS5725998A (en) * | 1980-07-23 | 1982-02-10 | Sadao Ikeda | Form supporting paper for printer of computer |
| JPS5839098A (en) * | 1981-09-02 | 1983-03-07 | 松下電工株式会社 | Method of producing metallic substrate wiring material |
| JPS5931094A (en) * | 1982-08-14 | 1984-02-18 | 松下電工株式会社 | Method of producing full-additive circuit board |
-
1984
- 1984-05-02 JP JP8895684A patent/JPS60233886A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60233886A (en) | 1985-11-20 |
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