JPH0318063A - Semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the gage width without deteriorating the transistor characteristics by curving a gate end part, which crosses a drain end part so that the gate width may enlarge from gate center. CONSTITUTION:A drain 2 and a source 3 are formed at a specified interval on a substrate 1, and a gate 5 is formed through an insulating film 4 between the drain 2 and the source 3. And a gate end part E, which crosses a drain end part, is curved so that the gate width may enlarge from gate center. Since the gate width of the gate end part E, which crosses the drain end part, is enlarged more than the gate center, the electric field strength at the gate end part E is relaxed, and the trapping of hot electrons to the insulating film 4 is suppressed. Hereby, the gate width can be reduced without deteriorating the transistor characteristics.

Description

[Detailed Description of the Invention] [Summary] Regarding the gate structure of a MOS field effect transistor, the purpose is to reduce the gate width without deteriorating the transistor characteristics. A MOS transistor in which a gate is formed between its drain and source on a substrate with an insulating film interposed therebetween,
The edge of the gate that intersects with the edge of the train is curved to make the gate wider than the center of the gate. [Industrial Application Field] This invention relates to the gate side of a MOst field effect transistor. As semiconductor integrated circuits have become more highly integrated in recent years, the area occupied by each transistor formed in the integrated circuit has become smaller and smaller. As a result, especially in MOS transistors, as the width of the gate, that is, the distance between the drain and source becomes narrower, the electric field strength therebetween increases. The trapping of hot electrons into the gate insulating film due to this high electric field strength causes deterioration of transistor characteristics. [Conventional technology] For example, silicon gate N shown in FIGS. 4 and 5
In a channel MOS transistor, a drain 2 and a source 3 are formed by forming an N-type diffusion layer on a P-type substrate 1, and an insulation 1B made of Si02M is formed between the drain and source. A gate 5 is formed of polysilicon through the gate 4. For example, when power is supplied to the drain 2 and a gate voltage is applied to the gate 5, a channel 6 is formed below the insulating WA 4, electrons are induced, and the drain
Current flows between the sources. [Problems to be Solved by the Invention] As the MOS transistors described above have become highly integrated in recent years, the widths of the drain 2 and source 3 have been reduced, and the distance between the drain and source, that is, the width of the gate 5 has also been reduced. As a result, the electric field strength between the drain and source increases, and hot electrons are likely to be generated in the channel 6.

On the other hand, the insulating film 4 in the gate edge green portion E that intersects with the edges of the drain 2 and source 3 is susceptible to structural defects due to stress generated during its manufacturing process. As a result, hot electrons generated in the channel 6 are easily trapped in the insulating film 4 at the gate edge E where the train edge intersects, and the hot electrons in the insulating film 4 are trapped in the MOS.
A problem arises in that the threshold value of the transistor is changed. An object of the present invention is to provide a gate structure for a MOS transistor that allows the gate width to be reduced without deteriorating transistor characteristics.

[Means for solving the problem] g1 [2 is a diagram explaining the principle of the present invention. The figure <a) is M
A plan view of an OS transistor, and FIG. 2(b) a cross-sectional view of a MOS transistor. The MOS transistor has a drain 2 and a source 3 formed on a substrate 1 with a predetermined distance apart, and an insulating M on the substrate 1 between the drain and source.
A gate 5 is formed through the gate 4. The gate edge E intersecting the drain edge is curved to make the gate width wider than the gate center. [Function] The gate edge E intersecting the drain edge has a gate width expanded from the center of the gate, the electric field strength at the gate edge E is relaxed, and trapping of hot electrons into the insulating film 4 is suppressed. It will be done. [Example] An example embodying the present invention will be described below with reference to FIG. Incidentally, the same parts as in the conventional example will be described with the same numbers.

In the MOS transistor shown in FIG. 2, the edge E of the gate 5 that intersects the edge of the drain 2 is curved so that the gate width is wider than the center of the gate. For example, when the gate width W1 at the center of the gate is 0.8 to 1 micron, the enlarged width W2 of the edge green part E is 0.05 to 1 micron.
Set to 0.1 micron. Furthermore, when the gate width W1 is set to 0.8 microns or less, the expansion @W2 is set to 0.02 to 0.8 microns.
It is assumed to be 1 micron. Note that the reason why the edge E is curved to enlarge the gate width is because if the edge E is enlarged by a crank-shaped discontinuous line, the gate 5 is formed at the discontinuous portion.
This is because strong stress may occur in the insulating film 4, which may adversely affect transistor characteristics. and,
The insulating film 4 below the gate 5 is also formed in the same shape as the gate 5, and the gate 5 and the insulating film 4 are formed by forming an Si02 film and a polysilicon film on the substrate 1 and then photo-etching them into the above shape. be shaped.

In a MOS transistor with such a configuration, the gate width in the green area E is expanded to the width W without changing the gate @W1 in the center of the gate that determines the transistor characteristics.
It is expanded in 2. Therefore, the electric field strength at the edge E can be relaxed without affecting the transistor characteristics, and hot electrons can be prevented from being trapped in the insulating film 4 during operation, thereby preventing deterioration of the transistor characteristics. can. Furthermore, since the area of this MOS transistor is not increased, the degree of integration is not reduced. In addition, since the drain and source of a MO S transistor may be switched in some cases, the third
As shown in the figure, when the gate 5 is opened in both directions, the edge E that intersects the edges of the drain 2 and the source 3 may be curved so that the gate width is wider than the center of the gate. [Effects of the Invention] As detailed above, the present invention exhibits an excellent effect of providing a gate ellipse of a MoS transistor that does not deteriorate transistor characteristics even when the gate width is reduced. FIG. 3 is a schematic plan view showing another embodiment of the present invention, FIG. 4 is a schematic plan view showing a conventional MOS transistor, and FIG. 5 is a sectional view thereof.

In the figure, 1 is the board, 2 is the drain, 3 is the sauce 4 is an insulating film; 5 is the gate, E is the edge of the gate.

[Brief explanation of the drawing]

Figure 1 <a) and (b) are diagrams explaining the principle of the present invention. Figure 2 is a schematic plan view of a MOS transistor showing an embodiment of the invention. Figure 1 is a diagram explaining the principle of the present invention. Figure 3 is a diagram explaining the principle of the present invention. Figure 4: A schematic plan view of a MOS transistor in a dormitory 6 Figure 2: Schematic plan view showing another practical example of the MOS transistor of the present invention [Schematic plan view of Western MOS Cross-sectional view of a transistor

Claims (1)

[Claims] 1. A drain (2) and a source (3) are formed on a substrate (1) at a predetermined distance apart, and a gate (5) is formed on the substrate (1) via an insulating film (4) between the drain and source.
1. A semiconductor device in which a gate edge (E) intersecting a drain edge is curved to make the gate width wider than the gate center.