JPH03181071A - Magnetic storage device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to differential reproduction of signals in a magnetic storage device.

[Conventional technology]

As shown in FIG. 5, signal discrimination reproduction in a conventional magnetic storage device such as a magnetic disk device or a magnetic tape device uses rlJ or The rOJ was being evaluated. However, with this method, as shown in FIG. 6, it is impossible to reproduce a correct signal with respect to local pulse phase shifts due to pattern peak shifts of recorded bits. Furthermore, Japanese Patent Application Laid-Open No. 58-108011 proposes a method for differential reproduction by switching the phase using a head.
In this method as well, the phase is fixed for each head, and it is impossible to reproduce correct signals with respect to local phase shifts.

[Problem to be solved by the invention]

The present invention has been made for the purpose of solving the above-mentioned conventional drawbacks and providing a magnetic storage device that can reproduce data correctly even when the signal quality is poor. [Means for solving problem a] In the present invention, first of all, a plurality of phase-shifted discrimination windows are used to simultaneously discriminately reproduce Xinfeng, and bits with local phase shifts are used to Make sure to enter the discrimination window correctly. Second, it is determined which data among the data reproduced during the above period is correct. Thirdly, when determining whether data is correct or incorrect, an error correction code (hereinafter referred to as ECC) is devised in order to improve unreliability. The phase-shifted discrimination window is obtained by passing the PLL output through a delay circuit. Also, to play the signal at the same time,
Discrimination windows whose phases are shifted from each other are input to a plurality of discrimination circuits, and discrimination is performed. Furthermore, correct data is reproduced based on the ECC check results of the data discriminated by each discrimination circuit. [Operation 1] The present invention will be explained in detail below. First, a pulse generation circuit generates a pulse corresponding to the peak reproduced by the head. Next, a discrimination window synchronized with the peak pulse train is generated by PLL. The discrimination window is delayed by a delay circuit to generate discrimination windows with different phases. By using discrimination windows with different phases for discrimination, even bits with local phase shifts can be discriminated so that they fall correctly into the discrimination window, making it possible to reproduce signals correctly even when conventionally it was impossible to reproduce them correctly. Become. Example 1 The present invention will be described in detail below. FIG. 1 shows the basic configuration of the present invention. reproduced by the head 20 (ffi number is the waveform processing circuit 1
and a pulse 2a corresponding to the peak by the pulse generator 2.
generate. The pulse 2a is input to the PLL 3 and also to a plurality of discrimination circuits 4. In the PLL 3, a discrimination window synchronized with the pulse sequence of the pulse 2a is generated, and this discrimination window becomes discrimination windows 6a, 6b, and 6c whose phases are slightly shifted by a delay circuit 6, and is input to the plurality of discrimination circuits 4. be done. In the discrimination circuit 4, discrimination data 4a, 4b, 4c corresponding to the discrimination window of the phase of
generate. The details of the discrimination operation will be explained with reference to the time chart of FIG. The pulse 2a includes a bit with a large phase shift as shown in the third bit. This phase-shifted bit cannot be correctly discriminated by the discrimination windows 6a and 6b. However, the phase-delayed discrimination window 6c allows accurate discrimination. First, the ECC processing circuit 5 determines whether there is an error.
This is done based on the syndrome calculation result. As shown in FIG. 2, if there is a syndrome indicating no error, the determination circuit 7 selects and outputs discrimination data indicating no error. This enables differential reproduction of correct data. Next, a second embodiment will be explained using FIG. 3. This embodiment is an embodiment for a case where all syndrome calculation results by the ECC processing circuit 5 are errors. That is, since there is no error-free discrimination data, correct data cannot be obtained simply by selection. Therefore, as shown in FIG. 3, the data is divided into a plurality of subblocks and an ECC or CRC is added to each subblock so that it can be determined whether there is an error within the subblock. In actual operation, the ECC processing circuit 5 first determines whether there is an error in a sub-block, and then the determination circuit 7 determines which series has an error among the data series 5a, 5b, and 5c in each sub-block. After determining whether there are any errors, sub-blocks of sequences without errors are extracted and combined to form correct data. As described above, according to this embodiment, even if there is no error-free sequence among a plurality of discrimination data sequences, it is possible to correctly discriminate and reproduce signals. In addition, in this embodiment, in order to further improve data reliability, the entire data series is subjected to EC as shown in FIG.
It is also possible to add C or CRC. [Effects of the Invention] According to the present invention, it is possible to reproduce correct signals even if the recorded bits are of poor signal quality and have a local pulse phase shift due to pattern peak shift. . As will be explained in more detail, it becomes possible to correctly reproduce even a signal that could not be reproduced correctly using a single valve 53 window whose phase is fixed as in the past.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a magnetic storage bag showing the first embodiment of the present invention, Fig. 2 is an explanatory diagram of the operation of the first embodiment at position '#A, and Figs. FIG. 5 is a block diagram of a conventional magnetic storage device. FIG. 6 is an explanatory diagram of the operation of the conventional device. Explanation of symbols 1...Waveform processing circuit 2...Pulsing circuit 3
...PLL4 ・Discrimination circuit 4...Discrimination circuit 5
... ECC processing circuit 6 ... Delay circuit power section a / ρ / ρ θ / ρ ρ Ci2 bepSc 5θ 5atrr5c (O)→＼Correction

Claims (1)

[Scope of Claims] 1. A magnetic storage device characterized in that signals are differentially reproduced in parallel and simultaneously using discrimination windows whose phases are slightly shifted. 2. The magnetic storage device according to claim 1, wherein only error-free data sequences are extracted by checking ECC or CRC of data discriminated in parallel. 3. The magnetic storage device according to claim 1, wherein data is divided into sub-blocks and an ECC or CRC is added to each sub-block. 4. The magnetic memory according to claim 3, characterized in that among the subblocks of the data series discriminated in parallel, error-free subblocks are extracted and combined to form a correct data series. Device.