JPH031812B2 - - Google Patents

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Publication number
JPH031812B2
JPH031812B2 JP9410584A JP9410584A JPH031812B2 JP H031812 B2 JPH031812 B2 JP H031812B2 JP 9410584 A JP9410584 A JP 9410584A JP 9410584 A JP9410584 A JP 9410584A JP H031812 B2 JPH031812 B2 JP H031812B2
Authority
JP
Japan
Prior art keywords
electrode layer
main body
electrode
layer
nickel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP9410584A
Other languages
Japanese (ja)
Other versions
JPS60236207A (en
Inventor
Masaaki Okane
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP9410584A priority Critical patent/JPS60236207A/en
Publication of JPS60236207A publication Critical patent/JPS60236207A/en
Publication of JPH031812B2 publication Critical patent/JPH031812B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】 本発明は、積層セラミツクコンデンサのような
積層型電子部品の本体に外部電極を形成する方法
に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming external electrodes on the body of a multilayer electronic component such as a multilayer ceramic capacitor.

積層型電子部品、例えば積層セラミツクコンデ
ンサは、第1図に示すように複数枚のセラミツク
シート間に内部電極1……を介在させ該シートを
積層一体化し、焼成することによつて、本体2を
構成した後、前記内部電極が露出する本体両端部
に外部電極3を形成したものであるが、従来、こ
の外部電極の形成には次のような湿式メツキ方法
が採られていた。
A multilayer electronic component, such as a multilayer ceramic capacitor, is manufactured by interposing internal electrodes 1 between a plurality of ceramic sheets as shown in FIG. After the construction, external electrodes 3 are formed on both ends of the main body where the internal electrodes are exposed. Conventionally, the following wet plating method has been used to form these external electrodes.

即ち、本体2両端部にそれぞれ銀ペーストのよ
うな導電性ペーストを塗布し焼き付けて外部電極
3の第1電極層4を形成した後、この第1電極層
4の上に電解メツキによりニツケルの第2電極層
5とすずの第3電極層6とを順次に形成し、これ
ら第1,第2及び第3電極層4,5,6で外部電
極3を構成していた。しかしこのような、いわゆ
る湿式メツキ法では、外部電極3として第2、第
3電極層5,6を形成する際に、本体2を電解液
中に浸漬することになるので、電解液が電極1に
沿つて本体2内に侵入し、その残留イオンにより
容量の低下や絶縁抵抗の減少といつに、積層セラ
ミツクコンデンサの特性を劣化させる種々の不都
合を引き起こすことが多々あつた。
That is, after applying a conductive paste such as silver paste to both ends of the main body 2 and baking it to form the first electrode layer 4 of the external electrode 3, a nickel layer is formed on the first electrode layer 4 by electrolytic plating. A second electrode layer 5 and a third electrode layer 6 made of tin were sequentially formed, and the first, second, and third electrode layers 4, 5, and 6 constituted the external electrode 3. However, in such a so-called wet plating method, when forming the second and third electrode layers 5 and 6 as the external electrodes 3, the main body 2 is immersed in the electrolytic solution, so the electrolytic solution covers the electrodes 1. The residual ions invade the main body 2 along these lines, and their residual ions often cause various problems such as a decrease in capacitance and insulation resistance, which deteriorates the characteristics of the multilayer ceramic capacitor.

本発明は上記従来の欠点に鑑み、外部電極の第
2、第3両電極層の形成には、いわゆる乾式メツ
キ法であるスパツタリング、真空蒸着もしくはプ
ラズマ溶射を採用することにより、容量の低下や
絶縁抵抗の減少といつた特性の劣化要因を防止
し、長期に亙つて電子部品の動作を安定させると
ともに、ハンダへの耐熱性、ハンダの付着性の良
い電子部品が得られるようにしたものである。
In view of the above-mentioned conventional drawbacks, the present invention employs sputtering, vacuum evaporation, or plasma spraying, which is a so-called dry plating method, to form both the second and third electrode layers of the external electrode. This prevents factors that cause deterioration of characteristics such as a decrease in resistance, stabilizes the operation of electronic components over a long period of time, and makes it possible to obtain electronic components with good heat resistance and solder adhesion to solder. .

以下、本発明を図面に示す実施例に基づいて詳
細に説明する。本発明の方法によつて製作される
電子部品の一例である積層セラミツクコンデンサ
は、第1図に示す従来の方法で得られるものと同
構造であり、同一の部分は同一の符号で図示する
ものとする。即ち、本発明方法で得られる積層セ
ラミツクコンデンサ7は、第1図に示すように本
体2とその両端部に形成された外部電極3とを有
し、本体2はその内部に複数の内部電極1……が
互いに平行かつ交互に本体2の反対側端部に露出
する状態で介在している。外部電極3は、内部電
極1と直接つながる第1電極層4、ニツケルの第
2電極層5、すずの第3電極層6から成る。
Hereinafter, the present invention will be described in detail based on embodiments shown in the drawings. A multilayer ceramic capacitor, which is an example of an electronic component manufactured by the method of the present invention, has the same structure as that obtained by the conventional method as shown in FIG. 1, and the same parts are indicated by the same reference numerals. shall be. That is, the multilayer ceramic capacitor 7 obtained by the method of the present invention has a main body 2 and external electrodes 3 formed at both ends thereof, as shown in FIG. ... are parallel to each other and alternately exposed at opposite ends of the main body 2. The external electrode 3 consists of a first electrode layer 4 directly connected to the internal electrode 1, a second electrode layer 5 of nickel, and a third electrode layer 6 of tin.

しかして上記コンデンサ7における外部電極3
の形成方法の第1実施例を、第2図イ〜ヌの各形
成工程図、及び各形成工程に対応する第3図の積
層セラミツクコンデンサの半成品の断面図に基づ
いて説明する。
However, the external electrode 3 in the capacitor 7
A first embodiment of the method for forming the capacitor will be described based on the forming process diagrams shown in FIGS.

<第1実施例> イ 本体2を準備する。この本体2は、複数枚の
セラミツクシート上の所定位置に高融点金属を
主成分とするペースト状電極材料を印刷もしく
は塗布などの手段で付与した後、これらセラミ
ツクシートを積層圧着し、電気炉等によりこれ
を焼成して形成される。これによりセラミツク
シートが一体化した誘電体8となり、またペー
スト状電極材料が焼き付けられて内部電極1と
なる。
<First Example> A. Prepare the main body 2. This main body 2 is made by applying a paste-like electrode material containing a high melting point metal as a main component to predetermined positions on a plurality of ceramic sheets by means such as printing or coating, and then laminating and press-bonding these ceramic sheets. It is formed by firing this. As a result, the ceramic sheet becomes an integrated dielectric 8, and the paste-like electrode material is baked to become the internal electrode 1.

ロ 前記本体2の内部電極1が露出している両端
部に、銀、銅、ニツケル等のいずれかを主成分
とする導電性ペーストを塗布する。
(b) A conductive paste containing silver, copper, nickel, or the like as a main component is applied to both ends of the main body 2 where the internal electrodes 1 are exposed.

ハ 前記ペーストを乾燥させる。C. Dry the paste.

ニ 電気炉等において前記ペーストを焼き付け、
これにより第3図Aに示すように本体2の両端
部に、内部電極1と電気的につながつた第1電
極層4,4をそれぞれ形成する。
D. Baking the paste in an electric furnace etc.
As a result, as shown in FIG. 3A, first electrode layers 4, 4 electrically connected to the internal electrodes 1 are formed at both ends of the main body 2, respectively.

ホ 第1電極層4を有する本体2をスパツタリン
グ装置内に置き、スパツタリングによりニツケ
ル層5′を該本体2の表面に析出させる。この
ニツケル層5′は本体2と第1電極層4との表
面全体に形成される[第3図B参照]。このス
パツタリングは例えば、アルゴンガスのような
付活性ガス雰囲気中において陽極とこれに対向
するニツケルの陰極との間に高電圧を印加し放
電させ、陰極から放散するニツケル原子を、陽
極の前に配置した本体2に付着させることによ
り行なう。
E) The main body 2 having the first electrode layer 4 is placed in a sputtering apparatus, and a nickel layer 5' is deposited on the surface of the main body 2 by sputtering. This nickel layer 5' is formed over the entire surface of the main body 2 and the first electrode layer 4 [see FIG. 3B]. This sputtering involves applying a high voltage between an anode and an opposing nickel cathode in an activated gas atmosphere such as argon gas to generate a discharge, and nickel atoms emitted from the cathode are placed in front of the anode. This is done by attaching it to the main body 2.

ヘ 同じくスパツタリングにより前記ニツケル層
5′の上にすずの層6′を析出させる[第3図C
参照]。
F. Similarly, a tin layer 6' is deposited on the nickel layer 5' by sputtering [Fig. 3C
reference].

ト 第3図Dに示すように、すず層6′の表面の
所要部、即ち第1電極層4に対応した部位に、
エツチングレジスト9を塗布する。
G. As shown in FIG.
Etching resist 9 is applied.

チ エツチングレジスト9を硬化させる。The etching resist 9 is hardened.

リ エツチング剤でエツチング処理し、これによ
りニツケル層5′及びすず層6′の不要部分が取
り除かれ、第3図Eに示すように丁度第1電極
層4のみを被覆するニツケルの第2電極層5と
すずの第3電極層6ができる。
Etching is performed using a reetching agent, thereby removing unnecessary portions of the nickel layer 5' and the tin layer 6', and forming a second electrode layer of nickel that just covers only the first electrode layer 4, as shown in FIG. 3E. A third electrode layer 6 of 5 and tin is formed.

ヌ 第3電極層6の上にはエツチングレジスト9
が残存しているから、これを除去する。
Etching resist 9 is placed on the third electrode layer 6.
remains, so remove it.

以上の工程を経て第1図に示すような積層セラ
ミツクコンデンサ7が得られる。
Through the above steps, a multilayer ceramic capacitor 7 as shown in FIG. 1 is obtained.

<第2実施例> 前記第1実施例においてスパツタリングでニツ
ケル層5′を形成する工程ホ、及び同じくスパツ
タリングですず層6′を形成する工程ヘの代わり
に、スパツタリングとともに乾燥メツキ法といわ
れる真空蒸着を採用し、この真空蒸着によりニツ
ケル層5′とすず層6′を順次形成するようにして
もよい。それ以外の工程は第1実施例と同じであ
る。
<Second Embodiment> Instead of the step (e) of forming the nickel layer 5' by sputtering in the first embodiment, and the step of forming the tin layer 6' by sputtering, vacuum evaporation, which is called a dry plating method, is used in addition to sputtering. Alternatively, the nickel layer 5' and the tin layer 6' may be sequentially formed by vacuum evaporation. The other steps are the same as in the first embodiment.

<第3実施例> 前記ニツケル層5′及びすず層6′を形成するの
に、スパツタリングや真空蒸着とともに乾式メツ
キの一つに数えられるプラズマ溶射を用いてもよ
い。この場合も工程ホ,ヘ以外は第1実施例と同
じである。
<Third Embodiment> To form the nickel layer 5' and the tin layer 6', plasma spraying, which can be counted as one of dry plating along with sputtering and vacuum evaporation, may be used. In this case as well, the steps except steps E and F are the same as in the first embodiment.

<その他の実施例> エツチングレジストの塗布とエツチング処理と
によりニツケル層5′及びすず層6′の不要部分を
除去する代わりに、ニツケル層5′及びすず層
6′が不要な本体表面部を予めマスキング材でマ
スキングしておき、第1電極層4の表面にのみニ
ツケル層5′及びすず層6′、即ち第2電極層5及
び第3電極層6が形成されるようにしてもよい。
マスキングは第1電極層4が形成された後に行な
う。このようにマスキングを採用すれば、第1実
施例におけるようなエツチングレジスト9の塗
布、硬化、エツチング処理及びエツチングレジス
ト9の除去の各工程が不要となる。この場合にお
いてニツケルの第2電極層5とすずの第3電極層
6を形成するのに、スパツタリング、真空蒸着、
プラズマ溶射のいずれを用いてもよいことはいう
までもない。
<Other Examples> Instead of removing unnecessary parts of the nickel layer 5' and tin layer 6' by applying an etching resist and etching treatment, the body surface parts where the nickel layer 5' and tin layer 6' are not required are removed in advance. The nickel layer 5' and the tin layer 6', that is, the second electrode layer 5 and the third electrode layer 6, may be formed only on the surface of the first electrode layer 4 by masking with a masking material.
Masking is performed after the first electrode layer 4 is formed. If masking is employed in this manner, the steps of applying the etching resist 9, curing, etching, and removing the etching resist 9, as in the first embodiment, become unnecessary. In this case, sputtering, vacuum evaporation,
Needless to say, any method of plasma spraying may be used.

本発明の方法は上記実施例のように積層セラミ
ツクコンデンサに適用するほか、積層インダクタ
など耐熱性絶縁シートを積層して本体が作られる
積層型電子部品なら、いずれのものにも適用可能
である。
The method of the present invention can be applied not only to laminated ceramic capacitors as in the above embodiments, but also to any laminated electronic component whose main body is made by laminating heat-resistant insulating sheets, such as laminated inductors.

上述の通り本発明は、本体両端部に形成された
第1電極層の上に、乾式メツキといわれるスパツ
タリング、真空蒸着もしくはプラズマ溶射のいず
れかによりニツケルの第2電極層とすずの第3電
極層とを順次に形成するもので、従来の方法のよ
うに本体が液中に浸漬することがないから、本体
内部に不純物が浸入するおそれが全くなく、本発
明方法により得られた電子部品では、かかる不純
物による容量の低下や絶縁抵抗の減少といつた特
性の劣化を生じない。従つて本発明によれば、長
期に亙つて安定動作する電子部品が得られ、しか
もその電子部品は、ニツケルの第2電極層とすず
の第3電極層とを有しているから、ハンダへの充
分な耐熱性、付着性があり、支障なく結線接続す
ることができる。
As mentioned above, the present invention provides a second electrode layer of nickel and a third electrode layer of tin by sputtering called dry plating, vacuum evaporation, or plasma spraying on the first electrode layer formed on both ends of the main body. Since the main body is not immersed in liquid as in the conventional method, there is no risk of impurities entering the inside of the main body. No deterioration of characteristics such as a decrease in capacitance or a decrease in insulation resistance due to impurities occurs. Therefore, according to the present invention, it is possible to obtain an electronic component that operates stably over a long period of time, and since the electronic component has a second electrode layer made of nickel and a third electrode layer made of tin, there is no need to apply solder to the electronic component. It has sufficient heat resistance and adhesion, and can be wired and connected without any problems.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明方法により得られる積層セラミ
ツクコンデンサの断面図、第2図は本発明方法の
各工程図、第3図A〜Eは前記各工程における半
成品の断面図である。 1……内部電極、2……本体、3……外部電
極、4……第1電極層、5……ニツケルの第2電
極層、6……すずの第3電極層、7……積層セラ
ミツクコンデンサ、9……エツチングレジスト。
FIG. 1 is a sectional view of a multilayer ceramic capacitor obtained by the method of the present invention, FIG. 2 is a diagram of each step of the method of the present invention, and FIGS. 3A to 3E are sectional views of semifinished products in each of the steps. DESCRIPTION OF SYMBOLS 1... Internal electrode, 2... Main body, 3... External electrode, 4... First electrode layer, 5... Second electrode layer of nickel, 6... Third electrode layer of tin, 7... Multilayer ceramic capacitor , 9...Etching resist.

Claims (1)

【特許請求の範囲】[Claims] 1 複数枚の耐熱性絶縁シート間に内部電極を介
在させ該シートを積層一体化して構成された積層
型電子部品の本体の両端部に、前記内部電極と電
気的に接続する外部電極を形成するにおいて、前
記積層型電子部品の本体の両端所要部に導電性ペ
ーストを付与し焼き付けて第1電極層を形成した
後、この第1電極層の上に、スパツタリング、真
空蒸着もしくはプラズマ溶射によりニツケルの第
2電極層とすずの第3電極層とを順次に被覆形成
することを特徴とする積層型電子部品の電極形成
方法。
1. External electrodes electrically connected to the internal electrodes are formed at both ends of the main body of the laminated electronic component, which is constructed by interposing internal electrodes between a plurality of heat-resistant insulating sheets and laminating the sheets together. After applying a conductive paste to required parts at both ends of the main body of the multilayer electronic component and baking it to form a first electrode layer, nickel is deposited on the first electrode layer by sputtering, vacuum evaporation, or plasma spraying. A method for forming an electrode for a laminated electronic component, comprising sequentially forming a second electrode layer and a third electrode layer made of tin.
JP9410584A 1984-05-10 1984-05-10 Method of forming electrode of laminated electronic part Granted JPS60236207A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9410584A JPS60236207A (en) 1984-05-10 1984-05-10 Method of forming electrode of laminated electronic part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9410584A JPS60236207A (en) 1984-05-10 1984-05-10 Method of forming electrode of laminated electronic part

Publications (2)

Publication Number Publication Date
JPS60236207A JPS60236207A (en) 1985-11-25
JPH031812B2 true JPH031812B2 (en) 1991-01-11

Family

ID=14101156

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9410584A Granted JPS60236207A (en) 1984-05-10 1984-05-10 Method of forming electrode of laminated electronic part

Country Status (1)

Country Link
JP (1) JPS60236207A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI497540B (en) * 2010-05-25 2015-08-21 Tokuden Kk Single-phased frequency tripling generation device, triple-phased frequency triping generation device and high frequency generation device

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0754780B2 (en) * 1987-08-10 1995-06-07 株式会社村田製作所 Method for manufacturing monolithic ceramic capacitor
JPH03225810A (en) * 1990-01-30 1991-10-04 Rohm Co Ltd Structure of terminal electrode film in stacked capacitor and formation of the film

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI497540B (en) * 2010-05-25 2015-08-21 Tokuden Kk Single-phased frequency tripling generation device, triple-phased frequency triping generation device and high frequency generation device

Also Published As

Publication number Publication date
JPS60236207A (en) 1985-11-25

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