JPH0318184A - Charge transfer device and solid-state image pickup device - Google Patents

Abstract

PURPOSE:To simplify the constitution of a charge transfer device and a solid- state image pickup device by supplying a negative power supply from a capacitive element charged by the switching to a prescribed power supply to a driver. CONSTITUTION:A negative power supply is supplied from a capacitive element CL, charged by switching to a prescribed power supply VE to a driver 2 in a charge transfer device having the driver 2 driving a charge transfer electrode. Thus, it is not required to use a DC/DC converter as a negative power supply and the need of provision of a large capacitance capacitor between the charge transfer device main body and the driver is eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a charge transfer device and a solid-state imaging device, and is suitable for application to, for example, a charge coupled device (CCD).

[Summary of the invention]

The present invention is a charge transfer device having a driver for driving a charge transfer electrode, and is configured to supply negative power to the driver from a capacitive element that is charged by switching to a predetermined power source. This eliminates the need to use a DC/DC converter as a negative power source, and also eliminates the need to provide a large capacity capacitor for level shifting between the charge transfer device main body and the driver.

[Conventional technology]

The CCD image sensor uses approximately 15V as the power supply voltage VIIO for the output MOSFET, and the clock pulse (hereinafter referred to as ■clock) for driving the vertical register c and below (hereinafter referred to as ■register) is a three-value level (H, M , L). Then, this ternary level (}I, M
．． L): H level -10 to 15V, M level =
5~OV, L level=-7~-10V are most often used.

With such a 3-level (H, M, L) clock,
Conventional CCD image sensors that drive registers require at least three types of power sources, including a negative power source, so when making a video camera using this CCD image sensor, for example, it is difficult to miniaturize. There are many things.

For example, if the M level is set to O■ and the H level is set to be the same as VDD, or ■. If you create it by dividing it, you will have a negative power supply for L level and V. It is possible to drive the (2) clock using only 0, and furthermore, if the negative power supply for the L level can be eliminated, it is possible to drive the (2) clock using only VOO.

9 to 11 show conventional COD V clock drive circuits.

Figure 9 shows an example of a low-level clamp type drive circuit.
As shown in FIG. 9, in this example, a V driver 10 for driving a V register is connected to a CCD 101 via a capacitor 102.
3 is connected. Further, a negative power supply circuit 104 is connected to this V driver 103. Reference numeral 105 indicates a diode.

Further, reference numeral 106 indicates a timing generator. This ninth
In the example shown in the figure, the driver 103 creates only the amplitude of the V clock from the voltage supplied externally, the bias level is cut by the capacitor 102, and the diode 105
Clamp to L level (Vt.) with . FIG. 10 shows an example of a high level clamp type drive circuit. In the example shown in FIG. 10, only the amplitude of the V clock is created by the driver 103, the bias level is cut by the capacitor 102, and the diode 105 clamps it to the H level (vH). FIG. If shows a V driver 103 configured by CMOS.
In this example, the CCD 101 and driver 103 are directly connected. [Problems to be Solved by the Invention] The conventional drive circuit shown in FIGS. 9 and 10 described above, for example, when driving the V register with four-phase clocks,
Four large capacitors 102 and four diodes 105 are required. In addition, in the example shown in FIG.
The negative power supply circuit 104 is used only for bias, and does not actually work as a negative power supply for the V driver 103. On the other hand, in the example shown in FIG. 11, CCD 1 0 1 and V
Because it is directly connected to the driver 103, the
Although a large-capacity capacitor is not required as in the example shown in FIG. 0, a DC/DC converter is required as the negative power supply circuit 104.

Therefore, an object of the present invention is to provide a charge transfer device that eliminates the need to use a DC/DC converter as a negative power source and eliminates the need to provide a large capacity capacitor for level shifting between the charge transfer device main body and a driver. There is a particular thing.

Another object of the present invention is to eliminate the need to use a DC/DC converter as a negative power supply, and also to eliminate the need to provide a large capacity capacitor for level shifting between the solid-state imaging device main body and the driver of the vertical register. An object of the present invention is to provide an imaging device.

The above objects and other objects of the present invention will become clear from the following description.

[Means for Solving the Problems] In order to achieve the above object, the present invention is designed as follows. The invention of claim 1 provides a driver (
2) in a charge transfer device having a predetermined power supply (Vt
) is charged by switching to a capacitive element (C
A negative power source is supplied to the driver (2) from the driver (2).

According to a second aspect of the invention, in the first aspect of the invention, another capacitive element (C,) is connected to the wiring that supplies the negative power.

The invention according to claim 3 provides a driver (
2), when the vertical register is stopped, the capacitive element (Ct) is connected to a predetermined power supply (V,) to charge the capacitive element (CL), and when the vertical register is activated, the capacitive element (CL) is charged. A negative power source is supplied from the driver (2) to the driver (2).

According to a fourth aspect of the present invention, in the third aspect of the present invention, another capacitive element (C,) is connected to the wiring that supplies the negative power.

[Effect]

According to the invention of claim 1, since the negative power source is configured to be supplied to the driver (2) from the capacitive element (CL) charged by switching to a predetermined power source (V.), the negative power source is There is no need to use a DC/DC converter as a power source. In addition, since it is possible to directly connect the charge transfer device main body and the driver (2),
There is no need to provide a large capacity capacitor for level shifting between the charge transfer device and the driver (2) as in the past. According to the invention of claim 2, the other capacitive element (C,) connected to the wiring that supplies the negative power source is connected to the predetermined power source (V,) for a certain period of time to be charged, and then the other capacitive element (C,) is charged. Since negative power can be supplied to the driver (2) while charging the capacitive element (CL) from the element (C,), in addition to the above-mentioned advantages of the invention of claim 1, the negative power can be supplied with low power consumption. The advantage is that you can get According to the invention of claim 3, when the vertical register is stopped, the capacitive element (C,) is connected to the predetermined power supply (V,) to charge the capacitive element (CL), and when the vertical register is in operation, the capacitive element (CL) is charged. ), the negative power source is supplied to the driver (2) from the main body of the solid-state imaging device and the driver ( 2) There is no need to install a large-capacity capacitor for level shifting between the two. According to the invention of claim 4, since the other capacitive element (C,) is connected to the wiring for supplying the negative power, in addition to the above-described advantages of the invention of claim 3, the invention of claim 2 and the other capacitive element (C,) are connected. There are similar benefits.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. This example is an example in which the present invention is applied to a CCD image sensor. FIG. 1 shows a CCD image sensor according to this embodiment, and particularly shows the drive circuit section of its V driver.

As shown in FIG. 1, in this embodiment, the CCD
A V driver 2 made of CMOS is directly connected to the V driver 2 . A timing generator 3 is connected to this V driver 2. Further, a capacitor CL whose one end is grounded is connected to this V driver 2. As mentioned below, this one? Capacitor CL acts as a negative power supply for V driver 2.

This capacitor CL has a switch Silo sll.
SZI+ Sol, resistance r lI+ r I! +
r! A switched capacitor is connected from l+r 22 and capacitor CE. Here, one end of the resistor rl1 is connected to the switch S. When closed, the power supply V,
It is now connected to. FIG. 2 shows an example in which the switched capacitor configured as described above is formed into a CMOSIC on a semiconductor substrate.

In FIG. 2, reference numeral 4 is, for example, n-type silicon (St).
A semiconductor substrate such as a substrate is shown. A gate electrode C+ is placed on this semiconductor substrate 4 via a gate insulating film (not shown).
+, G+t. G■,G. ．． is provided. Code 5,
Reference numerals 6 designate, for example, p-type source and drain regions formed in the semiconductor substrate 4, respectively. These gate electrodes G. , source region 5 and drain region 6 form p-channel MOSFETQ, . is configured. and,
This P-channel MOSFET Q, , is shown in FIG. Itch S. is configured. Further, reference numeral 7 indicates a p-well formed in the semiconductor substrate 4. Reference numerals 8 and 9 indicate, for example, an n-type source region and drain region formed in the p-well 7, respectively. Gate electrode G. , the source region 8 and the drain region 9 form an n-channel M O
S F E T Q! + is configured. and,
This n-channel MOSFET Q2 constitutes a switch SZ+ shown in FIG. Note that the reference numeral 10 indicates, for example, a p0 type semiconductor region. Reference numerals 11 and 12 indicate, for example, p-type source and drain regions formed in the semiconductor substrate 4, respectively. A p-channel MOS is formed by the gate electrode G1, the source region 11, and the drain region 12.
FETQ. ■ is configured. The p-channel MOSFET Q + z constitutes the switch S1■ shown in FIG. 1. Also, code 13
indicates a p-well formed in the semiconductor substrate vi4. Reference numerals 14 and 15 indicate, for example, an n-type source region and drain region formed in this p-well 13, respectively. Gate electrode G! ! , source region 14 and drain region 15
Therefore, the n-channel MOS FET Qzz is under threat. And this n-channel MOSFETQzz
Thus, the switch Szg shown in FIG. 1 is configured.

Note that the reference numeral 16 indicates, for example, a p-type semiconductor region.

On the other hand, in FIG. ,C. indicate capacitors for level shifting, and symbols D,,D. indicates a diode for level shifting. However, these capacitors C.
,C. is the capacitor 102 shown in FIGS. 9 and 10.
Unlike, a small capacity one is sufficient.

Next, a method of driving the V driver using the switched capacitor configured as described above will be explained.

Here, explanation will be given taking as an example the case where the register (1) is driven by four-phase clocks.

FIG. 3 shows the pulse φ1. used to drive the above-mentioned switched capacitor. The waveform of φ2 is shown. As shown in FIG. 3, in this example, one horizontal scanning period, that is, IH (usually 6
3. 5 usec), during the effective period when the clock is not running (image display period), φ1=L.φ
2==L, in which case the p channel M shown in FIG.
O S F E T Q. , Q+z turns on and n
Channel MOSFET Qz+, Qzz
is off. At this time, as shown in FIG. 4, the power supply vE is connected to the capacitor C, and a current i flows, charging the capacitor C. Due to this charging, the voltage E at one end of the capacitor C increases with time t as shown in FIG. Since the V driver 2, which is controlled by CMOS, does not consume current when not in operation, the capacitor C
The voltage vL at one end of L is constant during this charging.

Next, as shown in FIG.
The p-channel MOS FETQII shown in FIG.
, Q1g is off, and Δt (for example, 1 0 nse
c = 1 usec) and then as φ2-H, the n-channel MOSFET Qt+. Turn on Qzz. As a result, as shown in FIG. 5, the capacitor CI charged as described above is connected to the capacitor CL. Then, the V driver 2 is driven before charging the capacitor CL from the capacitors C and CL. In this case, the voltage E at one end of the capacitor Ct drops to the original voltage level in four steps, corresponding to the register being driven by four-phase clocks, and correspondingly, VL rises four times ( (See Figure 3). Charge is sent to the CCD 1 through the V driver 2 at each rising edge of .

The time constant when charging the capacitor Ct shown in FIG. 4 is the resistance rll+rl! Both resistance values are r. Then, 2r
It is IxCE. On the other hand, as shown in FIG. 5, the time constant when charging the capacitor Ct is equal to the resistance r 1+. r2
! If the resistance value of both is r2, then 2 rz [ (
Ct CL ) / (Ct + Ct )].

In the case shown in FIG. 5, (1) the power supply capacity when viewed from the driver 2 is Ct+CL. Here, ■When the driver 2 requires a current consumption of, for example, 5 mA, for example, Ct
If you choose ==Ct =0.5μF, Ct +CL =1
uF, and on the other hand, if r+'i50Ω and rz=20Ω, then VLLi-9V (I
Vt l? 9V). Then, this vL can be used as a negative power supply for the driver 2.

As described above, according to this embodiment, vL obtained by charging the capacitor C of the CMOSIC switched capacitor during the effective period and charging the capacitor CL from this capacitor CE during H blanking is (2) Since it is used as a negative power supply for the driver 2, there is no need to use a DC/DC converter as a negative power supply circuit as in the past. Moreover, since the CCD 1 and driver 2 are directly connected, there is no need for a large capacity capacitor for level shifting, which was required in the past. As a result, when this CCD image sensor is used for a video camera, for example, the video camera can be made smaller and lower in price.

In addition, capacitor C. , CL are charged once to IH, so p-channel MOSFETQ. ,QI!
and NCHNEL LtMO S F E T Qzr. Q
．． The power required to drive can be minimized. For example, each MOSFETQI1,Ql
If the gate capacitance of t + Q t + + Q z t is, for example, about 10 pF, ■ the amplitude of the clock is IOV
These p-channel MOSFETs Q.
．． Q + t and n channel MOSFET
Qt+. The power required to drive Qgz is 60μ
It can be seen that the power consumption is approximately W, which is extremely low power consumption.

Furthermore, if the above-mentioned switched capacitor and V driver 2 are integrated into a CMOS IC, the number of ICs will not increase. Furthermore, if the IC for the timing generator 3 incorporates the driver 2 and the switched capacitor, the number of ICs can be reduced by one.

Next, FIGS. 6 to 8 show configuration examples of a driving circuit for a CCD image sensor including a driver (H driver) for driving a horizontal register.

FIG. 6 shows an example in which the CCDI, H driver 17, driver 2, and timing generator 3 are configured with separate ICs.
In this case, four ICs are required.

FIG. 7 shows an example in which the H driver 17 and the timing generator 3 are integrated into an IC, and in this case, three ICs are required.

On the other hand, FIG. 8 shows an example in which the H driver 17, the {circle around (2)} driver 2, and the negative power supply 1 are integrated with the timing generator 3 into an IC, and in this case, two ICs are required.

Although the embodiments of the present invention have been specifically described above, the present invention is not limited to the above-described embodiments, and various modifications can be made based on the technical idea of the present invention.

For example, capacitor GE. The capacity of CL is not necessarily limited to the value described in the above embodiment, and can be selected as necessary. Further, in the above-described embodiments, the case where the present invention is applied to a CCD image sensor has been described, but the present invention can also be applied to, for example, a BBD which is a type of charge transfer device.

〔Effect of the invention〕

Since the present invention is configured as described above, it has the following effects.

According to the first aspect of the invention, there is no need to use a DC/DC converter as a negative power source, and there is no need to provide a large capacity capacitor for level shifting between the charge transfer device and the driver.

According to the invention of claim 2, a negative power source can be obtained with low power consumption. According to the third aspect of the invention, there is no need to use a DC/DC converter as a negative power source, and there is no need to provide a large capacity capacitor for level shifting between the solid-state imaging device main body and the driver.

According to the fourth aspect of the invention, a negative power source can be obtained with low power consumption.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a CCD image sensor according to an embodiment of the present invention, FIG. 2 is a sectional view showing an example of converting the switched capacitor shown in FIG. 1 into an IC, and FIG. 3 is similar to FIG. 1. A waveform diagram for explaining the driving method of the V driver using the switched capacitor shown in FIG. 4, FIG. 4 shows the capacitor C during the effective period. Figure 5 is a circuit diagram to explain the charging of the V clock from capacitor C during H blanking to capacitor CL, and Figures 6 to 8 are respective circuit diagrams. FIGS. 9 to 11 are block diagrams each showing an example of a drive circuit for a conventional V driver of a CCD image sensor. ? Explanation of main symbols on the screen 1: CCD, 2: V driver, NG generator, Sll1 31! lS! Inchi,
GE, Ct: capacitor, p-channel MO
SFET, Q■. channel MOSFET,

Claims (1)

[Claims] 1. A charge transfer device having a driver for driving a charge transfer electrode, characterized in that a negative power source is supplied to the driver from a capacitive element that is charged by switching to a predetermined power source. charge transfer device. 2. The charge transfer device according to claim 1, wherein another capacitive element is connected to the wiring for supplying the negative power supply. 3. In a solid-state imaging device having a driver that drives a vertical register, a capacitive element is connected to a predetermined power source to charge this capacitive element when the vertical register is stopped, and a negative power source is supplied from the capacitive element when the vertical register is operated. A solid-state imaging device configured to supply to the driver. 4. The solid-state imaging device according to claim 3, wherein another capacitive element is connected to the wiring for supplying the negative power supply.