JPH03181871A - Method for inspecting integrated circuit - Google Patents

Abstract

PURPOSE:To accurately set a condition by monitoring the voltage across both terminals of a resistor generated by the sum of the current flowing in the resistor from a current applying source and the current flowing in the resistor as the base current of an input PNP transistor. CONSTITUTION:An emitter current I3 flows to an input PMP transistor Q1 by turning the transistor Q1 ON/OFF and the input voltage VB1 of the differential amplifier of the next stage is determined. A current I5 also flows to resistors R6, R7 and the bias voltage VB2 of one NPN transistor Q3 is determined. When the voltage VB1 becomes higher than the voltage VB2, a collector current I4 flows to a transistor Q2 to output voltage VOUT to an output terminal. When the voltage VB1 is lower than the voltage VB2, VOUT=Vcc is formed. Voltage VRX is generated through a resistor R4 by the current I1 flowing in the resistor RX of a resistor 2 from the current applying source 1 and the current I2 flowing in the resistor Rx as the base current of Q1. The value obtained by subtracting the voltage I1XRx from this voltage VRX can indirectly ellucidate the relation between I2 and I3 as the input voltage due to the base current of Q1 and Q1 is controlled to inspect the output state of a differential amplifier.

Description

[Detailed description of the invention] Industrial applications The present invention relates to a method for testing integrated circuits.

2. Description of the Related Art A conventional method for testing an integrated circuit having an open base input terminal will be described with reference to the connection diagram shown in FIG.

Input PNP) From the midpoint between the transistor Q'+o, the resistor R+ connected from its emitter terminal, and the resistor R2 connected in series to the power supply line, the next stage human power NP is input.
N Transistor Q to * 03 configuring the next stage differential amplifier connected to the base terminal of transistor Q20
0 through the collector of one of the transistors Q20, which constitutes the differential amplifier. The other transistor Q30 of Q30
The collector of is connected to the power supply line by a resistor R5 like the transistor Q2G, and further connected to the power supply line by the transistor Q2o.
The emitters of tQ30 are connected to each other and grounded through a resistor R4 to form a constant current source. The base of the transistor Qso is supplied with a reference bias that determines the operating point of the differential amplifier, and is connected to resistors Re and R.
7 is connected in series between the power supply line and the ground line, and the transistor Q3G is connected from the midpoint of the resistors RB and R7.
The bias is supplied to the base of

The differential amplifier with the above configuration is cited as an example of the conventional example, and the input PNP transistor Q+ is used as the input application method.
An applied voltage source 31 is connected to the base terminal of o.

The operation of the conventional testing method for an integrated circuit having an open base input terminal configured as described above will be described below.

By turning on and off the input PNP transistor Q+o, an emitter current ■1 flows through the input PNP transistor Qto, and the input voltage of the next stage differential amplifier, that is, the transistor Q
2G base voltage ■1 is VBI ” Vcc r I
Determined by X R2. This voltage and transistor Qs
Depending on the relationship with the bias voltage applied to the base of o, the next stage NPN) transistor Q2G is ON or 0FFL, and when the transistor Q20 is ON, the collector current 14 flows.
Voltage V output to the output terminal. ut is Vout=Vc
A voltage determined by c I 4×R3 is output.

In this way, the operating state of the next-stage differential amplifier is tested by directly applying the voltage that turns on the input PNP transistor Q+o from the applied voltage source.

Problem to be Solved by the Invention In an operating state where a bias is applied to the base of the transistor Q+o, it is not possible to grasp minute fluctuations in the emitter current (1) due to fluctuations in the base current (2) due to variations in Hfe, and the voltage applied to the input PNP (PNP) transistor Q+o and In the relationship between the differential amplifier output voltages, Hfe of the transistor Q+o
The ratio of r2+rl due to variations becomes an uncertain element in the input transistor Q+.

There was a problem in that it was not possible to accurately measure the input/output characteristics between the bias application to the output transistor Q2G and the collector voltage of the output transistor Q2G. That is, in the active region of the transistor, the following relationship holds between I+ (Ig), 12 (IB), and 13 (IC).

IE=rB+Icr From the above equation, it can be seen that even if the bias voltage at the base of the input transistor Q+o is constant, the transistor Hfe influences 11, which determines whether the transistor in the next stage differential amplifier is turned on or off.

The present invention solves the above-mentioned conventional problems, and the input PN
Considering that the Hfe variation of the P transistor Q+o affects the input voltage fluctuation of the next-stage differential amplifier, the purpose is to be able to set the input voltage fluctuation as a condition for applying human power at the time of input/output characteristics inspection.

Means for Solving the Problems: An input PNP transistor having an open base input terminal and a differential amplifier at the next stage from the midpoint of the first and second two resistors connected in series from the emitter of the input PNP transistor to the power supply terminal. The transistor Q2. Q3
is connected to the base of one of the NPN transistors, and a third resistor is connected from the collector to the power supply terminal as a load, and when measuring input/output characteristics in an integrated circuit, the output is output from the collector of the second transistor. , as an input application method, one end of the fourth resistor is connected to the base input terminal of the transistor, and the other end is grounded,
Connect the applied current source to the base input terminal. a current flowing into the fourth resistor from the applied current source and the input PN;
By monitoring the voltage across the fourth resistor generated by the sum of currents flowing into the fourth resistor as the base current of the P transistor, the P
The Hfe variation fluctuation of the NP transistor is converted,
A method for testing an integrated circuit, characterized in that the variation in Hfe of the input PNP transistor can be accurately set as an input application condition when testing input/output characteristics.

Effect With the above configuration, the current flowing into the fourth resistor by the applied current source and the voltage across the resistor generated by flowing into the fourth resistor as the base current of the input PNP transistor can be reduced. By monitoring, the variation in the Hfe of the input PNP transistor is converted to the current source setting current, and this becomes the input voltage, allowing the input conditions to be accurately read when inspecting the input/output characteristics.

Embodiment Hereinafter, an embodiment of the method for testing an integrated circuit having an open base input terminal according to the present invention will be described with reference to FIG.

In FIG. 1, the input application method is to connect one end of a resistor Rx to the base input terminal 3 of the input PNP transistor QI, ground the other end, and connect the applied current source 1 to the base input terminal 3. . Note that the other configurations are the same as those shown in FIG. 3.

The operation of the method for testing an integrated circuit having an open base input terminal according to the present embodiment configured as described above will be described below.

An emitter current I3 flows through the transistor Q1 by turning the input PNP transistor Q+ ON and OFF, and the input voltage Q2 of the next stage differential amplifier Vfl is VBI=VCIC13.
Determined by XR2. On the other hand, a current 5 determined from the power supply voltage also flows through the resistors Re and R7, and the bias voltage VB2 of the other NPN transistor Q3 constituting the differential amplifier is determined by . When the voltage of VBI becomes higher than VB2, NPN transistor Q2 is in ON state, and the other NPN transistor is in ON state.
PN) The transistor Q3 is turned off, the collector current I4 flows through Ql, and the voltage V is output to the output terminal.

ut outputs the following: Vout=Vcc I 4 X R3. Also, when the voltage of VB1 is lower than VB2, Ql is O
FF and Q3 are turned ON, and the current 4 flowing through Ql becomes O, so it becomes V. ut becomes voutξVCC.

The voltage VRx generated through the resistor Rx by the current ■1 flowing into the resistor Rx from the applied current source 1 and the current I2 flowing into the resistor Rx as the base current of the input PNP transistor Q1 is VRX=RXX (1++ 1
2) It becomes.

The value obtained by subtracting the voltage valve IIxRx from this voltage is the input voltage due to the base current of the input PNP transistor QI.■ The relationship between 2 and 13 can be indirectly clarified, and the output state of the differential amplifier can be checked by controlling Ql. It is something to do.

As described above, according to this embodiment, by applying a current in the input application method, the base current of the input PNP transistor QI is 1. By setting the voltage generated by the added current and resistor R as the input voltage, the variation in Hfe of the input PNP transistor is indirectly converted to the current source setting current. The conditions applied to the differential amplifier input stage transistor Q2 can be accurately known.

Next, FIG. 2 shows an embodiment of the present invention in which an NPN type is used as an input transistor and a PNP type is used as a transistor constituting a differential amplifier.

The operating principle of this embodiment configured as described above is the same as that of the embodiment shown in FIG. Q2 and Q3 are transistors 4 and 8.10 in Figure 1.
corresponds to each.

Effects of the invention The current flowing into the resistor from the applied current source and the input PNP
By monitoring the voltage across the resistor generated by the sum of currents flowing into the resistor as the base current of the transistor, the Hfe variation of the input PNP transistor is converted to the current source setting current, and the input P
Variations in the input terminal of the next-stage differential amplifier due to variations in Hfe of the NP transistors can be accurately set as input application conditions when measuring input/output characteristics.

[Brief explanation of drawings]

1 and 2 are circuit diagrams showing embodiments of the present invention;
The figure is a circuit diagram showing a conventional inspection method. 1... Applied current source, 2... Resistor R8
, 3... Input terminal, 4... Input PNP
(NPN)) Resistor Q1.5... Resistor R1, 6... Resistor R2, 7... Resistor R3, 8... Differential amplifier NPN that constitutes
(PNP) Transistor Q2.9...Resistor R4,10...NPN constituting the differential amplifier
PNP) Transistor Q3.11...Resistor R
5, 12...Resistor R6, 13...Resistor R7, 14...VCC line, 15...
...Output terminal, 16...Ground line.

Claims (1)

[Claims] Transistors Q_2, Q_ that form the next stage differential amplifier are connected from the midpoint between an input PNP transistor having an open base input terminal and first and second two resistors connected in series from the emitter of the input PNP transistor to the power supply terminal.
When measuring the input/output characteristics of an integrated circuit, the collector of the second transistor is connected to the base of one of the NPN transistors, the third resistor is connected to the power supply terminal as a load, and the output is output from the collector of the second transistor. As an input application method, one end of a fourth resistor is connected to the base input terminal of the input PNP transistor, and the other end is grounded.
Connect the applied current source to the base input terminal. a current flowing into the fourth resistor from the applied current source and the input PN;
By monitoring the voltage across the fourth resistor generated by the sum of currents flowing into the fourth resistor as the base current of the P transistor, the P
The Hfe variation fluctuation of the NP transistor is converted,
A method for testing an integrated circuit, characterized in that it is possible to accurately set input voltage fluctuations of the next stage differential amplifier due to variations in Hfe of the input PNP transistor as an input application condition when testing input/output characteristics.