JPH03182946A - Memory interface - Google Patents

Abstract

PURPOSE:To attain circulation in a specified memory area to execute access without depending on software by providing an offset register, a mask register, an AND means, a base register and an addition means. CONSTITUTION:When an absolute address circulates in the memory area for 256 bytes in the range of 0500-05 FF so as to attain access, 0500 being the head address of the memory area is stored in the base register 1 and 00FF showing the accessible range of the memory area is stored in the mask register 3. Offset addresses in the offset register 2 are sequentially incremented and the AND gate 4 sets higher eight bits of the offset addresses to be invalid. Then, the effective address in the range of 0500-05FF is repeatedly outputted from the adder 5. Thus, the address can circulate in the specified memory area so as to attain access without depending on software, and a burden on a software-side can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to a memory interface that allows circular access within a specific memory area.

``Prior art-1 For example, as shown in Figure 2, the absolute address is (050
The 256-byte memory area within the range 0) - (05FF) - is regarded as a closed memory space, and when trying to access this memory space by cycling, conventionally,
The only option was to use indirect addressing through software.

In this case, as shown in FIG. 3, from the offset address (0500), which is sequentially incremented.

Address calculation is required to repeatedly calculate the effective address within the range of ~(05FF')-.

``Problems to be Solved by the Invention'' However, when accessing a specific memory area by cycling through indirect addressing by software as described above, many steps must be executed, which is a burden on the software side. There was a problem that it became heavy.

The present invention has been made in view of the above-mentioned circumstances, and it is an object of the present invention to provide a memory interface that allows circular access within a specific memory area without depending on software.

"Means for Solving the Problem" This invention provides a base register that stores the start address of a specific memory area as a base address, an offset register that stores an arbitrary offset address, and an accessible range of the memory area. a mask register for storing a value; an AND means for obtaining an AND of each bit of the value stored in the offset register and each bit of the value stored in the mask register; and adding means for adding the value to the base address and outputting the result as an effective address.

Effect-1 According to the above configuration, when the offset address stored in the offset register is sequentially incremented, each bit of the value is ANDed with each bit of the value stored in the mask register. In other words, of the offset address that is sequentially incremented, bits outside the accessible range of a specific memory area are invalidated, and the value within this accessible range is added to the base address to obtain the effective address. It will be done.

"Example" Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a diagram showing the configuration of an embodiment of the present invention. In this figure, 1 is a 16-bit base register that stores the start address of a specific memory area as a base address, and 2 is a 16-bit base register that stores an arbitrary offset address.
The bit offset register 3 is a 16-bit mask register that stores a value indicating the accessible range of a specific memory area. Also, 4 is offset register 2
AND gate 5 calculates the AND of each bit of the 16-bit value stored in the mask register 3 with each bit of the 16-bit value stored in the mask register 3. This is an adder that adds to the base address stored in register 1 and outputs it as an effective address.

In the above configuration, as shown in FIG.
When attempting to access a 56-byte memory area by cycling, store (0500) -, the start address of the memory area, in base register ■, and indicate the accessible range of the memory area in mask register 3 (OOFF
') =, then as shown in Figure 3,
By simply incrementing the offset address in the offset register 2 sequentially, the AND gate 4 invalidates the upper 8 bits of the offset address, and the adder 5
Effective addresses within the range from (0500) to (05FF') are repeatedly output.

"Effects of the Invention" As explained above, according to the present invention, by simply incrementing the offset address stored in the offset register in sequence, each bit of that value and the value stored in the mask register can be Each bit is logically ANDed, that is, of the sequentially incremented offset address, bits outside the accessible range of a specific memory area are invalidated, and the value within this accessible range is used as the base. Since it is added to the address to obtain the effective address, it is possible to cycle through and access a specific memory area without depending on software as in the past, reducing the burden on the software side. can. Additionally, since any closed memory space can be set, programs can be simplified and filter operations such as digital signal processing can be easily performed.Furthermore, various irregular addressing can be done by storing values in the mask register. Effects such as being made possible can be obtained.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.
FIG. 2 is a conceptual diagram of the case where a specific memory area is accessed in a circular manner, and FIG. 3 is a diagram showing the relationship between offset addresses and effective addresses in the case of circular access. Base register, offset register, mask register, AND gate (logical product means), adder (addition means).

Claims (1)

[Claims] A base register that stores a starting address of a specific memory area as a base address, an offset register that stores an arbitrary offset address, and a mask register that stores a value indicating an accessible range of the memory area. , an AND means for logically multiplying each bit of the value stored in the offset register and each bit of the value stored in the mask register, and assigning the value obtained by the AND means to the base address. A memory interface comprising: an addition means for adding and outputting the result as an effective address;