JPH03185380A - Underwater detection device - Google Patents

Abstract

PURPOSE:To reduce the load of a CPU by transmitting the receiving signal data obtained on the basis of the transmission and reception of an ultrasonic vibrator to a working RAM by a DMA controller without passing the same through the CPU. CONSTITUTION:The parameter such as the number of bits to be transmitted to a working RAM 10 is preset to a DMA controller 19 from a CPU 9. A transmission trigger pulse is sent to the DMA controller 19, a sample clock generating circuit 4 and a transmission circuit 13 from the CPU 9. Ultrasonic beam is transmitted from an ultrasonic vibrator 1 and the receiving signal outputted from the ultrasonic vibrator 1 is digitalized by an A/D converter 3. The DMA controller 19 directly transmits the output from the A/D converter 3 to the working RAM 10. The CPU 9 reads the image data stored in the working RAM 10 to display the same on a display device 11.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to an underwater detection device that emits an ultrasonic beam underwater, receives the ultrasonic echo, samples the received signal, and displays an image.

BACKGROUND ART Conventional underwater detection devices of this type include those having the configurations shown in FIGS. 3 and 4.

The device shown in FIG. 3 emits an ultrasonic beam into water from an ultrasonic transducer 1, receives the ultrasonic echo again by an ultrasonic transducer l, and receives a received signal output from the ultrasonic transducer 1. The signal is sent to the A/D converter 3 via the receiving amplifier 2.

Then, this received signal is digitized in synchronization with the sample clock output from the sample clock generator 4,
This received signal data is sequentially stored in the address position indicated by the address counter 7 of the l-line buffer memory 6. When data for one line (N dots) of the ultrasonic beam is stored in the l-line buffer memory 6, the address counter 7 counts up, and in response, a sample end signal generator 8 sends a sample end signal. A signal is generated. In response to this sample end signal, the CPU 9 takes in 1947 worth of data stored in the l line buffer memory 6, transfers it to the working RAM l0, and stores it. When the amount of image data necessary for image display is stored in the working RAM 10, the CPU 9 reads the data from the working RAM 10 and transfers it to the video RA.
It is output to the display 11 via M12. As a result, underwater detection information is displayed as an image on the display 11.

On the other hand, in the apparatus shown in FIG.
The buffer memory 15 for n dots (for example, n
= 12 dots), and every time data for n dots is stored in this buffer memory 15, an interrupt signal is generated from the interrupt signal generator 17 to the CPU 9 in response to a count up signal output from the n dot address counter 16. By applying a signal, 1947 worth of data is transferred to the working RAM 10 through N/n interrupt processing.

<Problem to be solved by the invention> However, in the former device shown in FIG.
In particular, in order to achieve high resolution, the capacity of the buffer memory 6 must be correspondingly large. Further, since the CPU 9 needs to take in the data in the l-line buffer memory 6 after sampling the data, the load on the CPU 9 increases.

In addition, in the latter device shown in FIG.
Although there is an advantage that the capacity of the CPU 5 and the count number of the address counter 16 are small, the interrupt processing of the CPU 9 occurs frequently, so that the processing of the CPU 9 may not be in time. In particular, when it is necessary to sample the received ultrasonic signals reflected from a shallow part of the water with high resolution, the sampling frequency becomes high and the generation cycle of the interrupt signal becomes short accordingly. The interrupt signal generation cycle may be shorter than the processing time, and as a result,
This causes problems such as the CPU 9 being unable to import data.

Means for Solving the Problems> The present invention has been made in view of the above circumstances, and has an object to simplify the circuit configuration by eliminating the need for a buffer memory, etc., and to reduce the burden on the CPU. It is something to do.

Therefore, the present invention provides an ultrasonic transducer that transmits and receives an ultrasonic beam, an A/D converter that digitizes a reception signal based on ultrasonic echoes received by the ultrasonic transducer, and an A/D converter. An underwater detection device including a working RAM that stores received signal data as image data, a CPU that reads the image data from the working RAM, and a display that displays the image data has the following configuration.

That is, in the present invention, the output from the A/D converter is transferred to the working RAM by a transmission trigger pulse that determines the ultrasonic emission timing of the ultrasonic transducer.
It is characterized by the provision of a DMA controller that performs direct transfer without going through the U.

<Operation> According to the above configuration, each time a transmission trigger pulse that determines the ultrasonic emission timing of the ultrasound transducer is generated, the data received by the ultrasound transducer in response to this transmission trigger pulse is sent to the CPU. Working RAM directly without intervention
Since the data is transferred to , not only is there no need for a buffer memory, but the load on the CPU is also reduced.

<Embodiment> FIG. 1 is a block diagram of an underwater detection device, and parts corresponding to the conventional example shown in FIGS. 3 and 4 are given the same reference numerals.

In FIG. 1, 1 is an ultrasonic transducer, 2 is a receiving amplifier,
3 is an A/D converter, 4 is a sampling clock generator, 9 is a CPU, 10 is a working RAM, If is a display, ! 2 is video RAM.

I3 is a transmission circuit that outputs an excitation drive pulse for the ultrasonic transducer I in response to a transmission trigger pulse that determines the ultrasonic emission timing of the ultrasonic transducer I.

Further, 19 is a DMA controller that is activated by the above transmission trigger pulse given from the CPU 9 and directly transfers the output from the A/D converter 3 to the working RAM 10 without going through the CPU 9, and 20 is a pass line from the DMA controller 19. This is a bus switching unit that switches the pass line and connects it to the working RAM 10 in response to a release request.

Next, the data transfer operation of the underwater detection device having the above configuration will be explained based on the timing chart shown in FIG.

The CPU 9 sets parameters such as the number of bits to be transferred to the working RAM 10 in advance for the DMA controller 19.

Next, when the CPU 9 outputs a transmission trigger pulse that determines the ultrasonic emission timing of the ultrasonic transducer l, this transmission trigger pulse is sent to the DMA controller 19, the sample clock generator 4, and the transmission circuit 13, respectively. . In response to this transmission trigger pulse, the transmission circuit 13 outputs an excitation drive pulse to the ultrasonic transducer l, whereby the ultrasonic transducer l transmits an ultrasonic beam toward the water. Further, in response to the transmission trigger pulse, the sample clock generation section 4 generates a sample clock, and the DMA controller 19 operates the bus switching section 20 to switch off the pass line.

The reception signal output from the ultrasonic transducer 1 is sent to the A/D converter 3 via the reception amplifier 2, so the A/D converter 3
The D converter 3 digitizes this received signal in synchronization with the sample clock from the sample clock generator 4. Subsequently, the DMA controller 19 synchronizes with the sample clock from the sample clock generator 4 and performs the A/D
The output data from the converter 3 is directly transferred to the working RAM 10 via the bus switching unit 20. When the data of the number of bits preset by the CPU 9 is sampled,
The DMA controller 19 stops the data transfer operation and sends an interrupt signal to the CPU 9.
U9 recognizes that the data sample has ended.

When the amount of image data necessary for image display is stored in the working RAM 10, the CPU 9 reads the data from the working RAM 10, performs processing such as cross-correlation, and then stores the data in the video RAM 12. Then, video r (AMI2 data is TV
It is read out in synchronization with scanning and output to the display 11.

As a result, underwater detection information is displayed as an image on the display 2.

<Effects of the Invention> According to the present invention, the received signal data obtained based on the transmission and reception of the ultrasonic transducer is directly transferred to the working r (AM) without going through the CPU, so there is no need for a buffer memory. This not only simplifies the process, but also reduces the burden on the CPU.Therefore, the CPU can perform other processing while data is being sampled, and the data sampling rate is limited by the D/A converter, RAM, and DMA.
Since it is limited only by the access time of peripheral logic such as a controller, high-speed sampling is possible.

[Brief explanation of drawings]

1 and 2 show an embodiment of the present invention, FIG. 0 is a block diagram of an underwater detection device, and FIG. 2 is a timing chart of data transfer of the same device. Figures 3 and 4 show conventional examples;
Both figures are block diagrams of underwater detection devices. ■...Ultrasonic transducer, 3...A/D converter, 4
...Sample clock generator, 9...CPU, 10
... Working RAM, 11... Display, 19...
- DMA controller, 20... bus switching section.

Claims (1)

[Claims] (1) An ultrasonic transducer that transmits and receives ultrasonic beams, an A/D converter that digitizes a received signal based on the ultrasonic echoes received by this ultrasonic transducer, and a received signal from this A/D converter. In an underwater detection device comprising a working RAM that stores data as image data, a CPU that reads image data from the working RAM, and a display that displays this image data, the ultrasonic emission timing of the ultrasonic transducer is controlled. An underwater detection device comprising: a DMA controller that is activated by a determined transmission trigger pulse and directly transfers the output from the A/D converter to the working RAM without going through a CPU.