JPH03185527A - Microprocessor - Google Patents

Abstract

PURPOSE:To prevent a program from generating runaway and to reduce the load of a software designer by generating an interruption at the time of changing the contents of a specific area of a memory which can be optionally set up from an external bus master with software. CONSTITUTION:When an address based upon the external bus master coincides with the value of a register 3, an interruption signal 8 is outputted to a microprocessor part 1 as the output of a comparator 4. Namely, an interruption signal 8 is generated by comparing an address for data writing with a value previously set up in the register 3 at the time of writing data in the memory by the external bus master. Since the generation of runaway in the program can be prevented and respective operation areas of plural external bus masters are not mutually controlled, the load of the software designer can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microprocessor, and more particularly to a microprocessor that rewrites memory contents when configured as a plurality of bus masters.

[Conventional technology]

Conventionally, when this type of microprocessor uses an external bus master, that is, a processor that can access memory or Ilo, and uses a DMA controller, etc., it has a structure that makes it impossible to recognize changes in memory contents caused by writing to memory by the external bus master. ing.

[Problem to be solved by the invention]

The above-mentioned conventional microprocessor has no means to recognize even if the memory contents are rewritten using an external bus mask. Therefore, there is a drawback that if the stack area or the like is rewritten, there is a possibility that the program will run out of control.

Furthermore, this requires the programmer to control mutual operation areas among a plurality of bus masters including microprocessors, which has the drawback of placing a heavy burden on the software designer.

SUMMARY OF THE INVENTION An object of the present invention is to provide a microprocessor that can prevent a program from running out of control when the contents of a specific memory area are changed, and can reduce the burden of software design.

[Means to solve the problem]

The microprocessor of the present invention includes a register that stores specific address information of an external storage device, a processor unit that is connected to the register and the address bus and performs various controls, and any address information input from the address bus and the and a comparison circuit that compares information stored in the registers and, when they match, sends an interrupt request signal to the processor section based on control of a memory write signal.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a microprocessor showing a first embodiment of the present invention.

As shown in FIG. 1, this embodiment includes a microprocessor section 1 that is in charge of a conventional microprocessor, an external storage device (not shown), an address bus 2 connected to the microprocessor section 1, and an external storage device (not shown). A register 3 that stores specific address information of the device, a comparison circuit 4 that compares arbitrary address information input from the address bus 2 and information stored in the register 3, and a memory write sent from an external bus master (not shown). signal and micro
It has an AND circuit 7 that ANDs the bus use permission signal from the processor section 1.

In such a microprocessor, an address bus 2 for outputting addresses from the microprocessor section also has an input function from an external bus master, and inputs from the external bus master are transferred to a comparator circuit 4. The value of the register 3 that stores specific address information is also input to this comparison circuit 4, and both the memory write signal 5 from the external bus master and the bus use permission signal 6 from the microprocessor section 1 to the external bus master are active. It is designed to work only when If the address by this external bus master and the value of register 3 match,
An interrupt signal 8 is outputted to the microprocessor section 1 as an output of the comparison circuit 4. That is, in this embodiment, when the external bus master writes to the memory, the interrupt signal 8 is generated by comparing the address with a value set in the register 3 in advance. Therefore, program runaway does not occur, and since the external bus masters do not control each other's operating areas, the burden of software design can be reduced.

FIG. 2 is a block diagram of a microprocessor showing a second embodiment of the invention.

As shown in FIG. 2, in this embodiment, when the external bus master writes to the memory, the memory write signal 5 becomes active, and the value of one or more registers 9 set in advance and the address bus 2 are activated. The address value is compared by the comparison circuit 4, and if there is even one match, an interrupt signal is generated, and an interrupt of the interrupt type set in advance in the register 10 is generated. It is.

According to this embodiment, since each register has an interrupt type, there is an advantage that interrupt processing can be changed depending on the write address.

〔Effect of the invention〕

As explained above, the microprocessor of the present invention generates an interrupt when the contents of a specific area of memory that can be freely set by software from an external bus master is changed, thereby preventing program runaway with the addition of a small amount of hardware. This has the effect of being able to prevent this and, moreover, reducing the burden on the software designer.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a microprocessor showing a first embodiment of the invention, and FIG. 2 is a block diagram of a microprocessor showing a second embodiment of the invention. DESCRIPTION OF SYMBOLS 1... Microprocessor section, 2... Address bus, 3... Register, 4... Comparison circuit, 5... Memory write signal, 6... Bus use permission signal, 7... AND Circuit, 8...Interrupt signal, 9...Register (address part) O...Register (interrupt type part)

Claims (1)

[Claims] A register that stores specific address information of an external storage device, a processor unit that is connected to the register and the address bus and performs various controls, and a processor that stores arbitrary address information input from the address bus and information stored in the register. A microprocessor comprising: a comparison circuit that compares and sends an interrupt request signal to the processor section based on control of a memory write signal when they match.