JPH03185713A - Method for forming crystalline semiconductor thin film and SOI device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention [Industrial Field of Application] The present invention provides a method for forming a crystalline semiconductor thin film and a 5OI (
The present invention relates to a method for forming a high-quality crystalline semiconductor thin film on a large-area insulating substrate, and a 501 device using a semiconductor thin film formed by this method.

[Prior art] In recent years, large-area input/output devices (input sensors,
Demand for printers, displays, etc.) is increasing and becoming more sophisticated. Conventional techniques for forming semiconductor thin films to form such devices include thermal solid-phase growth of hydrogenated amorphous silicon (a-5i:R) thin films, polycrystalline silicon thin films by low-pressure CVD, and amorphous silicon. Techniques have been used to obtain thin polycrystalline silicon films.

a-5i:) The I thin film can be uniformly formed by a low temperature process of 200 to 300° C., and it is possible to construct a large-area, uniform device on an inexpensive glass substrate.

For this reason, thin film transistor (TPT) matrices for driving liquid crystal televisions with a size of about 3 to 14 inches can be formed, and have been put into practical use as flat panel displays and contact reading sensors. However, a-5
t:H thin films have performance limitations due to amorphous materials;
At present, the field effect mobility jlaft is 1 (cm”
/v-Sec), and it is impossible to form peripheral drive circuits for driving and processing these optical sensors and TFT groups for driving liquid crystals on the same substrate. For this reason, it is necessary to connect a large number of external LSIs in a hybrid format using wire bonding or other methods, and from the viewpoint of cost and reliability, it is preferable to form peripheral drive circuits monolithically on the same substrate, that is, to use thin film transistors. Higher performance has been desired.

On the other hand, as a method of forming a polycrystalline silicon thin film from an amorphous state in order to improve the performance, a method of obtaining a polycrystalline silicon thin film by low pressure CVD has been used. Recently, by this method, a uniform polycrystalline silicon thin film with a mouth size of 200 to 300 cm can be obtained, but the formation process temperature is 600°C or higher, and it is not possible to use an inexpensive glass substrate. , requires quartz glass. Also that μ. 1. is 5~2C1(cm'/V-s
ec), and cannot be said to have sufficient performance to configure a peripheral drive circuit, and it cannot be said to have sufficient performance for configuring a peripheral drive circuit.
In order to increase the size of images, further performance improvements of about one order of magnitude or more are desired.

Furthermore, as a method to achieve this high performance, we have developed an amorphous silicon thin film (1000 Å or less) thermally (600°C to 65°C).
0°C) Solid-phase growth to produce dendritic, large-grained, multi-crystalline thin 1! (particle size 1-5 μm) has also been developed. This fil
The μoff of the membrane is 100 (c1/V −5ec),
However, this method still has the drawback of not being able to use an inexpensive glass substrate, and μ due to the random large-grain crystals that intertwine in a dendritic shape. f
There were large variations in f and threshold voltage (Vth), and the performance as a TPT for peripheral driving was not sufficiently durable.

[Problems to be Solved by the Invention] An object of the present invention is to fabricate uniform, high-performance thin film transistors (TPS) over a large area, for example, by a low-temperature process (approximately 500°C or less) that can use an inexpensive glass substrate.
The present invention provides a method for forming a crystalline semiconductor R film that can form a crystalline semiconductor R film. Another object of the present invention is to provide a simpler SOR device (eg, TPT) using the crystalline semiconductor thin film obtained by this method.

[Means for Solving Problem n] The method for forming a crystalline semiconductor thin film of the present invention is a method for forming a crystalline semiconductor thin film on an insulating substrate, in which DC or DC at a constant period is applied near the surface of the insulating substrate. By forming an AC electric field, supplying atoms or molecules constituting a raw material for forming a semiconductor thin film to the surface of the substrate, and simultaneously allowing ionized atoms to exist to form a crystalline semiconductor thin film on the surface of the substrate. It can be achieved.

Further, the SOI device of the present invention includes an insulating substrate, a conductive layer periodically arranged on the insulating substrate, and the crystalline semiconductor thin film formed while applying a voltage to the conductive layer. , and the conductive layer serves as the electrode of the Sol device.

Each configuration and requirement will be specifically explained below.

Examples of semiconductors that can be used in the present invention include S'i and Ge.

Semiconductors of +V group elements such as 5iGe and SiC are suitable.

The present invention is effective because it is difficult to obtain crystals with large grain size and good orientation on an insulating substrate because semiconductors made of +V group elements cannot be expected to have crystal orientation ability due to other ionic elements. It can be implemented as a method. Naturally, it is more effectively applied to the II-Vl group and the III-V group.

The crystalline semiconductor thin film achieved here is a polycrystalline thin film several hundred to several micrometers thick with a grain size of several μm or more, small grain size variation, and good orientation (uniform in-plane orientation). It is. Because this thin film is grown through a low-temperature growth process, there are extremely few intracrystalline defects that occur on a plane-by-plane basis or at interfaces due to strain, etc.

Examples of the insulating substrate used include various glass substrates, including inexpensive alkali-free barium borosilicate glass (#7059), and 5i02 coated blue plate glass and white plate glass can also be used. Of course, quartz substrates, thermally oxidized St wafers, spinel, and sapphire substrates are also applicable.

As an example of an apparatus for forming a crystalline semiconductor thin film, a sputtering apparatus is shown in FIG.

The cleaning of the surface of a substrate and the deposition of a crystalline semiconductor thin film using a bias sputtering device with two-frequency excitation will be described. Argon plasma is generated in the space shown in Fig. 1@ by high frequency waves, and the power and frequency of the high frequency waves applied to the argon ions on the substrate or the impedance between the substrate and the ground are controlled.

An insulating substrate 2 on which a crystalline semiconductor thin film is formed is held within a cleaned vacuum pelger 1. The sputtering equipment is
It consists of one electrode 8i (substrate electrode) 3 and the other electrode 4 (target electrode) that holds the semiconductor raw material target 5 to be sputtered, and the substrate electrode 3 has a built-in heater that keeps the substrate 2 at a constant temperature. The back surface of the target electrode 4 has a magnet that concentrates the plasma. The vacuum pelger 1 is evacuated by an oil-free high vacuum pump, and the background pressure is typically io-'~10-''
It is exhausted to Torr. As the sputtering gas, for example, the Ar gas pressure during sputtering is 1.
It is assumed to be O-3 to 10-'Torr. Target electrode 4
For this purpose, a higher frequency power source such as 100 MHz is applied via a matching circuit (MC) to suppress gas phase secondary reactions caused by low pressure sputtering and to control (equalize) ion energy. In addition, a power supply capable of applying a DC voltage is connected to the target electrode 4 side via a low-pass filter (LPF), and the target electrode potential is fixed by superimposing a self-bias on the plasma, and the Ar ion energy incident on the target is is controlled independently of the ion incidence amount (high frequency power amount). On the other hand, the substrate electrode 3 is connected to a high frequency power source such as 13.56M1lZ via M-C, and L
It is also connected to a DC power source via the PF, so that the potential on the surface of the insulating substrate 2 can be fixed. By doing so, the potential difference between the surface of the insulating substrate 2 and the plasma potential can be controlled, and the energy of ions incident on the substrate can be controlled to a constant value. In order to clean the substrate surface with this device, the incident energy of the ions on the target is set to a value that will not cause sputtering, and the incident energy of the ions on the substrate is set to several eV, so that water molecules are It is possible to remove and clean the surface adsorbed matter and natural oxide film without causing radiation damage to the substrate.The thus obtained clean surface is subjected to plasma potential by self-biasing by plasma or bias control by DC power supply. The target is irradiated with argon ions having energy equal to the difference in target potential, causing a sputtering phenomenon of the target material and supplying raw material atoms or molecules for forming a semiconductor thin film to the insulating substrate 2 side.

At this time, the potential on the surface of the insulating substrate 2 is controlled as described above, and the potential difference between the ions and the ionized atoms or molecules of the semiconductor thin film forming raw material is unified with the plasma potential. They are simultaneously supplied with irradiation energy.

In this way, cleaning and semiconductor thin film formation can be performed continuously in the same vacuum chamber, which inhibits crystallization.
In order to effectively reduce impurities that cause defects, and to easily achieve clean surface conditions and chemotaxis,
Good semiconductor crystals can be easily produced with good reproducibility.

Next, one method of forming a constant-period DC or ^C electric field near the surface of an insulating substrate will be described.

As shown in FIG. 2(a), an insulating substrate 2 such as glass
Conductive layers 6 and 7 are arranged alternately on top.

FIG. 3 is a perspective view showing an example in which the conductive layers 6 and 7 face each other in a comb-toothed manner. Such a substrate is held on the substrate electrode of the sputtering apparatus of FIG. 1 and is externally connected to an independent power source (not shown) to electrode 6 or 7. For this purpose, connection terminals 6° and 7° of the conductive layer 6.7 are formed.

A DC or AC voltage of several H2 to several tens of KHz is applied to the conductive layer 6.7 at an electric field strength of 103 V/c*-10' V/cm.
It is applied at a certain level. The conductive layer 6.7 is made of Mo, Ti.

It is formed of a metal layer such as Cr or W, a doped polysilicon layer, or the like. This layer thickness is determined by several hundred to several steps and is patterned by a conventional photolithography method.

The shape of the pattern is not limited to the stripe shape as shown in FIG. 2(a) and FIG.
It is appropriately selected to be formed in a certain area. Further, this conductive layer 6.7 is used as an electrode of the 501 device, and is determined by the shape of the electrode, which is determined by the position, shape, and size of the SOT device.

Usually, the lines/spaces of the pattern of conductive layer are f
~100 pm/1~1000 μm. FIG. 2(b) schematically shows the electric field near the substrate surface at a certain time when a voltage is applied to the conductive layers 6 and 7. It is formed. Furthermore, as mentioned above, the surface of the insulating substrate between the conductive layers 6 and 7 is controlled to a constant voltage by the two-frequency excitation method, so that the electric field near the surface is not deformed or displaced. ).

FIG. 4 schematically shows the substrate in plasma space and the state of ions and atoms incident on the substrate. The aforementioned electric field is formed in the vicinity of the surface of the insulating substrate 2 in a DC or AC manner. Ar ions generated in the plasma region and raw material atoms such as St and Si ions are supplied to the substrate surface. Si atoms (radicals) are supplied from the plasma region to the substrate surface with kinetic energy during diffusion or sputtering. On the other hand, Ar and Si ions are incident on the substrate surface by an accelerating electric field (in the X direction) of the sheath portion generated by the plasma potential in the plasma region and the substrate surface potential controlled to be constant as described above. Ions with controlled ion energy in the direction of the substrate (X direction) have anisotropic lateral ion energy due to the electric field in the lateral direction (y direction) formed on and near the substrate surface. It is given in the y direction.

In FIG. 4, ions (energy) move in the direction of each conductive layer 7 so as to be concentrated.

Here, the controlled ion energy in the X and y directions is
Energy is given to the Si atoms that have reached the substrate, and 200 ~
It prevents thermal quenching on a substrate at a low temperature of 400°C and facilitates crystallization.

In other words, increasing the surface mobility of Si atoms, and
Facilitates the bond transition to the most stable Si-Si bond state (single crystallization).

In addition, the periodicity of the electric field on or near the surface forms a constant potential period with anisotropy in one direction in each surface region, which dramatically improves the orientation of the growing semiconductor crystal. and also match the in-plane orientation. In addition, in-plane crystal uniformity that allows easy growth to a large grain size (several μm) can be achieved. As the method for forming the crystalline semiconductor thin film described here, in addition to the sputtering method, the plasma CVD method in which the energy of ions is controlled, the ion plating method, and the like can be equally implemented.

The crystalline semiconductor thin film described herein has a conductive layer on the substrate and has the advantage of being effectively utilized as M,8i in the formation of the final SDI device. Especially T
Effective as source/drain electrodes of PT structure. Of course, it has the advantage of being well used as an electrode for forming devices such as diodes, resistors, solar cells, etc., and in particular, it can form fine patterns with high yield on a smooth glass substrate as a large-area device in the first step. This can be cited as an advantage.

Examples] (Example 1) The device shown in FIG. 5 was created as follows.

After cleaning #7059 glass (manufactured by Corning) 2 with 1 opening of 20CII and forming a 1,000-layer thick layer on the entire surface by sputtering, photolithographic patterning was performed to form comb-like lines/spaces of 5 μm to 150 μm as shown in Figure 3. A pair of patterns as shown were formed. This glass substrate was set in the two-frequency excitation bias sputtering apparatus shown in Fig. 1, and the temperature of the substrate was maintained at 350°C by evacuation to 3 x 10-'' Torr.Next, gas was introduced to increase the Pelger internal pressure. Set to 5 X to 'Torr using a conductance valve. Target electrode side 100MHz
Power on 1011, target DC power is -20
It was set to v. On the other hand, the board side electrode 13.56M1 (Z power supply is set to IOW, OC power supply is set to 8V, and the board surface is set to 1
Cleaned for minutes. During this time, the pair of electrodes on the glass substrate were each grounded. Subsequently, 90 W was applied to the 100 M) Iz power source on the target electrode side, and the target DC power source was set to -200 V.

IOW to the 13.56 MHz power supply of the substrate side electrode,
The DC power supply was set to 5v. An IKHz AC voltage of 250 V was applied between a pair of electrodes on the glass substrate. Using undoped polycrystalline silicon as the target, 3000 silicon Il! in 50 minutes under these conditions! No. 8 was grown uniformly over the entire surface of the glass substrate. When this grown semiconductor film was observed using a transmission electron microscope, the particle size was 2 to 2.
It had a structure in which the 3 μm thick polycrystalline silicon film was uniformly arranged, and almost no defects were observed within the crystal or near the interface. The space portion of this polycrystalline silicon film is 50 μm
A TPT shown in FIG. 5 having a channel (channel length 10 μm) inside was prepared as follows. First, by the magnetron SP method, a 5i02 gate insulating layer of 9.1500 nm was formed on the entire surface using Ar + O gas at a substrate temperature of 400°C, holes were made for the source and drain parts, and PH3/5i
An n9-doped St layer of 500% was deposited at a substrate temperature of 300°C by plasma CVD using a mixed gas of H4 = 1%.
A doped layer was formed leaving only the source and drain portions. Subsequently, source/drain electrodes and gate electrodes were formed using [:r/A4 electrode 11, and heated at 250°C for 30 minutes.
Annealed for 0 minutes.

The TFT thus obtained has u art = 140 (
cm'/V-sec) and its variation was within ±8%. Also, at Vth = 3.5V, the variation is ±1
It was within 0%, and a good result was obtained.

(Example 2) The device shown in FIG. 6 was created as follows.

After cleaning @7059 glass 2 of 20cg + mouth and forming a 500cm thick 0C "electrode 12" on the entire surface by sputtering method,
The n”si layer 30 was formed by plasma CVD using a mixed gas of PH3/5iFla=1% at a substrate temperature of 300°C.
0λ13 is laminated on the entire surface, and a Cr/n"si layer is layered on the line/
A pair of comb teeth were formed with a space of 4 μm/4 μm as shown in FIG.

This glass substrate was set in a two-frequency excitation bias sputtering apparatus in the same manner as in Example 1, and an exhaust-substrate cleaning process was performed. The conditions of the sputtering equipment were also the same. Between a pair of electrodes (Cr/n"St layer) on the glass substrate, 5
A DC voltage of 0V was applied. Approximately 90 in 15 minutes under these conditions
A silicon film 14 of 0 persons was formed. Transmission electron microscope @ut
Observation revealed that polycrystalline silicon with a grain size of 4 to 6 μm grows uniformly and orderly in the space so that the grain size straddles the space, and the line part (Cr/n"S
In layer i), a polycrystalline layer with a grain size of approximately 400 nm had grown.

A TPT was created on a substrate equivalent to this as follows.

First, by the magnetron SP method, a 5i02 gate insulating layer 1 was formed on the entire surface at a substrate temperature of 400°C using Ar+O□ gas.
After forming 1500 electrodes 5, a gate electrode 16 was formed using a Cr/^°C electrode. Next, Cr/
One pair of n'' Si layers was selected to serve as source/drain electrodes, all surrounding layers were etched out, isolation was performed, and finally annealing was performed at 400° C. for 30 minutes.

In this way, the obtained TFT has μ*tt=270(cm
'/V-sec), and the variation was ±7% or less. Further, when Vth=1.8V, the variation was less than ±6%, and very good results were obtained.

[Effects of the Invention] As explained above, the method for forming a crystalline semiconductor thin film of the present invention and its Sol device can easily form a polycrystalline semi-destructive thin film with a large grain size over a large area at low temperature, and its performance can be improved. can be equal to or better than that obtained with high temperature processes.

[Brief Description of the Drawings] Fig. 1 is a conceptual diagram of a dual frequency excitation bias sputtering apparatus which is one method of realizing the present invention, Fig. 2 is (a) a cross-sectional view of a pattern of a conductive layer on a substrate, and (b) ) An explanatory diagram showing how a periodic electric field pattern is formed using the pattern in (a), Figure 3 is a side view of Figure 2 (a), and Figure 4 is an explanatory diagram showing how a periodic electric field pattern is formed using the pattern in (a). 5 and 6 are schematic cross-sectional views of a device according to an embodiment of the present invention. (Explanation of symbols) 1...Vacuum Pelger 2...Insulating substrate, 3.4
... Electrode, 5... Target, 6.7... Conductive layer. Figure (a) Figure 4 Figure Si” Ar” Figure 1 Figure 2 3 4

Claims (7)

[Claims] (1) A method for forming a crystalline semiconductor thin film on an insulating substrate, in which a DC or AC electric field with a constant period is formed near the surface of the insulating substrate, and atoms or molecules constituting the raw material for forming the semiconductor thin film. 1. A method for forming a crystalline semiconductor thin film, which comprises supplying a crystalline semiconductor thin film to the surface of the substrate, and simultaneously making ionized atoms exist to form a crystalline semiconductor thin film on the surface of the substrate. (2) In the method of forming a DC or AC electric field with a constant period near the surface of the above-mentioned substrate, conductive layers are formed on the same surface of the above-mentioned insulating substrate to face each other in isolation, and between the conductive layers adjacent to each other, 2. The method of forming a crystalline semiconductor thin film according to claim 1, wherein the constant periodic PC or AC electric field is formed by applying a voltage from outside. (3) The method for forming a crystalline semiconductor thin film according to claim 1 or 2, wherein the semiconductor thin film is a crystalline silicon thin film. (4) The method for forming a crystalline semiconductor thin film according to any one of claims 1 to 3, wherein the ionized atoms are silicon ions or argon ions. (5) The method for forming a crystalline semiconductor thin film according to any one of claims 1 to 4, wherein the energy of the ionized atoms when they reach the substrate surface is controlled. (6) A claim characterized in that the atoms or molecules constituting the raw material for forming the semiconductor thin film are supplied by a sputtering method, a plasma CVD method, or an ion plating method in which the substrate is DC-biased with respect to a plasma potential. A method for forming a crystalline semiconductor thin film according to items 1 to 5. (7) It has an insulating substrate, a conductive layer periodically arranged on the insulating substrate, and the crystalline semiconductor thin film formed while applying a voltage to the conductive layer, and , the conductive layer serves as an electrode of an SOI device
device.